1; RUN: opt %loadPolly -polly-scops -analyze < %s | FileCheck %s 2; RUN: opt %loadPolly -polly-ast -analyze < %s | FileCheck %s --check-prefix=AST 3; 4; void f(int *A, int N) { 5; for (int i = 0; i < N; i++) 6; switch (i % 4) { 7; case 0: 8; A[i] += 1; 9; break; 10; case 1: 11; A[i] += 2; 12; break; 13; case 2: 14; A[i] += 3; 15; break; 16; case 3: 17; A[i] += 4; 18; break; 19; default: 20; A[i - 1] += A[i + 1]; 21; } 22; } 23 24; CHECK: Statements { 25; CHECK-NEXT: Stmt_sw_bb 26; CHECK-NEXT: Domain := 27; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] : (i0) mod 4 = 0 and 0 <= i0 < N }; 28; CHECK-NEXT: Schedule := 29; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] -> [i0, 3] }; 30; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0] 31; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] -> MemRef_A[i0] }; 32; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0] 33; CHECK-NEXT: [N] -> { Stmt_sw_bb[i0] -> MemRef_A[i0] }; 34; CHECK-NEXT: Stmt_sw_bb_1 35; CHECK-NEXT: Domain := 36; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] : (-1 + i0) mod 4 = 0 and 0 < i0 < N }; 37; CHECK-NEXT: Schedule := 38; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] -> [i0, 2] }; 39; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0] 40; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] -> MemRef_A[i0] }; 41; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0] 42; CHECK-NEXT: [N] -> { Stmt_sw_bb_1[i0] -> MemRef_A[i0] }; 43; CHECK-NEXT: Stmt_sw_bb_5 44; CHECK-NEXT: Domain := 45; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[i0] : (2 + i0) mod 4 = 0 and 2 <= i0 < N }; 46; CHECK-NEXT: Schedule := 47; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[i0] -> [i0, 1] }; 48; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0] 49; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[i0] -> MemRef_A[i0] }; 50; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0] 51; CHECK-NEXT: [N] -> { Stmt_sw_bb_5[i0] -> MemRef_A[i0] }; 52; CHECK-NEXT: Stmt_sw_bb_9 53; CHECK-NEXT: Domain := 54; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[i0] : (1 + i0) mod 4 = 0 and 3 <= i0 < N }; 55; CHECK-NEXT: Schedule := 56; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[i0] -> [i0, 0] }; 57; CHECK-NEXT: ReadAccess := [Reduction Type: +] [Scalar: 0] 58; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[i0] -> MemRef_A[i0] }; 59; CHECK-NEXT: MustWriteAccess := [Reduction Type: +] [Scalar: 0] 60; CHECK-NEXT: [N] -> { Stmt_sw_bb_9[i0] -> MemRef_A[i0] }; 61; CHECK-NEXT: } 62 63; AST: if (1) 64; 65; AST: for (int c0 = 0; c0 < N; c0 += 4) { 66; AST-NEXT: Stmt_sw_bb(c0); 67; AST-NEXT: if (N >= c0 + 2) { 68; AST-NEXT: Stmt_sw_bb_1(c0 + 1); 69; AST-NEXT: if (N >= c0 + 3) { 70; AST-NEXT: Stmt_sw_bb_5(c0 + 2); 71; AST-NEXT: if (N >= c0 + 4) 72; AST-NEXT: Stmt_sw_bb_9(c0 + 3); 73; AST-NEXT: } 74; AST-NEXT: } 75; AST-NEXT: } 76; 77; AST: else 78; AST-NEXT: { /* original code */ } 79 80target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128" 81 82define void @f(i32* %A, i32 %N) { 83entry: 84 %tmp = sext i32 %N to i64 85 br label %for.cond 86 87for.cond: ; preds = %for.inc, %entry 88 %indvars.iv = phi i64 [ %indvars.iv.next, %for.inc ], [ 0, %entry ] 89 %cmp = icmp slt i64 %indvars.iv, %tmp 90 br i1 %cmp, label %for.body, label %for.end 91 92for.body: ; preds = %for.cond 93 %tmp3 = trunc i64 %indvars.iv to i32 94 %rem = srem i32 %tmp3, 4 95 switch i32 %rem, label %sw.default [ 96 i32 0, label %sw.bb 97 i32 1, label %sw.bb.1 98 i32 2, label %sw.bb.5 99 i32 3, label %sw.bb.9 100 ] 101 102sw.bb: ; preds = %for.body 103 %arrayidx = getelementptr inbounds i32, i32* %A, i64 %indvars.iv 104 %tmp4 = load i32, i32* %arrayidx, align 4 105 %add = add nsw i32 %tmp4, 1 106 store i32 %add, i32* %arrayidx, align 4 107 br label %sw.epilog 108 109sw.bb.1: ; preds = %for.body 110 %arrayidx3 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv 111 %tmp5 = load i32, i32* %arrayidx3, align 4 112 %add4 = add nsw i32 %tmp5, 2 113 store i32 %add4, i32* %arrayidx3, align 4 114 br label %sw.epilog 115 116sw.bb.5: ; preds = %for.body 117 %arrayidx7 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv 118 %tmp6 = load i32, i32* %arrayidx7, align 4 119 %add8 = add nsw i32 %tmp6, 3 120 store i32 %add8, i32* %arrayidx7, align 4 121 br label %sw.epilog 122 123sw.bb.9: ; preds = %for.body 124 %arrayidx11 = getelementptr inbounds i32, i32* %A, i64 %indvars.iv 125 %tmp7 = load i32, i32* %arrayidx11, align 4 126 %add12 = add nsw i32 %tmp7, 4 127 store i32 %add12, i32* %arrayidx11, align 4 128 br label %sw.epilog 129 130sw.default: ; preds = %for.body 131 %tmp8 = add nuw nsw i64 %indvars.iv, 1 132 %arrayidx15 = getelementptr inbounds i32, i32* %A, i64 %tmp8 133 %tmp9 = load i32, i32* %arrayidx15, align 4 134 %tmp10 = add nsw i64 %indvars.iv, -1 135 %arrayidx17 = getelementptr inbounds i32, i32* %A, i64 %tmp10 136 %tmp11 = load i32, i32* %arrayidx17, align 4 137 %add18 = add nsw i32 %tmp11, %tmp9 138 store i32 %add18, i32* %arrayidx17, align 4 139 br label %sw.epilog 140 141sw.epilog: ; preds = %sw.default, %sw.bb.9, %sw.bb.5, %sw.bb.1, %sw.bb 142 br label %for.inc 143 144for.inc: ; preds = %sw.epilog 145 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 146 br label %for.cond 147 148for.end: ; preds = %for.cond 149 ret void 150} 151