1{
2   "arrays" : [
3      {
4         "name" : "MemRef_C",
5         "sizes" : [ "*", "1024" ],
6         "type" : "float"
7      },
8      {
9         "name" : "MemRef_A",
10         "sizes" : [ "*", "1024" ],
11         "type" : "float"
12      },
13      {
14         "name" : "MemRef_B",
15         "sizes" : [ "*", "1024" ],
16         "type" : "float"
17      }
18   ],
19   "context" : "{  :  }",
20   "name" : "%bb3---%bb28",
21   "statements" : [
22      {
23         "accesses" : [
24            {
25               "kind" : "read",
26               "relation" : "{ Stmt_bb8[i0, i1] -> MemRef_C[i0, i1] }"
27            },
28            {
29               "kind" : "write",
30               "relation" : "{ Stmt_bb8[i0, i1] -> MemRef_tmp_0__phi[] }"
31            }
32         ],
33         "domain" : "{ Stmt_bb8[i0, i1] : 0 <= i0 <= 1023 and 0 <= i1 <= 1023 }",
34         "name" : "Stmt_bb8",
35         "schedule" : "{ Stmt_bb8[i0, i1] -> [i0, i1, 0, 0, 0] }"
36      },
37      {
38         "accesses" : [
39            {
40               "kind" : "read",
41               "relation" : "{ Stmt_bb10[i0, i1, i2] -> MemRef_tmp_0__phi[] }"
42            },
43            {
44               "kind" : "write",
45               "relation" : "{ Stmt_bb10[i0, i1, i2] -> MemRef_tmp_0[] }"
46            },
47            {
48               "kind" : "write",
49               "relation" : "{ Stmt_bb10[i0, i1, i2] -> MemRef_tmp_0_lcssa__phi[] }"
50            }
51         ],
52         "domain" : "{ Stmt_bb10[i0, i1, i2] : 0 <= i0 <= 1023 and 0 <= i1 <= 1023 and 0 <= i2 <= 1024 }",
53         "name" : "Stmt_bb10",
54         "schedule" : "{ Stmt_bb10[i0, i1, i2] -> [i0, i1, 1, i2, 0] }"
55      },
56      {
57         "accesses" : [
58            {
59               "kind" : "write",
60               "relation" : "{ Stmt_bb13[i0, i1, i2] -> MemRef_tmp_0__phi[] }"
61            },
62            {
63               "kind" : "read",
64               "relation" : "{ Stmt_bb13[i0, i1, i2] -> MemRef_A[i0, i2] }"
65            },
66            {
67               "kind" : "read",
68               "relation" : "{ Stmt_bb13[i0, i1, i2] -> MemRef_B[i2, i1] }"
69            },
70            {
71               "kind" : "read",
72               "relation" : "{ Stmt_bb13[i0, i1, i2] -> MemRef_tmp_0[] }"
73            }
74         ],
75         "domain" : "{ Stmt_bb13[i0, i1, i2] : 0 <= i0 <= 1023 and 0 <= i1 <= 1023 and 0 <= i2 <= 1023 }",
76         "name" : "Stmt_bb13",
77         "schedule" : "{ Stmt_bb13[i0, i1, i2] -> [i0, i1, 1, i2, 1] }"
78      },
79      {
80         "accesses" : [
81            {
82               "kind" : "read",
83               "relation" : "{ Stmt_bb11[i0, i1] -> MemRef_tmp_0_lcssa__phi[] }"
84            },
85            {
86               "kind" : "write",
87               "relation" : "{ Stmt_bb11[i0, i1] -> MemRef_tmp_0_lcssa[] }"
88            }
89         ],
90         "domain" : "{ Stmt_bb11[i0, i1] : 0 <= i0 <= 1023 and 0 <= i1 <= 1023 }",
91         "name" : "Stmt_bb11",
92         "schedule" : "{ Stmt_bb11[i0, i1] -> [i0, i1, 2, 0, 0] }"
93      },
94      {
95         "accesses" : [
96            {
97               "kind" : "write",
98               "relation" : "{ Stmt_bb21[i0, i1] -> MemRef_C[i0, i1] }"
99            },
100            {
101               "kind" : "read",
102               "relation" : "{ Stmt_bb21[i0, i1] -> MemRef_tmp_0_lcssa[] }"
103            }
104         ],
105         "domain" : "{ Stmt_bb21[i0, i1] : 0 <= i0 <= 1023 and 0 <= i1 <= 1023 }",
106         "name" : "Stmt_bb21",
107         "schedule" : "{ Stmt_bb21[i0, i1] -> [i0, i1, 3, 0, 0] }"
108      }
109   ]
110}
111