1// WebAssemblyInstrInfo.td-Describe the WebAssembly Instructions-*- tablegen -*- 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9/// 10/// \file 11/// \brief WebAssembly Instruction definitions. 12/// 13//===----------------------------------------------------------------------===// 14 15//===----------------------------------------------------------------------===// 16// WebAssembly Instruction Predicate Definitions. 17//===----------------------------------------------------------------------===// 18 19def HasAddr32 : Predicate<"!Subtarget->hasAddr64()">; 20def HasAddr64 : Predicate<"Subtarget->hasAddr64()">; 21def HasSIMD128 : Predicate<"Subtarget->hasSIMD128()">, 22 AssemblerPredicate<"FeatureSIMD128", "simd128">; 23 24//===----------------------------------------------------------------------===// 25// WebAssembly-specific DAG Node Types. 26//===----------------------------------------------------------------------===// 27 28def SDT_WebAssemblyCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>]>; 29def SDT_WebAssemblyCallSeqEnd : 30 SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>; 31def SDT_WebAssemblyCall0 : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 32def SDT_WebAssemblyCall1 : SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>; 33def SDT_WebAssemblyBrTable : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>; 34def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>; 35def SDT_WebAssemblyReturn : SDTypeProfile<0, -1, []>; 36def SDT_WebAssemblyWrapper : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>, 37 SDTCisPtrTy<0>]>; 38 39//===----------------------------------------------------------------------===// 40// WebAssembly-specific DAG Nodes. 41//===----------------------------------------------------------------------===// 42 43def WebAssemblycallseq_start : 44 SDNode<"ISD::CALLSEQ_START", SDT_WebAssemblyCallSeqStart, 45 [SDNPHasChain, SDNPOutGlue]>; 46def WebAssemblycallseq_end : 47 SDNode<"ISD::CALLSEQ_END", SDT_WebAssemblyCallSeqEnd, 48 [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>; 49def WebAssemblycall0 : SDNode<"WebAssemblyISD::CALL0", 50 SDT_WebAssemblyCall0, 51 [SDNPHasChain, SDNPVariadic]>; 52def WebAssemblycall1 : SDNode<"WebAssemblyISD::CALL1", 53 SDT_WebAssemblyCall1, 54 [SDNPHasChain, SDNPVariadic]>; 55def WebAssemblybr_table : SDNode<"WebAssemblyISD::BR_TABLE", 56 SDT_WebAssemblyBrTable, 57 [SDNPHasChain, SDNPVariadic]>; 58def WebAssemblyargument : SDNode<"WebAssemblyISD::ARGUMENT", 59 SDT_WebAssemblyArgument>; 60def WebAssemblyreturn : SDNode<"WebAssemblyISD::RETURN", 61 SDT_WebAssemblyReturn, [SDNPHasChain]>; 62def WebAssemblywrapper : SDNode<"WebAssemblyISD::Wrapper", 63 SDT_WebAssemblyWrapper>; 64 65//===----------------------------------------------------------------------===// 66// WebAssembly-specific Operands. 67//===----------------------------------------------------------------------===// 68 69let OperandNamespace = "WebAssembly" in { 70 71let OperandType = "OPERAND_BASIC_BLOCK" in 72def bb_op : Operand<OtherVT>; 73 74let OperandType = "OPERAND_FP32IMM" in 75def f32imm_op : Operand<f32>; 76 77let OperandType = "OPERAND_FP64IMM" in 78def f64imm_op : Operand<f64>; 79 80let OperandType = "OPERAND_P2ALIGN" in { 81def P2Align : Operand<i32> { 82 let PrintMethod = "printWebAssemblyP2AlignOperand"; 83} 84} // OperandType = "OPERAND_P2ALIGN" 85 86} // OperandNamespace = "WebAssembly" 87 88//===----------------------------------------------------------------------===// 89// WebAssembly Instruction Format Definitions. 90//===----------------------------------------------------------------------===// 91 92include "WebAssemblyInstrFormats.td" 93 94//===----------------------------------------------------------------------===// 95// Additional instructions. 96//===----------------------------------------------------------------------===// 97 98multiclass ARGUMENT<WebAssemblyRegClass vt> { 99 let hasSideEffects = 1, Uses = [ARGUMENTS], isCodeGenOnly = 1 in 100 def ARGUMENT_#vt : I<(outs vt:$res), (ins i32imm:$argno), 101 [(set vt:$res, (WebAssemblyargument timm:$argno))]>; 102} 103defm : ARGUMENT<I32>; 104defm : ARGUMENT<I64>; 105defm : ARGUMENT<F32>; 106defm : ARGUMENT<F64>; 107 108let Defs = [ARGUMENTS] in { 109 110// get_local and set_local are not generated by instruction selection; they 111// are implied by virtual register uses and defs. 112multiclass LOCAL<WebAssemblyRegClass vt> { 113let hasSideEffects = 0 in { 114 // COPY_LOCAL is not an actual instruction in wasm, but since we allow 115 // get_local and set_local to be implicit, we can have a COPY_LOCAL which 116 // is actually a no-op because all the work is done in the implied 117 // get_local and set_local. 118 let isAsCheapAsAMove = 1 in 119 def COPY_LOCAL_#vt : I<(outs vt:$res), (ins vt:$src), [], 120 "copy_local\t$res, $src">; 121 122 // TEE_LOCAL is similar to COPY_LOCAL, but writes two copies of its result. 123 // Typically this would be used to stackify one result and write the other 124 // result to a local. 125 let isAsCheapAsAMove = 1 in 126 def TEE_LOCAL_#vt : I<(outs vt:$res, vt:$also), (ins vt:$src), [], 127 "tee_local\t$res, $also, $src">; 128} // hasSideEffects = 0 129} 130defm : LOCAL<I32>; 131defm : LOCAL<I64>; 132defm : LOCAL<F32>; 133defm : LOCAL<F64>; 134 135let isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1 in { 136def CONST_I32 : I<(outs I32:$res), (ins i32imm:$imm), 137 [(set I32:$res, imm:$imm)], 138 "i32.const\t$res, $imm">; 139def CONST_I64 : I<(outs I64:$res), (ins i64imm:$imm), 140 [(set I64:$res, imm:$imm)], 141 "i64.const\t$res, $imm">; 142def CONST_F32 : I<(outs F32:$res), (ins f32imm_op:$imm), 143 [(set F32:$res, fpimm:$imm)], 144 "f32.const\t$res, $imm">; 145def CONST_F64 : I<(outs F64:$res), (ins f64imm_op:$imm), 146 [(set F64:$res, fpimm:$imm)], 147 "f64.const\t$res, $imm">; 148} // isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1 149 150} // Defs = [ARGUMENTS] 151 152def : Pat<(i32 (WebAssemblywrapper tglobaladdr:$addr)), 153 (CONST_I32 tglobaladdr:$addr)>; 154def : Pat<(i32 (WebAssemblywrapper texternalsym:$addr)), 155 (CONST_I32 texternalsym:$addr)>; 156 157//===----------------------------------------------------------------------===// 158// Additional sets of instructions. 159//===----------------------------------------------------------------------===// 160 161include "WebAssemblyInstrMemory.td" 162include "WebAssemblyInstrCall.td" 163include "WebAssemblyInstrControl.td" 164include "WebAssemblyInstrInteger.td" 165include "WebAssemblyInstrConv.td" 166include "WebAssemblyInstrFloat.td" 167include "WebAssemblyInstrAtomics.td" 168include "WebAssemblyInstrSIMD.td" 169