1//WebAssemblyRegisterInfo.td-Describe the WebAssembly Registers -*- tablegen -*-
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9///
10/// \file
11/// \brief This file describes the WebAssembly register classes and some nominal
12/// physical registers.
13///
14//===----------------------------------------------------------------------===//
15
16class WebAssemblyReg<string n> : Register<n> {
17  let Namespace = "WebAssembly";
18}
19
20class WebAssemblyRegClass<list<ValueType> regTypes, int alignment, dag regList>
21     : RegisterClass<"WebAssembly", regTypes, alignment, regList>;
22
23//===----------------------------------------------------------------------===//
24// Registers
25//===----------------------------------------------------------------------===//
26
27// Special registers used as the frame and stack pointer.
28//
29// WebAssembly may someday supports mixed 32-bit and 64-bit heaps in the same
30// application, which requires separate width FP and SP.
31def FP32 : WebAssemblyReg<"%FP32">;
32def FP64 : WebAssemblyReg<"%FP64">;
33def SP32 : WebAssemblyReg<"%SP32">;
34def SP64 : WebAssemblyReg<"%SP64">;
35
36// The register allocation framework requires register classes have at least
37// one register, so we define a few for the floating point register classes
38// since we otherwise don't need a physical register in those classes.
39def F32_0 : WebAssemblyReg<"%f32.0">;
40def F64_0 : WebAssemblyReg<"%f64.0">;
41
42// The expression stack "register". This is an opaque entity which serves to
43// order uses and defs that must remain in LIFO order.
44def EXPR_STACK : WebAssemblyReg<"STACK">;
45
46// The incoming arguments "register". This is an opaque entity which serves to
47// order the ARGUMENT instructions that are emulating live-in registers and
48// must not be scheduled below other instructions.
49def ARGUMENTS : WebAssemblyReg<"ARGUMENTS">;
50
51//===----------------------------------------------------------------------===//
52//  Register classes
53//===----------------------------------------------------------------------===//
54
55def I32 : WebAssemblyRegClass<[i32], 32, (add FP32, SP32)>;
56def I64 : WebAssemblyRegClass<[i64], 64, (add FP64, SP64)>;
57def F32 : WebAssemblyRegClass<[f32], 32, (add F32_0)>;
58def F64 : WebAssemblyRegClass<[f64], 64, (add F64_0)>;
59