1; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=GCN %s 2; XUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=VI -check-prefix=GCN %s 3 4; FIXME: Enable VI 5 6declare i32 @llvm.amdgcn.workitem.id.x() nounwind readnone 7declare float @llvm.fabs.f32(float) nounwind readnone 8 9; GCN-LABEL: {{^}}madak_f32: 10; GCN: buffer_load_dword [[VA:v[0-9]+]] 11; GCN: buffer_load_dword [[VB:v[0-9]+]] 12; GCN: v_madak_f32_e32 {{v[0-9]+}}, [[VA]], [[VB]], 0x41200000 13define void @madak_f32(float addrspace(1)* noalias %out, float addrspace(1)* noalias %in.a, float addrspace(1)* noalias %in.b) nounwind { 14 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone 15 %in.a.gep = getelementptr float, float addrspace(1)* %in.a, i32 %tid 16 %in.b.gep = getelementptr float, float addrspace(1)* %in.b, i32 %tid 17 %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid 18 19 %a = load float, float addrspace(1)* %in.a.gep, align 4 20 %b = load float, float addrspace(1)* %in.b.gep, align 4 21 22 %mul = fmul float %a, %b 23 %madak = fadd float %mul, 10.0 24 store float %madak, float addrspace(1)* %out.gep, align 4 25 ret void 26} 27 28; Make sure this is only folded with one use. This is a code size 29; optimization and if we fold the immediate multiple times, we'll undo 30; it. 31 32; GCN-LABEL: {{^}}madak_2_use_f32: 33; GCN-DAG: buffer_load_dword [[VA:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64{{$}} 34; GCN-DAG: buffer_load_dword [[VB:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:4 35; GCN-DAG: buffer_load_dword [[VC:v[0-9]+]], {{v\[[0-9]+:[0-9]+\]}}, {{s\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:8 36; GCN-DAG: v_mov_b32_e32 [[VK:v[0-9]+]], 0x41200000 37; GCN-DAG: v_mad_f32 {{v[0-9]+}}, [[VB]], [[VA]], [[VK]] 38; GCN-DAG: v_mac_f32_e32 [[VK]], [[VC]], [[VA]] 39; GCN: s_endpgm 40define void @madak_2_use_f32(float addrspace(1)* noalias %out, float addrspace(1)* noalias %in) nounwind { 41 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone 42 43 %in.gep.0 = getelementptr float, float addrspace(1)* %in, i32 %tid 44 %in.gep.1 = getelementptr float, float addrspace(1)* %in.gep.0, i32 1 45 %in.gep.2 = getelementptr float, float addrspace(1)* %in.gep.0, i32 2 46 47 %out.gep.0 = getelementptr float, float addrspace(1)* %out, i32 %tid 48 %out.gep.1 = getelementptr float, float addrspace(1)* %in.gep.0, i32 1 49 50 %a = load volatile float, float addrspace(1)* %in.gep.0, align 4 51 %b = load volatile float, float addrspace(1)* %in.gep.1, align 4 52 %c = load volatile float, float addrspace(1)* %in.gep.2, align 4 53 54 %mul0 = fmul float %a, %b 55 %mul1 = fmul float %a, %c 56 %madak0 = fadd float %mul0, 10.0 57 %madak1 = fadd float %mul1, 10.0 58 59 store volatile float %madak0, float addrspace(1)* %out.gep.0, align 4 60 store volatile float %madak1, float addrspace(1)* %out.gep.1, align 4 61 ret void 62} 63 64; GCN-LABEL: {{^}}madak_m_inline_imm_f32: 65; GCN: buffer_load_dword [[VA:v[0-9]+]] 66; GCN: v_madak_f32_e32 {{v[0-9]+}}, 4.0, [[VA]], 0x41200000 67define void @madak_m_inline_imm_f32(float addrspace(1)* noalias %out, float addrspace(1)* noalias %in.a) nounwind { 68 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone 69 %in.a.gep = getelementptr float, float addrspace(1)* %in.a, i32 %tid 70 %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid 71 72 %a = load float, float addrspace(1)* %in.a.gep, align 4 73 74 %mul = fmul float 4.0, %a 75 %madak = fadd float %mul, 10.0 76 store float %madak, float addrspace(1)* %out.gep, align 4 77 ret void 78} 79 80; Make sure nothing weird happens with a value that is also allowed as 81; an inline immediate. 82 83; GCN-LABEL: {{^}}madak_inline_imm_f32: 84; GCN: buffer_load_dword [[VA:v[0-9]+]] 85; GCN: buffer_load_dword [[VB:v[0-9]+]] 86; GCN: v_mad_f32 {{v[0-9]+}}, [[VA]], [[VB]], 4.0 87define void @madak_inline_imm_f32(float addrspace(1)* noalias %out, float addrspace(1)* noalias %in.a, float addrspace(1)* noalias %in.b) nounwind { 88 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone 89 %in.a.gep = getelementptr float, float addrspace(1)* %in.a, i32 %tid 90 %in.b.gep = getelementptr float, float addrspace(1)* %in.b, i32 %tid 91 %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid 92 93 %a = load float, float addrspace(1)* %in.a.gep, align 4 94 %b = load float, float addrspace(1)* %in.b.gep, align 4 95 96 %mul = fmul float %a, %b 97 %madak = fadd float %mul, 4.0 98 store float %madak, float addrspace(1)* %out.gep, align 4 99 ret void 100} 101 102; We can't use an SGPR when forming madak 103; GCN-LABEL: {{^}}s_v_madak_f32: 104; GCN-DAG: s_load_dword [[SB:s[0-9]+]] 105; GCN-DAG: v_mov_b32_e32 [[VK:v[0-9]+]], 0x41200000 106; GCN-DAG: buffer_load_dword [[VA:v[0-9]+]] 107; GCN-NOT: v_madak_f32 108; GCN: v_mac_f32_e32 [[VK]], [[SB]], [[VA]] 109define void @s_v_madak_f32(float addrspace(1)* noalias %out, float addrspace(1)* noalias %in.a, float %b) nounwind { 110 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone 111 %in.a.gep = getelementptr float, float addrspace(1)* %in.a, i32 %tid 112 %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid 113 114 %a = load float, float addrspace(1)* %in.a.gep, align 4 115 116 %mul = fmul float %a, %b 117 %madak = fadd float %mul, 10.0 118 store float %madak, float addrspace(1)* %out.gep, align 4 119 ret void 120} 121 122; GCN-LABEL: @v_s_madak_f32 123; GCN-DAG: s_load_dword [[SB:s[0-9]+]] 124; GCN-DAG: v_mov_b32_e32 [[VK:v[0-9]+]], 0x41200000 125; GCN-DAG: buffer_load_dword [[VA:v[0-9]+]] 126; GCN-NOT: v_madak_f32 127; GCN: v_mac_f32_e32 [[VK]], [[SB]], [[VA]] 128define void @v_s_madak_f32(float addrspace(1)* noalias %out, float %a, float addrspace(1)* noalias %in.b) nounwind { 129 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone 130 %in.b.gep = getelementptr float, float addrspace(1)* %in.b, i32 %tid 131 %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid 132 133 %b = load float, float addrspace(1)* %in.b.gep, align 4 134 135 %mul = fmul float %a, %b 136 %madak = fadd float %mul, 10.0 137 store float %madak, float addrspace(1)* %out.gep, align 4 138 ret void 139} 140 141; GCN-LABEL: {{^}}s_s_madak_f32: 142; GCN-NOT: v_madak_f32 143; GCN: v_mac_f32_e32 {{v[0-9]+}}, {{s[0-9]+}}, {{v[0-9]+}} 144define void @s_s_madak_f32(float addrspace(1)* %out, float %a, float %b) nounwind { 145 %mul = fmul float %a, %b 146 %madak = fadd float %mul, 10.0 147 store float %madak, float addrspace(1)* %out, align 4 148 ret void 149} 150 151; GCN-LABEL: {{^}}no_madak_src0_modifier_f32: 152; GCN: buffer_load_dword [[VA:v[0-9]+]] 153; GCN: buffer_load_dword [[VB:v[0-9]+]] 154; GCN: v_mad_f32 {{v[0-9]+}}, |{{v[0-9]+}}|, {{v[0-9]+}}, {{[sv][0-9]+}} 155; GCN: s_endpgm 156define void @no_madak_src0_modifier_f32(float addrspace(1)* noalias %out, float addrspace(1)* noalias %in.a, float addrspace(1)* noalias %in.b) nounwind { 157 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone 158 %in.a.gep = getelementptr float, float addrspace(1)* %in.a, i32 %tid 159 %in.b.gep = getelementptr float, float addrspace(1)* %in.b, i32 %tid 160 %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid 161 162 %a = load float, float addrspace(1)* %in.a.gep, align 4 163 %b = load float, float addrspace(1)* %in.b.gep, align 4 164 165 %a.fabs = call float @llvm.fabs.f32(float %a) nounwind readnone 166 167 %mul = fmul float %a.fabs, %b 168 %madak = fadd float %mul, 10.0 169 store float %madak, float addrspace(1)* %out.gep, align 4 170 ret void 171} 172 173; GCN-LABEL: {{^}}no_madak_src1_modifier_f32: 174; GCN: buffer_load_dword [[VA:v[0-9]+]] 175; GCN: buffer_load_dword [[VB:v[0-9]+]] 176; GCN: v_mad_f32 {{v[0-9]+}}, {{v[0-9]+}}, |{{v[0-9]+}}|, {{[sv][0-9]+}} 177; GCN: s_endpgm 178define void @no_madak_src1_modifier_f32(float addrspace(1)* noalias %out, float addrspace(1)* noalias %in.a, float addrspace(1)* noalias %in.b) nounwind { 179 %tid = tail call i32 @llvm.amdgcn.workitem.id.x() nounwind readnone 180 %in.a.gep = getelementptr float, float addrspace(1)* %in.a, i32 %tid 181 %in.b.gep = getelementptr float, float addrspace(1)* %in.b, i32 %tid 182 %out.gep = getelementptr float, float addrspace(1)* %out, i32 %tid 183 184 %a = load float, float addrspace(1)* %in.a.gep, align 4 185 %b = load float, float addrspace(1)* %in.b.gep, align 4 186 187 %b.fabs = call float @llvm.fabs.f32(float %b) nounwind readnone 188 189 %mul = fmul float %a, %b.fabs 190 %madak = fadd float %mul, 10.0 191 store float %madak, float addrspace(1)* %out.gep, align 4 192 ret void 193} 194 195; SIFoldOperands should not fold the SGPR copy into the instruction 196; because the implicit immediate already uses the constant bus. 197; GCN-LABEL: {{^}}madak_constant_bus_violation: 198; GCN: s_load_dword [[SGPR0:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, {{0xa|0x28}} 199; GCN: v_mov_b32_e32 [[SGPR0_VCOPY:v[0-9]+]], [[SGPR0]] 200; GCN: buffer_load_dword [[VGPR:v[0-9]+]] 201; GCN: v_madak_f32_e32 [[MADAK:v[0-9]+]], 0.5, [[SGPR0_VCOPY]], 0x42280000 202; GCN: v_mul_f32_e32 [[MUL:v[0-9]+]], [[VGPR]], [[MADAK]] 203; GCN: buffer_store_dword [[MUL]] 204define void @madak_constant_bus_violation(i32 %arg1, float %sgpr0, float %sgpr1) #0 { 205bb: 206 %tmp = icmp eq i32 %arg1, 0 207 br i1 %tmp, label %bb3, label %bb4 208 209bb3: 210 store volatile float 0.0, float addrspace(1)* undef 211 br label %bb4 212 213bb4: 214 %vgpr = load volatile float, float addrspace(1)* undef 215 %tmp0 = fmul float %sgpr0, 0.5 216 %tmp1 = fadd float %tmp0, 42.0 217 %tmp2 = fmul float %tmp1, %vgpr 218 store volatile float %tmp2, float addrspace(1)* undef, align 4 219 ret void 220} 221 222attributes #0 = { nounwind} 223