1; RUN: llc < %s -march=amdgcn -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC
2; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck %s --check-prefix=SI --check-prefix=FUNC
3; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s --check-prefix=EG --check-prefix=FUNC
4; RUN: llc < %s -march=r600 -mcpu=cayman | FileCheck %s --check-prefix=EG --check-prefix=FUNC
5
6; FUNC-LABEL: {{^}}u32_mul24:
7; EG: MUL_UINT24 {{[* ]*}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, KC0[2].W
8; SI: v_mul_u32_u24
9
10define void @u32_mul24(i32 addrspace(1)* %out, i32 %a, i32 %b) {
11entry:
12  %0 = shl i32 %a, 8
13  %a_24 = lshr i32 %0, 8
14  %1 = shl i32 %b, 8
15  %b_24 = lshr i32 %1, 8
16  %2 = mul i32 %a_24, %b_24
17  store i32 %2, i32 addrspace(1)* %out
18  ret void
19}
20
21; FUNC-LABEL: {{^}}i16_mul24:
22; EG: MUL_UINT24 {{[* ]*}}T{{[0-9]}}.[[MUL_CHAN:[XYZW]]]
23; The result must be sign-extended
24; EG: BFE_INT {{[* ]*}}T{{[0-9]}}.{{[XYZW]}}, PV.[[MUL_CHAN]], 0.0, literal.x
25; EG: 16
26; SI: v_mul_u32_u24_e{{(32|64)}} [[MUL:v[0-9]]], {{[sv][0-9], [sv][0-9]}}
27; SI: v_bfe_i32 v{{[0-9]}}, [[MUL]], 0, 16
28define void @i16_mul24(i32 addrspace(1)* %out, i16 %a, i16 %b) {
29entry:
30  %0 = mul i16 %a, %b
31  %1 = sext i16 %0 to i32
32  store i32 %1, i32 addrspace(1)* %out
33  ret void
34}
35
36; FUNC-LABEL: {{^}}i8_mul24:
37; EG: MUL_UINT24 {{[* ]*}}T{{[0-9]}}.[[MUL_CHAN:[XYZW]]]
38; The result must be sign-extended
39; EG: BFE_INT {{[* ]*}}T{{[0-9]}}.{{[XYZW]}}, PV.[[MUL_CHAN]], 0.0, literal.x
40; SI: v_mul_u32_u24_e{{(32|64)}} [[MUL:v[0-9]]], {{[sv][0-9], [sv][0-9]}}
41; SI: v_bfe_i32 v{{[0-9]}}, [[MUL]], 0, 8
42
43define void @i8_mul24(i32 addrspace(1)* %out, i8 %a, i8 %b) {
44entry:
45  %0 = mul i8 %a, %b
46  %1 = sext i8 %0 to i32
47  store i32 %1, i32 addrspace(1)* %out
48  ret void
49}
50
51; Multiply with 24-bit inputs and 64-bit output
52; FUNC_LABEL: {{^}}mul24_i64:
53; EG; MUL_UINT24
54; EG: MULHI
55; FIXME: SI support 24-bit mulhi
56
57; SI-DAG: v_mul_u32_u24
58; SI-DAG: v_mul_hi_u32
59; SI: s_endpgm
60define void @mul24_i64(i64 addrspace(1)* %out, i64 %a, i64 %b, i64 %c) {
61entry:
62  %tmp0 = shl i64 %a, 40
63  %a_24 = lshr i64 %tmp0, 40
64  %tmp1 = shl i64 %b, 40
65  %b_24 = lshr i64 %tmp1, 40
66  %tmp2 = mul i64 %a_24, %b_24
67  store i64 %tmp2, i64 addrspace(1)* %out
68  ret void
69}
70