1;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
2
3;CHECK: RECIP_IEEE * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
4
5define amdgpu_ps void @test(<4 x float> inreg %reg0) {
6   %r0 = extractelement <4 x float> %reg0, i32 0
7   %r1 = fdiv float 1.0, %r0
8   %vec = insertelement <4 x float> undef, float %r1, i32 0
9   call void @llvm.R600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
10   ret void
11}
12
13declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
14