1; RUN: llc -o - %s -march=amdgcn -mcpu=verde -verify-machineinstrs -stop-after expand-isel-pseudos | FileCheck %s 2; This test verifies that the instruction selection will add the implicit 3; register operands in the correct order when modifying the opcode of an 4; instruction to V_ADD_I32_e32. 5 6; CHECK: %{{[0-9]+}} = V_ADD_I32_e32 killed %{{[0-9]+}}, killed %{{[0-9]+}}, implicit-def %vcc, implicit %exec 7 8define void @test(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { 9entry: 10 %b_ptr = getelementptr i32, i32 addrspace(1)* %in, i32 1 11 %a = load volatile i32, i32 addrspace(1)* %in 12 %b = load volatile i32, i32 addrspace(1)* %b_ptr 13 %result = add i32 %a, %b 14 store i32 %result, i32 addrspace(1)* %out 15 ret void 16} 17