1; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 | FileCheck %s
2; RUN: llc < %s -mtriple=thumbv8 | FileCheck -check-prefix=CHECK-V8 %s
3; RUN: llc < %s -mtriple=thumbv7 -arm-restrict-it | FileCheck -check-prefix=CHECK-V8 %s
4; rdar://13782395
5
6define i32 @t1(i32 %a, i32 %b, i8** %retaddr) {
7; CHECK-LABEL: t1:
8; CHECK: Block address taken
9; CHECK-NOT: Address of block that was removed by CodeGen
10  store i8* blockaddress(@t1, %cond_true), i8** %retaddr
11  %tmp2 = icmp eq i32 %a, 0
12  br i1 %tmp2, label %cond_false, label %cond_true
13
14cond_true:
15  %tmp5 = add i32 %b, 1
16  ret i32 %tmp5
17
18cond_false:
19  %tmp7 = add i32 %b, -1
20  ret i32 %tmp7
21}
22
23define i32 @t2(i32 %a, i32 %b, i32 %c, i32 %d, i8** %retaddr) {
24; CHECK-LABEL: t2:
25; CHECK: Block address taken
26; CHECK: %cond_true
27; CHECK: add
28; CHECK: bx lr
29  store i8* blockaddress(@t2, %cond_true), i8** %retaddr
30  %tmp2 = icmp sgt i32 %c, 10
31  %tmp5 = icmp slt i32 %d, 4
32  %tmp8 = and i1 %tmp5, %tmp2
33  %tmp13 = add i32 %b, %a
34  br i1 %tmp8, label %cond_true, label %UnifiedReturnBlock
35
36cond_true:
37  %tmp15 = add i32 %tmp13, %c
38  %tmp1821 = sub i32 %tmp15, %d
39  ret i32 %tmp1821
40
41UnifiedReturnBlock:
42  ret i32 %tmp13
43}
44
45define hidden fastcc void @t3(i8** %retaddr, i1 %tst, i8* %p8) {
46; CHECK-LABEL: t3:
47; CHECK: Block address taken
48; CHECK-NOT: Address of block that was removed by CodeGen
49bb:
50  store i8* blockaddress(@t3, %KBBlockZero_return_1), i8** %retaddr
51  br i1 %tst, label %bb77, label %bb7.i
52
53bb7.i:                                            ; preds = %bb35
54  br label %bb2.i
55
56KBBlockZero_return_1:                             ; preds = %KBBlockZero.exit
57  ret void
58
59KBBlockZero_return_0:                             ; preds = %KBBlockZero.exit
60  ret void
61
62bb77:                                             ; preds = %bb26, %bb12, %bb
63  ret void
64
65bb2.i:                                            ; preds = %bb6.i350, %bb7.i
66  br i1 %tst, label %bb6.i350, label %KBBlockZero.exit
67
68bb6.i350:                                         ; preds = %bb2.i
69  br label %bb2.i
70
71KBBlockZero.exit:                                 ; preds = %bb2.i
72  indirectbr i8* %p8, [label %KBBlockZero_return_1, label %KBBlockZero_return_0]
73}
74
75@foo = global i32 ()* null
76define i32 @t4(i32 %x, i32 ()* %p_foo) {
77entry:
78;CHECK-LABEL: t4:
79;CHECK-V8-LABEL: t4:
80  %cmp = icmp slt i32 %x, 60
81  br i1 %cmp, label %if.then, label %if.else
82
83if.then:                                          ; preds = %entry
84  %tmp.2 = call i32 %p_foo()
85  %sub = add nsw i32 %x, -1
86  br label %return
87
88if.else:                                          ; preds = %entry
89  %sub1 = add nsw i32 %x, -120
90  br label %return
91
92return:                                           ; preds = %if.end5, %if.then4, %if.then
93  %retval.0 = phi i32 [ %sub, %if.then ], [ %sub1, %if.else ]
94  ret i32 %retval.0
95}
96
97; If-converter was checking for the wrong predicate subsumes pattern when doing
98; nested predicates.
99; E.g., Let A be a basic block that flows conditionally into B and B be a
100; predicated block.
101; B can be predicated with A.BrToBPredicate into A iff B.Predicate is less
102; "permissive" than A.BrToBPredicate, i.e., iff A.BrToBPredicate subsumes
103; B.Predicate.
104; <rdar://problem/14379453>
105
106; Hard-coded registers comes from the ABI.
107; CHECK-LABEL: wrapDistance:
108; CHECK: cmp r1, #59
109; CHECK-NEXT: itt le
110; CHECK-NEXT: suble r0, r2, #1
111; CHECK-NEXT: bxle lr
112; CHECK-NEXT: subs [[REG:r[0-9]+]], #120
113; CHECK-NEXT: cmp [[REG]], r1
114; CHECK-NOT: it lt
115; CHECK-NEXT: bge [[LABEL:.+]]
116; Next BB
117; CHECK-NOT: cmplt
118; CHECK: cmp r0, #119
119; CHECK-NEXT: itt le
120; CHECK-NEXT: addle r0, r1, #1
121; CHECK-NEXT: bxle lr
122; Next BB
123; CHECK: [[LABEL]]:
124; CHECK-NEXT: subs r0, r1, r0
125; CHECK-NEXT: bx lr
126
127; CHECK-V8-LABEL: wrapDistance:
128; CHECK-V8: cmp r1, #59
129; CHECK-V8-NEXT: bgt
130; CHECK-V8-NEXT: %if.then
131; CHECK-V8-NEXT: subs r0, r2, #1
132; CHECK-V8-NEXT: bx lr
133; CHECK-V8-NEXT: %if.else
134; CHECK-V8-NEXT: subs [[REG:r[0-9]+]], #120
135; CHECK-V8-NEXT: cmp [[REG]], r1
136; CHECK-V8-NEXT: bge
137; CHECK-V8-NEXT: %if.else
138; CHECK-V8-NEXT: cmp r0, #119
139; CHECK-V8-NEXT: bgt
140; CHECK-V8-NEXT: %if.then4
141; CHECK-V8-NEXT: adds r0, r1, #1
142; CHECK-V8-NEXT: bx lr
143; CHECK-V8-NEXT: %if.end5
144; CHECK-V8-NEXT: subs r0, r1, r0
145; CHECK-V8-NEXT: bx lr
146
147define i32 @wrapDistance(i32 %tx, i32 %sx, i32 %w) {
148entry:
149  %cmp = icmp slt i32 %sx, 60
150  br i1 %cmp, label %if.then, label %if.else
151
152if.then:                                          ; preds = %entry
153  %sub = add nsw i32 %w, -1
154  br label %return
155
156if.else:                                          ; preds = %entry
157  %sub1 = add nsw i32 %w, -120
158  %cmp2 = icmp slt i32 %sub1, %sx
159  %cmp3 = icmp slt i32 %tx, 120
160  %or.cond = and i1 %cmp2, %cmp3
161  br i1 %or.cond, label %if.then4, label %if.end5
162
163if.then4:                                         ; preds = %if.else
164  %add = add nsw i32 %sx, 1
165  br label %return
166
167if.end5:                                          ; preds = %if.else
168  %sub6 = sub nsw i32 %sx, %tx
169  br label %return
170
171return:                                           ; preds = %if.end5, %if.then4, %if.then
172  %retval.0 = phi i32 [ %sub, %if.then ], [ %add, %if.then4 ], [ %sub6, %if.end5 ]
173  ret i32 %retval.0
174}
175