1; REQUIRES: asserts
2; RUN: llc -mtriple=thumb-eabi -mcpu=swift -pre-RA-sched=source -join-globalcopies -enable-misched -verify-misched -debug-only=misched -arm-atomic-cfg-tidy=0 %s -o - 2>&1 | FileCheck %s
3;
4; Loop counter copies should be eliminated.
5; There is also a MUL here, but we don't care where it is scheduled.
6; CHECK: postinc
7; CHECK: *** Final schedule for BB#2 ***
8; CHECK: t2LDRs
9; CHECK: t2ADDrr
10; CHECK: t2CMPrr
11; CHECK: COPY
12define i32 @postinc(i32 %a, i32* nocapture %d, i32 %s) nounwind {
13entry:
14  %cmp4 = icmp eq i32 %a, 0
15  br i1 %cmp4, label %for.end, label %for.body
16
17for.body:                                         ; preds = %entry, %for.body
18  %indvars.iv = phi i32 [ %indvars.iv.next, %for.body ], [ 0, %entry ]
19  %s.05 = phi i32 [ %mul, %for.body ], [ 0, %entry ]
20  %indvars.iv.next = add i32 %indvars.iv, %s
21  %arrayidx = getelementptr inbounds i32, i32* %d, i32 %indvars.iv
22  %0 = load i32, i32* %arrayidx, align 4
23  %mul = mul nsw i32 %0, %s.05
24  %exitcond = icmp eq i32 %indvars.iv.next, %a
25  br i1 %exitcond, label %for.end, label %for.body
26
27for.end:                                          ; preds = %for.body, %entry
28  %s.0.lcssa = phi i32 [ 0, %entry ], [ %mul, %for.body ]
29  ret i32 %s.0.lcssa
30}
31
32
33; This case was a crasher in constrainLocalCopy.
34; The problem was the t2LDR_PRE defining both the global and local lrg.
35; CHECK-LABEL: *** Final schedule for BB#5 ***
36; CHECK: %[[R4:vreg[0-9]+]]<def>, %[[R1:vreg[0-9]+]]<def,tied2> = t2LDR_PRE %[[R1]]<tied1>
37; CHECK: %vreg{{[0-9]+}}<def> = COPY %[[R1]]
38; CHECK: %vreg{{[0-9]+}}<def> = COPY %[[R4]]
39; CHECK-LABEL: MACHINEINSTRS
40%struct.rtx_def = type { [4 x i8], [1 x %union.rtunion_def] }
41%union.rtunion_def = type { i64 }
42
43; Function Attrs: nounwind ssp
44declare hidden fastcc void @df_ref_record(i32* nocapture, %struct.rtx_def*, %struct.rtx_def**, %struct.rtx_def*, i32, i32) #0
45
46; Function Attrs: nounwind ssp
47define hidden fastcc void @df_def_record_1(i32* nocapture %df, %struct.rtx_def* %x, %struct.rtx_def* %insn) #0 {
48entry:
49  br label %while.cond
50
51while.cond:                                       ; preds = %if.end28, %entry
52  %loc.0 = phi %struct.rtx_def** [ %rtx31, %if.end28 ], [ undef, %entry ]
53  %dst.0 = phi %struct.rtx_def* [ %0, %if.end28 ], [ undef, %entry ]
54  switch i32 undef, label %if.end47 [
55    i32 61, label %if.then46
56    i32 64, label %if.then24
57    i32 132, label %if.end28
58    i32 133, label %if.end28
59  ]
60
61if.then24:                                        ; preds = %while.cond
62  br label %if.end28
63
64if.end28:                                         ; preds = %if.then24, %while.cond, %while.cond
65  %dst.1 = phi %struct.rtx_def* [ undef, %if.then24 ], [ %dst.0, %while.cond ], [ %dst.0, %while.cond ]
66  %arrayidx30 = getelementptr inbounds %struct.rtx_def, %struct.rtx_def* %dst.1, i32 0, i32 1, i32 0
67  %rtx31 = bitcast %union.rtunion_def* %arrayidx30 to %struct.rtx_def**
68  %0 = load %struct.rtx_def*, %struct.rtx_def** %rtx31, align 4
69  br label %while.cond
70
71if.then46:                                        ; preds = %while.cond
72  tail call fastcc void @df_ref_record(i32* %df, %struct.rtx_def* %dst.0, %struct.rtx_def** %loc.0, %struct.rtx_def* %insn, i32 0, i32 undef)
73  unreachable
74
75if.end47:                                         ; preds = %while.cond
76  ret void
77}
78
79attributes #0 = { nounwind ssp }
80