1; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s 2 3define <8 x i8> @vceqi8(<8 x i8>* %A, <8 x i8>* %B) nounwind { 4;CHECK-LABEL: vceqi8: 5;CHECK: vceq.i8 6 %tmp1 = load <8 x i8>, <8 x i8>* %A 7 %tmp2 = load <8 x i8>, <8 x i8>* %B 8 %tmp3 = icmp eq <8 x i8> %tmp1, %tmp2 9 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8> 10 ret <8 x i8> %tmp4 11} 12 13define <4 x i16> @vceqi16(<4 x i16>* %A, <4 x i16>* %B) nounwind { 14;CHECK-LABEL: vceqi16: 15;CHECK: vceq.i16 16 %tmp1 = load <4 x i16>, <4 x i16>* %A 17 %tmp2 = load <4 x i16>, <4 x i16>* %B 18 %tmp3 = icmp eq <4 x i16> %tmp1, %tmp2 19 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16> 20 ret <4 x i16> %tmp4 21} 22 23define <2 x i32> @vceqi32(<2 x i32>* %A, <2 x i32>* %B) nounwind { 24;CHECK-LABEL: vceqi32: 25;CHECK: vceq.i32 26 %tmp1 = load <2 x i32>, <2 x i32>* %A 27 %tmp2 = load <2 x i32>, <2 x i32>* %B 28 %tmp3 = icmp eq <2 x i32> %tmp1, %tmp2 29 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32> 30 ret <2 x i32> %tmp4 31} 32 33define <2 x i32> @vceqf32(<2 x float>* %A, <2 x float>* %B) nounwind { 34;CHECK-LABEL: vceqf32: 35;CHECK: vceq.f32 36 %tmp1 = load <2 x float>, <2 x float>* %A 37 %tmp2 = load <2 x float>, <2 x float>* %B 38 %tmp3 = fcmp oeq <2 x float> %tmp1, %tmp2 39 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32> 40 ret <2 x i32> %tmp4 41} 42 43define <16 x i8> @vceqQi8(<16 x i8>* %A, <16 x i8>* %B) nounwind { 44;CHECK-LABEL: vceqQi8: 45;CHECK: vceq.i8 46 %tmp1 = load <16 x i8>, <16 x i8>* %A 47 %tmp2 = load <16 x i8>, <16 x i8>* %B 48 %tmp3 = icmp eq <16 x i8> %tmp1, %tmp2 49 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8> 50 ret <16 x i8> %tmp4 51} 52 53define <8 x i16> @vceqQi16(<8 x i16>* %A, <8 x i16>* %B) nounwind { 54;CHECK-LABEL: vceqQi16: 55;CHECK: vceq.i16 56 %tmp1 = load <8 x i16>, <8 x i16>* %A 57 %tmp2 = load <8 x i16>, <8 x i16>* %B 58 %tmp3 = icmp eq <8 x i16> %tmp1, %tmp2 59 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16> 60 ret <8 x i16> %tmp4 61} 62 63define <4 x i32> @vceqQi32(<4 x i32>* %A, <4 x i32>* %B) nounwind { 64;CHECK-LABEL: vceqQi32: 65;CHECK: vceq.i32 66 %tmp1 = load <4 x i32>, <4 x i32>* %A 67 %tmp2 = load <4 x i32>, <4 x i32>* %B 68 %tmp3 = icmp eq <4 x i32> %tmp1, %tmp2 69 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32> 70 ret <4 x i32> %tmp4 71} 72 73define <4 x i32> @vceqQf32(<4 x float>* %A, <4 x float>* %B) nounwind { 74;CHECK-LABEL: vceqQf32: 75;CHECK: vceq.f32 76 %tmp1 = load <4 x float>, <4 x float>* %A 77 %tmp2 = load <4 x float>, <4 x float>* %B 78 %tmp3 = fcmp oeq <4 x float> %tmp1, %tmp2 79 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32> 80 ret <4 x i32> %tmp4 81} 82 83define <8 x i8> @vceqi8Z(<8 x i8>* %A) nounwind { 84;CHECK-LABEL: vceqi8Z: 85;CHECK-NOT: vmov 86;CHECK-NOT: vmvn 87;CHECK: vceq.i8 88 %tmp1 = load <8 x i8>, <8 x i8>* %A 89 %tmp3 = icmp eq <8 x i8> %tmp1, <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0> 90 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8> 91 ret <8 x i8> %tmp4 92} 93