1; RUN: llc -O2 -mcpu=hexagonv5 < %s | FileCheck %s
2; There should be no register pair used.
3; CHECK-NOT: r{{.*}}:{{[0-9]}} = and
4; CHECK-NOT: r{{.*}}:{{[0-9]}} = xor
5target datalayout = "e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-v64:64:64-v32:32:32-a0:0-n16:32"
6target triple = "hexagon"
7
8define i32 @foo(i64 %x, i64 %y, i64 %z) nounwind readnone {
9entry:
10  %and = and i64 %y, -361700868401135616
11  %xor = xor i64 %and, %z
12  %shr1 = lshr i64 %xor, 32
13  %conv = trunc i64 %shr1 to i32
14  ret i32 %conv
15}
16