1; RUN: llc -march=mipsel -mcpu=mips32   -asm-show-inst -relocation-model=pic < %s | FileCheck %s -check-prefixes=CHECK,NOT-R6
2; RUN: llc -march=mipsel -mcpu=mips32r2 -asm-show-inst -relocation-model=pic < %s | FileCheck %s -check-prefixes=CHECK,NOT-R6
3; RUN: llc -march=mipsel -mcpu=mips32r6 -asm-show-inst -relocation-model=pic < %s | FileCheck %s -check-prefixes=CHECK,R6
4
5declare void @llvm.eh.return.i32(i32, i8*)
6declare void @foo(...)
7
8define i8* @f1(i32 %offset, i8* %handler) {
9entry:
10  call void (...) @foo()
11  call void @llvm.eh.return.i32(i32 %offset, i8* %handler)
12  unreachable
13
14; CHECK:    f1:
15; CHECK:        addiu   $sp, $sp, -[[spoffset:[0-9]+]]
16
17; check that $a0-$a3 are saved on stack.
18; CHECK:        sw      $4, [[offset0:[0-9]+]]($sp)
19; CHECK:        sw      $5, [[offset1:[0-9]+]]($sp)
20; CHECK:        sw      $6, [[offset2:[0-9]+]]($sp)
21; CHECK:        sw      $7, [[offset3:[0-9]+]]($sp)
22
23; check that .cfi_offset directives are emitted for $a0-$a3.
24; CHECK:        .cfi_offset 4,
25; CHECK:        .cfi_offset 5,
26; CHECK:        .cfi_offset 6,
27; CHECK:        .cfi_offset 7,
28
29; check that stack adjustment and handler are put in $v1 and $v0.
30; CHECK:        move    $[[R0:[a-z0-9]+]], $5
31; CHECK:        move    $[[R1:[a-z0-9]+]], $4
32; CHECK:        move    $3, $[[R1]]
33; CHECK:        move    $2, $[[R0]]
34
35; check that $a0-$a3 are restored from stack.
36; CHECK:        lw      $4, [[offset0]]($sp)
37; CHECK:        lw      $5, [[offset1]]($sp)
38; CHECK:        lw      $6, [[offset2]]($sp)
39; CHECK:        lw      $7, [[offset3]]($sp)
40
41; check that stack is adjusted by $v1 and that code returns to address in $v0
42; also check that $25 contains handler value
43; CHECK:        addiu   $sp, $sp, [[spoffset]]
44; CHECK:        move    $25, $2
45; CHECK:        move    $ra, $2
46; NOT-R6:       jr      $ra # <MCInst #{{[0-9]+}} JR
47; R6:           jr      $ra # <MCInst #{{[0-9]+}} JALR
48; CHECK:        addu    $sp, $sp, $3
49}
50
51define i8* @f2(i32 %offset, i8* %handler) {
52entry:
53  call void @llvm.eh.return.i32(i32 %offset, i8* %handler)
54  unreachable
55
56; CHECK:    f2:
57; CHECK:        addiu   $sp, $sp, -[[spoffset:[0-9]+]]
58
59; check that $a0-$a3 are saved on stack.
60; CHECK:        sw      $4, [[offset0:[0-9]+]]($sp)
61; CHECK:        sw      $5, [[offset1:[0-9]+]]($sp)
62; CHECK:        sw      $6, [[offset2:[0-9]+]]($sp)
63; CHECK:        sw      $7, [[offset3:[0-9]+]]($sp)
64
65; check that .cfi_offset directives are emitted for $a0-$a3.
66; CHECK:        .cfi_offset 4,
67; CHECK:        .cfi_offset 5,
68; CHECK:        .cfi_offset 6,
69; CHECK:        .cfi_offset 7,
70
71; check that stack adjustment and handler are put in $v1 and $v0.
72; CHECK:        move    $3, $4
73; CHECK:        move    $2, $5
74
75; check that $a0-$a3 are restored from stack.
76; CHECK:        lw      $4, [[offset0]]($sp)
77; CHECK:        lw      $5, [[offset1]]($sp)
78; CHECK:        lw      $6, [[offset2]]($sp)
79; CHECK:        lw      $7, [[offset3]]($sp)
80
81; check that stack is adjusted by $v1 and that code returns to address in $v0
82; also check that $25 contains handler value
83; CHECK:        addiu   $sp, $sp, [[spoffset]]
84; CHECK:        move    $25, $2
85; CHECK:        move    $ra, $2
86; NOT-R6:       jr      $ra # <MCInst #{{[0-9]+}} JR
87; R6:           jr      $ra # <MCInst #{{[0-9]+}} JALR
88; CHECK:        addu    $sp, $sp, $3
89}
90