1; RUN: llc -march=mipsel -disable-mips-delay-filler -relocation-model=pic < %s | \ 2; RUN: FileCheck %s -check-prefixes=PIC,CHECK 3; RUN: llc -march=mipsel -relocation-model=static -disable-mips-delay-filler < \ 4; RUN: %s | FileCheck %s -check-prefixes=STATIC,CHECK 5; RUN: llc -march=mipsel -relocation-model=static -disable-mips-delay-filler \ 6; RUN: -mips-fix-global-base-reg=false < %s | \ 7; RUN: FileCheck %s -check-prefixes=STATICGP,CHECK 8 9@t1 = thread_local global i32 0, align 4 10 11define i32 @f1() nounwind { 12entry: 13 %tmp = load i32, i32* @t1, align 4 14 ret i32 %tmp 15 16; PIC-LABEL: f1: 17; PIC-DAG: addu $[[R0:[a-z0-9]+]], $2, $25 18; PIC-DAG: lw $25, %call16(__tls_get_addr)($[[R0]]) 19; PIC-DAG: addiu $4, $[[R0]], %tlsgd(t1) 20; PIC-DAG: jalr $25 21; PIC-DAG: lw $2, 0($2) 22 23; STATIC-LABEL: f1: 24; STATIC: lui $[[R0:[0-9]+]], %tprel_hi(t1) 25; STATIC: addiu $[[R1:[0-9]+]], $[[R0]], %tprel_lo(t1) 26; STATIC: rdhwr $3, $29 27; STATIC: addu $[[R2:[0-9]+]], $3, $[[R1]] 28; STATIC: lw $2, 0($[[R2]]) 29} 30 31 32@t2 = external thread_local global i32 33 34define i32 @f2() nounwind { 35entry: 36 %tmp = load i32, i32* @t2, align 4 37 ret i32 %tmp 38 39; PIC-LABEL: f2: 40; PIC-DAG: addu $[[R0:[a-z0-9]+]], $2, $25 41; PIC-DAG: lw $25, %call16(__tls_get_addr)($[[R0]]) 42; PIC-DAG: addiu $4, $[[R0]], %tlsgd(t2) 43; PIC-DAG: jalr $25 44; PIC-DAG: lw $2, 0($2) 45 46; STATICGP-LABEL: f2: 47; STATICGP: lui $[[R0:[0-9]+]], %hi(__gnu_local_gp) 48; STATICGP: addiu $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp) 49; STATICGP: lw ${{[0-9]+}}, %gottprel(t2)($[[GP]]) 50 51; STATIC-LABEL: f2: 52; STATIC: lui $[[R0:[0-9]+]], %hi(__gnu_local_gp) 53; STATIC: addiu $[[GP:[0-9]+]], $[[R0]], %lo(__gnu_local_gp) 54; STATIC: rdhwr $3, $29 55; STATIC: lw $[[R0:[0-9]+]], %gottprel(t2)($[[GP]]) 56; STATIC: addu $[[R1:[0-9]+]], $3, $[[R0]] 57; STATIC: lw $2, 0($[[R1]]) 58} 59 60@f3.i = internal thread_local unnamed_addr global i32 1, align 4 61 62define i32 @f3() nounwind { 63entry: 64; CHECK-LABEL: f3: 65 66; PIC: addiu $4, ${{[a-z0-9]+}}, %tlsldm(f3.i) 67; PIC: jalr $25 68; PIC: lui $[[R0:[0-9]+]], %dtprel_hi(f3.i) 69; PIC: addu $[[R1:[0-9]+]], $[[R0]], $2 70; PIC: lw ${{[0-9]+}}, %dtprel_lo(f3.i)($[[R1]]) 71 72 %0 = load i32, i32* @f3.i, align 4 73 %inc = add nsw i32 %0, 1 74 store i32 %inc, i32* @f3.i, align 4 75 ret i32 %inc 76} 77 78