1; Test 16-bit byteswaps from memory to registers. 2; 3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s 4 5declare i16 @llvm.bswap.i16(i16 %a) 6 7; Check LRVH with no displacement. 8define i16 @f1(i16 *%src) { 9; CHECK-LABEL: f1: 10; CHECK: lrvh %r2, 0(%r2) 11; CHECK: br %r14 12 %a = load i16 , i16 *%src 13 %swapped = call i16 @llvm.bswap.i16(i16 %a) 14 ret i16 %swapped 15} 16 17; Check the high end of the aligned LRVH range. 18define i16 @f2(i16 *%src) { 19; CHECK-LABEL: f2: 20; CHECK: lrvh %r2, 524286(%r2) 21; CHECK: br %r14 22 %ptr = getelementptr i16, i16 *%src, i64 262143 23 %a = load i16 , i16 *%ptr 24 %swapped = call i16 @llvm.bswap.i16(i16 %a) 25 ret i16 %swapped 26} 27 28; Check the next word up, which needs separate address logic. 29; Other sequences besides this one would be OK. 30define i16 @f3(i16 *%src) { 31; CHECK-LABEL: f3: 32; CHECK: agfi %r2, 524288 33; CHECK: lrvh %r2, 0(%r2) 34; CHECK: br %r14 35 %ptr = getelementptr i16, i16 *%src, i64 262144 36 %a = load i16 , i16 *%ptr 37 %swapped = call i16 @llvm.bswap.i16(i16 %a) 38 ret i16 %swapped 39} 40 41; Check the high end of the negative aligned LRVH range. 42define i16 @f4(i16 *%src) { 43; CHECK-LABEL: f4: 44; CHECK: lrvh %r2, -2(%r2) 45; CHECK: br %r14 46 %ptr = getelementptr i16, i16 *%src, i64 -1 47 %a = load i16 , i16 *%ptr 48 %swapped = call i16 @llvm.bswap.i16(i16 %a) 49 ret i16 %swapped 50} 51 52; Check the low end of the LRVH range. 53define i16 @f5(i16 *%src) { 54; CHECK-LABEL: f5: 55; CHECK: lrvh %r2, -524288(%r2) 56; CHECK: br %r14 57 %ptr = getelementptr i16, i16 *%src, i64 -262144 58 %a = load i16 , i16 *%ptr 59 %swapped = call i16 @llvm.bswap.i16(i16 %a) 60 ret i16 %swapped 61} 62 63; Check the next word down, which needs separate address logic. 64; Other sequences besides this one would be OK. 65define i16 @f6(i16 *%src) { 66; CHECK-LABEL: f6: 67; CHECK: agfi %r2, -524290 68; CHECK: lrvh %r2, 0(%r2) 69; CHECK: br %r14 70 %ptr = getelementptr i16, i16 *%src, i64 -262145 71 %a = load i16 , i16 *%ptr 72 %swapped = call i16 @llvm.bswap.i16(i16 %a) 73 ret i16 %swapped 74} 75 76; Check that LRVH allows an index. 77define i16 @f7(i64 %src, i64 %index) { 78; CHECK-LABEL: f7: 79; CHECK: lrvh %r2, 524287({{%r3,%r2|%r2,%r3}}) 80; CHECK: br %r14 81 %add1 = add i64 %src, %index 82 %add2 = add i64 %add1, 524287 83 %ptr = inttoptr i64 %add2 to i16 * 84 %a = load i16 , i16 *%ptr 85 %swapped = call i16 @llvm.bswap.i16(i16 %a) 86 ret i16 %swapped 87} 88 89; Check that volatile accesses do not use LRVH, which might access the 90; storage multple times. 91define i16 @f8(i16 *%src) { 92; CHECK-LABEL: f8: 93; CHECK: lh [[REG:%r[0-5]]], 0(%r2) 94; CHECK: lrvr %r2, [[REG]] 95; CHECK: br %r14 96 %a = load volatile i16 , i16 *%src 97 %swapped = call i16 @llvm.bswap.i16(i16 %a) 98 ret i16 %swapped 99} 100