1; Test moves between FPRs and GPRs for z13 and above.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
4
5; Check that moves from i32s to floats use a low GR32 and vector operation.
6define float @f1(i16 *%ptr) {
7; CHECK-LABEL: f1:
8; CHECK: llh [[REG:%r[0-5]]], 0(%r2)
9; CHECK: oilh [[REG]], 16256
10; CHECK: vlvgf %v0, [[REG]], 0
11; CHECK: br %r14
12  %base = load i16, i16 *%ptr
13  %ext = zext i16 %base to i32
14  %full = or i32 %ext, 1065353216
15  %res = bitcast i32 %full to float
16  ret float %res
17}
18
19; Check that moves from floats to i32s use a low GR32 and vector operation.
20define void @f2(float %val, i8 *%ptr) {
21; CHECK-LABEL: f2:
22; CHECK: vlgvf [[REG:%r[0-5]]], %v0, 0
23; CHECK: stc [[REG]], 0(%r2)
24; CHECK: br %r14
25  %res = bitcast float %val to i32
26  %trunc = trunc i32 %res to i8
27  store i8 %trunc, i8 *%ptr
28  ret void
29}
30
31; Like f2, but with a conditional store.
32define void @f3(float %val, i8 *%ptr, i32 %which) {
33; CHECK-LABEL: f3:
34; CHECK-DAG: ciblh %r3, 0, 0(%r14)
35; CHECK-DAG: vlgvf [[REG:%r[0-5]]], %v0, 0
36; CHECK: stc [[REG]], 0(%r2)
37; CHECK: br %r14
38  %int = bitcast float %val to i32
39  %trunc = trunc i32 %int to i8
40  %old = load i8, i8 *%ptr
41  %cmp = icmp eq i32 %which, 0
42  %res = select i1 %cmp, i8 %trunc, i8 %old
43  store i8 %res, i8 *%ptr
44  ret void
45}
46
47; ...and again with 16-bit memory.
48define void @f4(float %val, i16 *%ptr, i32 %which) {
49; CHECK-LABEL: f4:
50; CHECK-DAG: ciblh %r3, 0, 0(%r14)
51; CHECK-DAG: vlgvf [[REG:%r[0-5]]], %v0, 0
52; CHECK: sth [[REG]], 0(%r2)
53; CHECK: br %r14
54  %int = bitcast float %val to i32
55  %trunc = trunc i32 %int to i16
56  %old = load i16, i16 *%ptr
57  %cmp = icmp eq i32 %which, 0
58  %res = select i1 %cmp, i16 %trunc, i16 %old
59  store i16 %res, i16 *%ptr
60  ret void
61}
62