1; Test vector intrinsics.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
4
5declare i32 @llvm.s390.lcbb(i8 *, i32)
6declare <16 x i8> @llvm.s390.vlbb(i8 *, i32)
7declare <16 x i8> @llvm.s390.vll(i32, i8 *)
8declare <2 x i64> @llvm.s390.vpdi(<2 x i64>, <2 x i64>, i32)
9declare <16 x i8> @llvm.s390.vperm(<16 x i8>, <16 x i8>, <16 x i8>)
10declare <16 x i8> @llvm.s390.vpksh(<8 x i16>, <8 x i16>)
11declare <8 x i16> @llvm.s390.vpksf(<4 x i32>, <4 x i32>)
12declare <4 x i32> @llvm.s390.vpksg(<2 x i64>, <2 x i64>)
13declare {<16 x i8>, i32} @llvm.s390.vpkshs(<8 x i16>, <8 x i16>)
14declare {<8 x i16>, i32} @llvm.s390.vpksfs(<4 x i32>, <4 x i32>)
15declare {<4 x i32>, i32} @llvm.s390.vpksgs(<2 x i64>, <2 x i64>)
16declare <16 x i8> @llvm.s390.vpklsh(<8 x i16>, <8 x i16>)
17declare <8 x i16> @llvm.s390.vpklsf(<4 x i32>, <4 x i32>)
18declare <4 x i32> @llvm.s390.vpklsg(<2 x i64>, <2 x i64>)
19declare {<16 x i8>, i32} @llvm.s390.vpklshs(<8 x i16>, <8 x i16>)
20declare {<8 x i16>, i32} @llvm.s390.vpklsfs(<4 x i32>, <4 x i32>)
21declare {<4 x i32>, i32} @llvm.s390.vpklsgs(<2 x i64>, <2 x i64>)
22declare void @llvm.s390.vstl(<16 x i8>, i32, i8 *)
23declare <8 x i16> @llvm.s390.vuphb(<16 x i8>)
24declare <4 x i32> @llvm.s390.vuphh(<8 x i16>)
25declare <2 x i64> @llvm.s390.vuphf(<4 x i32>)
26declare <8 x i16> @llvm.s390.vuplhb(<16 x i8>)
27declare <4 x i32> @llvm.s390.vuplhh(<8 x i16>)
28declare <2 x i64> @llvm.s390.vuplhf(<4 x i32>)
29declare <8 x i16> @llvm.s390.vuplb(<16 x i8>)
30declare <4 x i32> @llvm.s390.vuplhw(<8 x i16>)
31declare <2 x i64> @llvm.s390.vuplf(<4 x i32>)
32declare <8 x i16> @llvm.s390.vupllb(<16 x i8>)
33declare <4 x i32> @llvm.s390.vupllh(<8 x i16>)
34declare <2 x i64> @llvm.s390.vupllf(<4 x i32>)
35declare <16 x i8> @llvm.s390.vaccb(<16 x i8>, <16 x i8>)
36declare <8 x i16> @llvm.s390.vacch(<8 x i16>, <8 x i16>)
37declare <4 x i32> @llvm.s390.vaccf(<4 x i32>, <4 x i32>)
38declare <2 x i64> @llvm.s390.vaccg(<2 x i64>, <2 x i64>)
39declare <16 x i8> @llvm.s390.vaq(<16 x i8>, <16 x i8>)
40declare <16 x i8> @llvm.s390.vacq(<16 x i8>, <16 x i8>, <16 x i8>)
41declare <16 x i8> @llvm.s390.vaccq(<16 x i8>, <16 x i8>)
42declare <16 x i8> @llvm.s390.vacccq(<16 x i8>, <16 x i8>, <16 x i8>)
43declare <16 x i8> @llvm.s390.vavgb(<16 x i8>, <16 x i8>)
44declare <8 x i16> @llvm.s390.vavgh(<8 x i16>, <8 x i16>)
45declare <4 x i32> @llvm.s390.vavgf(<4 x i32>, <4 x i32>)
46declare <2 x i64> @llvm.s390.vavgg(<2 x i64>, <2 x i64>)
47declare <16 x i8> @llvm.s390.vavglb(<16 x i8>, <16 x i8>)
48declare <8 x i16> @llvm.s390.vavglh(<8 x i16>, <8 x i16>)
49declare <4 x i32> @llvm.s390.vavglf(<4 x i32>, <4 x i32>)
50declare <2 x i64> @llvm.s390.vavglg(<2 x i64>, <2 x i64>)
51declare <4 x i32> @llvm.s390.vcksm(<4 x i32>, <4 x i32>)
52declare <8 x i16> @llvm.s390.vgfmb(<16 x i8>, <16 x i8>)
53declare <4 x i32> @llvm.s390.vgfmh(<8 x i16>, <8 x i16>)
54declare <2 x i64> @llvm.s390.vgfmf(<4 x i32>, <4 x i32>)
55declare <16 x i8> @llvm.s390.vgfmg(<2 x i64>, <2 x i64>)
56declare <8 x i16> @llvm.s390.vgfmab(<16 x i8>, <16 x i8>, <8 x i16>)
57declare <4 x i32> @llvm.s390.vgfmah(<8 x i16>, <8 x i16>, <4 x i32>)
58declare <2 x i64> @llvm.s390.vgfmaf(<4 x i32>, <4 x i32>, <2 x i64>)
59declare <16 x i8> @llvm.s390.vgfmag(<2 x i64>, <2 x i64>, <16 x i8>)
60declare <16 x i8> @llvm.s390.vmahb(<16 x i8>, <16 x i8>, <16 x i8>)
61declare <8 x i16> @llvm.s390.vmahh(<8 x i16>, <8 x i16>, <8 x i16>)
62declare <4 x i32> @llvm.s390.vmahf(<4 x i32>, <4 x i32>, <4 x i32>)
63declare <16 x i8> @llvm.s390.vmalhb(<16 x i8>, <16 x i8>, <16 x i8>)
64declare <8 x i16> @llvm.s390.vmalhh(<8 x i16>, <8 x i16>, <8 x i16>)
65declare <4 x i32> @llvm.s390.vmalhf(<4 x i32>, <4 x i32>, <4 x i32>)
66declare <8 x i16> @llvm.s390.vmaeb(<16 x i8>, <16 x i8>, <8 x i16>)
67declare <4 x i32> @llvm.s390.vmaeh(<8 x i16>, <8 x i16>, <4 x i32>)
68declare <2 x i64> @llvm.s390.vmaef(<4 x i32>, <4 x i32>, <2 x i64>)
69declare <8 x i16> @llvm.s390.vmaleb(<16 x i8>, <16 x i8>, <8 x i16>)
70declare <4 x i32> @llvm.s390.vmaleh(<8 x i16>, <8 x i16>, <4 x i32>)
71declare <2 x i64> @llvm.s390.vmalef(<4 x i32>, <4 x i32>, <2 x i64>)
72declare <8 x i16> @llvm.s390.vmaob(<16 x i8>, <16 x i8>, <8 x i16>)
73declare <4 x i32> @llvm.s390.vmaoh(<8 x i16>, <8 x i16>, <4 x i32>)
74declare <2 x i64> @llvm.s390.vmaof(<4 x i32>, <4 x i32>, <2 x i64>)
75declare <8 x i16> @llvm.s390.vmalob(<16 x i8>, <16 x i8>, <8 x i16>)
76declare <4 x i32> @llvm.s390.vmaloh(<8 x i16>, <8 x i16>, <4 x i32>)
77declare <2 x i64> @llvm.s390.vmalof(<4 x i32>, <4 x i32>, <2 x i64>)
78declare <16 x i8> @llvm.s390.vmhb(<16 x i8>, <16 x i8>)
79declare <8 x i16> @llvm.s390.vmhh(<8 x i16>, <8 x i16>)
80declare <4 x i32> @llvm.s390.vmhf(<4 x i32>, <4 x i32>)
81declare <16 x i8> @llvm.s390.vmlhb(<16 x i8>, <16 x i8>)
82declare <8 x i16> @llvm.s390.vmlhh(<8 x i16>, <8 x i16>)
83declare <4 x i32> @llvm.s390.vmlhf(<4 x i32>, <4 x i32>)
84declare <8 x i16> @llvm.s390.vmeb(<16 x i8>, <16 x i8>)
85declare <4 x i32> @llvm.s390.vmeh(<8 x i16>, <8 x i16>)
86declare <2 x i64> @llvm.s390.vmef(<4 x i32>, <4 x i32>)
87declare <8 x i16> @llvm.s390.vmleb(<16 x i8>, <16 x i8>)
88declare <4 x i32> @llvm.s390.vmleh(<8 x i16>, <8 x i16>)
89declare <2 x i64> @llvm.s390.vmlef(<4 x i32>, <4 x i32>)
90declare <8 x i16> @llvm.s390.vmob(<16 x i8>, <16 x i8>)
91declare <4 x i32> @llvm.s390.vmoh(<8 x i16>, <8 x i16>)
92declare <2 x i64> @llvm.s390.vmof(<4 x i32>, <4 x i32>)
93declare <8 x i16> @llvm.s390.vmlob(<16 x i8>, <16 x i8>)
94declare <4 x i32> @llvm.s390.vmloh(<8 x i16>, <8 x i16>)
95declare <2 x i64> @llvm.s390.vmlof(<4 x i32>, <4 x i32>)
96declare <16 x i8> @llvm.s390.verllvb(<16 x i8>, <16 x i8>)
97declare <8 x i16> @llvm.s390.verllvh(<8 x i16>, <8 x i16>)
98declare <4 x i32> @llvm.s390.verllvf(<4 x i32>, <4 x i32>)
99declare <2 x i64> @llvm.s390.verllvg(<2 x i64>, <2 x i64>)
100declare <16 x i8> @llvm.s390.verllb(<16 x i8>, i32)
101declare <8 x i16> @llvm.s390.verllh(<8 x i16>, i32)
102declare <4 x i32> @llvm.s390.verllf(<4 x i32>, i32)
103declare <2 x i64> @llvm.s390.verllg(<2 x i64>, i32)
104declare <16 x i8> @llvm.s390.verimb(<16 x i8>, <16 x i8>, <16 x i8>, i32)
105declare <8 x i16> @llvm.s390.verimh(<8 x i16>, <8 x i16>, <8 x i16>, i32)
106declare <4 x i32> @llvm.s390.verimf(<4 x i32>, <4 x i32>, <4 x i32>, i32)
107declare <2 x i64> @llvm.s390.verimg(<2 x i64>, <2 x i64>, <2 x i64>, i32)
108declare <16 x i8> @llvm.s390.vsl(<16 x i8>, <16 x i8>)
109declare <16 x i8> @llvm.s390.vslb(<16 x i8>, <16 x i8>)
110declare <16 x i8> @llvm.s390.vsra(<16 x i8>, <16 x i8>)
111declare <16 x i8> @llvm.s390.vsrab(<16 x i8>, <16 x i8>)
112declare <16 x i8> @llvm.s390.vsrl(<16 x i8>, <16 x i8>)
113declare <16 x i8> @llvm.s390.vsrlb(<16 x i8>, <16 x i8>)
114declare <16 x i8> @llvm.s390.vsldb(<16 x i8>, <16 x i8>, i32)
115declare <16 x i8> @llvm.s390.vscbib(<16 x i8>, <16 x i8>)
116declare <8 x i16> @llvm.s390.vscbih(<8 x i16>, <8 x i16>)
117declare <4 x i32> @llvm.s390.vscbif(<4 x i32>, <4 x i32>)
118declare <2 x i64> @llvm.s390.vscbig(<2 x i64>, <2 x i64>)
119declare <16 x i8> @llvm.s390.vsq(<16 x i8>, <16 x i8>)
120declare <16 x i8> @llvm.s390.vsbiq(<16 x i8>, <16 x i8>, <16 x i8>)
121declare <16 x i8> @llvm.s390.vscbiq(<16 x i8>, <16 x i8>)
122declare <16 x i8> @llvm.s390.vsbcbiq(<16 x i8>, <16 x i8>, <16 x i8>)
123declare <4 x i32> @llvm.s390.vsumb(<16 x i8>, <16 x i8>)
124declare <4 x i32> @llvm.s390.vsumh(<8 x i16>, <8 x i16>)
125declare <2 x i64> @llvm.s390.vsumgh(<8 x i16>, <8 x i16>)
126declare <2 x i64> @llvm.s390.vsumgf(<4 x i32>, <4 x i32>)
127declare <16 x i8> @llvm.s390.vsumqf(<4 x i32>, <4 x i32>)
128declare <16 x i8> @llvm.s390.vsumqg(<2 x i64>, <2 x i64>)
129declare i32 @llvm.s390.vtm(<16 x i8>, <16 x i8>)
130declare {<16 x i8>, i32} @llvm.s390.vceqbs(<16 x i8>, <16 x i8>)
131declare {<8 x i16>, i32} @llvm.s390.vceqhs(<8 x i16>, <8 x i16>)
132declare {<4 x i32>, i32} @llvm.s390.vceqfs(<4 x i32>, <4 x i32>)
133declare {<2 x i64>, i32} @llvm.s390.vceqgs(<2 x i64>, <2 x i64>)
134declare {<16 x i8>, i32} @llvm.s390.vchbs(<16 x i8>, <16 x i8>)
135declare {<8 x i16>, i32} @llvm.s390.vchhs(<8 x i16>, <8 x i16>)
136declare {<4 x i32>, i32} @llvm.s390.vchfs(<4 x i32>, <4 x i32>)
137declare {<2 x i64>, i32} @llvm.s390.vchgs(<2 x i64>, <2 x i64>)
138declare {<16 x i8>, i32} @llvm.s390.vchlbs(<16 x i8>, <16 x i8>)
139declare {<8 x i16>, i32} @llvm.s390.vchlhs(<8 x i16>, <8 x i16>)
140declare {<4 x i32>, i32} @llvm.s390.vchlfs(<4 x i32>, <4 x i32>)
141declare {<2 x i64>, i32} @llvm.s390.vchlgs(<2 x i64>, <2 x i64>)
142declare <16 x i8> @llvm.s390.vfaeb(<16 x i8>, <16 x i8>, i32)
143declare <8 x i16> @llvm.s390.vfaeh(<8 x i16>, <8 x i16>, i32)
144declare <4 x i32> @llvm.s390.vfaef(<4 x i32>, <4 x i32>, i32)
145declare {<16 x i8>, i32} @llvm.s390.vfaebs(<16 x i8>, <16 x i8>, i32)
146declare {<8 x i16>, i32} @llvm.s390.vfaehs(<8 x i16>, <8 x i16>, i32)
147declare {<4 x i32>, i32} @llvm.s390.vfaefs(<4 x i32>, <4 x i32>, i32)
148declare <16 x i8> @llvm.s390.vfaezb(<16 x i8>, <16 x i8>, i32)
149declare <8 x i16> @llvm.s390.vfaezh(<8 x i16>, <8 x i16>, i32)
150declare <4 x i32> @llvm.s390.vfaezf(<4 x i32>, <4 x i32>, i32)
151declare {<16 x i8>, i32} @llvm.s390.vfaezbs(<16 x i8>, <16 x i8>, i32)
152declare {<8 x i16>, i32} @llvm.s390.vfaezhs(<8 x i16>, <8 x i16>, i32)
153declare {<4 x i32>, i32} @llvm.s390.vfaezfs(<4 x i32>, <4 x i32>, i32)
154declare <16 x i8> @llvm.s390.vfeeb(<16 x i8>, <16 x i8>)
155declare <8 x i16> @llvm.s390.vfeeh(<8 x i16>, <8 x i16>)
156declare <4 x i32> @llvm.s390.vfeef(<4 x i32>, <4 x i32>)
157declare {<16 x i8>, i32} @llvm.s390.vfeebs(<16 x i8>, <16 x i8>)
158declare {<8 x i16>, i32} @llvm.s390.vfeehs(<8 x i16>, <8 x i16>)
159declare {<4 x i32>, i32} @llvm.s390.vfeefs(<4 x i32>, <4 x i32>)
160declare <16 x i8> @llvm.s390.vfeezb(<16 x i8>, <16 x i8>)
161declare <8 x i16> @llvm.s390.vfeezh(<8 x i16>, <8 x i16>)
162declare <4 x i32> @llvm.s390.vfeezf(<4 x i32>, <4 x i32>)
163declare {<16 x i8>, i32} @llvm.s390.vfeezbs(<16 x i8>, <16 x i8>)
164declare {<8 x i16>, i32} @llvm.s390.vfeezhs(<8 x i16>, <8 x i16>)
165declare {<4 x i32>, i32} @llvm.s390.vfeezfs(<4 x i32>, <4 x i32>)
166declare <16 x i8> @llvm.s390.vfeneb(<16 x i8>, <16 x i8>)
167declare <8 x i16> @llvm.s390.vfeneh(<8 x i16>, <8 x i16>)
168declare <4 x i32> @llvm.s390.vfenef(<4 x i32>, <4 x i32>)
169declare {<16 x i8>, i32} @llvm.s390.vfenebs(<16 x i8>, <16 x i8>)
170declare {<8 x i16>, i32} @llvm.s390.vfenehs(<8 x i16>, <8 x i16>)
171declare {<4 x i32>, i32} @llvm.s390.vfenefs(<4 x i32>, <4 x i32>)
172declare <16 x i8> @llvm.s390.vfenezb(<16 x i8>, <16 x i8>)
173declare <8 x i16> @llvm.s390.vfenezh(<8 x i16>, <8 x i16>)
174declare <4 x i32> @llvm.s390.vfenezf(<4 x i32>, <4 x i32>)
175declare {<16 x i8>, i32} @llvm.s390.vfenezbs(<16 x i8>, <16 x i8>)
176declare {<8 x i16>, i32} @llvm.s390.vfenezhs(<8 x i16>, <8 x i16>)
177declare {<4 x i32>, i32} @llvm.s390.vfenezfs(<4 x i32>, <4 x i32>)
178declare <16 x i8> @llvm.s390.vistrb(<16 x i8>)
179declare <8 x i16> @llvm.s390.vistrh(<8 x i16>)
180declare <4 x i32> @llvm.s390.vistrf(<4 x i32>)
181declare {<16 x i8>, i32} @llvm.s390.vistrbs(<16 x i8>)
182declare {<8 x i16>, i32} @llvm.s390.vistrhs(<8 x i16>)
183declare {<4 x i32>, i32} @llvm.s390.vistrfs(<4 x i32>)
184declare <16 x i8> @llvm.s390.vstrcb(<16 x i8>, <16 x i8>, <16 x i8>, i32)
185declare <8 x i16> @llvm.s390.vstrch(<8 x i16>, <8 x i16>, <8 x i16>, i32)
186declare <4 x i32> @llvm.s390.vstrcf(<4 x i32>, <4 x i32>, <4 x i32>, i32)
187declare {<16 x i8>, i32} @llvm.s390.vstrcbs(<16 x i8>, <16 x i8>, <16 x i8>,
188                                            i32)
189declare {<8 x i16>, i32} @llvm.s390.vstrchs(<8 x i16>, <8 x i16>, <8 x i16>,
190                                            i32)
191declare {<4 x i32>, i32} @llvm.s390.vstrcfs(<4 x i32>, <4 x i32>, <4 x i32>,
192                                            i32)
193declare <16 x i8> @llvm.s390.vstrczb(<16 x i8>, <16 x i8>, <16 x i8>, i32)
194declare <8 x i16> @llvm.s390.vstrczh(<8 x i16>, <8 x i16>, <8 x i16>, i32)
195declare <4 x i32> @llvm.s390.vstrczf(<4 x i32>, <4 x i32>, <4 x i32>, i32)
196declare {<16 x i8>, i32} @llvm.s390.vstrczbs(<16 x i8>, <16 x i8>, <16 x i8>,
197                                             i32)
198declare {<8 x i16>, i32} @llvm.s390.vstrczhs(<8 x i16>, <8 x i16>, <8 x i16>,
199                                             i32)
200declare {<4 x i32>, i32} @llvm.s390.vstrczfs(<4 x i32>, <4 x i32>, <4 x i32>,
201                                             i32)
202declare {<2 x i64>, i32} @llvm.s390.vfcedbs(<2 x double>, <2 x double>)
203declare {<2 x i64>, i32} @llvm.s390.vfchdbs(<2 x double>, <2 x double>)
204declare {<2 x i64>, i32} @llvm.s390.vfchedbs(<2 x double>, <2 x double>)
205declare {<2 x i64>, i32} @llvm.s390.vftcidb(<2 x double>, i32)
206declare <2 x double> @llvm.s390.vfidb(<2 x double>, i32, i32)
207
208; LCBB with the lowest M3 operand.
209define i32 @test_lcbb1(i8 *%ptr) {
210; CHECK-LABEL: test_lcbb1:
211; CHECK: lcbb %r2, 0(%r2), 0
212; CHECK: br %r14
213  %res = call i32 @llvm.s390.lcbb(i8 *%ptr, i32 0)
214  ret i32 %res
215}
216
217; LCBB with the highest M3 operand.
218define i32 @test_lcbb2(i8 *%ptr) {
219; CHECK-LABEL: test_lcbb2:
220; CHECK: lcbb %r2, 0(%r2), 15
221; CHECK: br %r14
222  %res = call i32 @llvm.s390.lcbb(i8 *%ptr, i32 15)
223  ret i32 %res
224}
225
226; LCBB with a displacement and index.
227define i32 @test_lcbb3(i8 *%base, i64 %index) {
228; CHECK-LABEL: test_lcbb3:
229; CHECK: lcbb %r2, 4095({{%r2,%r3|%r3,%r2}}), 4
230; CHECK: br %r14
231  %add = add i64 %index, 4095
232  %ptr = getelementptr i8, i8 *%base, i64 %add
233  %res = call i32 @llvm.s390.lcbb(i8 *%ptr, i32 4)
234  ret i32 %res
235}
236
237; LCBB with an out-of-range displacement.
238define i32 @test_lcbb4(i8 *%base) {
239; CHECK-LABEL: test_lcbb4:
240; CHECK: lcbb %r2, 0({{%r[1-5]}}), 5
241; CHECK: br %r14
242  %ptr = getelementptr i8, i8 *%base, i64 4096
243  %res = call i32 @llvm.s390.lcbb(i8 *%ptr, i32 5)
244  ret i32 %res
245}
246
247; VLBB with the lowest M3 operand.
248define <16 x i8> @test_vlbb1(i8 *%ptr) {
249; CHECK-LABEL: test_vlbb1:
250; CHECK: vlbb %v24, 0(%r2), 0
251; CHECK: br %r14
252  %res = call <16 x i8> @llvm.s390.vlbb(i8 *%ptr, i32 0)
253  ret <16 x i8> %res
254}
255
256; VLBB with the highest M3 operand.
257define <16 x i8> @test_vlbb2(i8 *%ptr) {
258; CHECK-LABEL: test_vlbb2:
259; CHECK: vlbb %v24, 0(%r2), 15
260; CHECK: br %r14
261  %res = call <16 x i8> @llvm.s390.vlbb(i8 *%ptr, i32 15)
262  ret <16 x i8> %res
263}
264
265; VLBB with a displacement and index.
266define <16 x i8> @test_vlbb3(i8 *%base, i64 %index) {
267; CHECK-LABEL: test_vlbb3:
268; CHECK: vlbb %v24, 4095({{%r2,%r3|%r3,%r2}}), 4
269; CHECK: br %r14
270  %add = add i64 %index, 4095
271  %ptr = getelementptr i8, i8 *%base, i64 %add
272  %res = call <16 x i8> @llvm.s390.vlbb(i8 *%ptr, i32 4)
273  ret <16 x i8> %res
274}
275
276; VLBB with an out-of-range displacement.
277define <16 x i8> @test_vlbb4(i8 *%base) {
278; CHECK-LABEL: test_vlbb4:
279; CHECK: vlbb %v24, 0({{%r[1-5]}}), 5
280; CHECK: br %r14
281  %ptr = getelementptr i8, i8 *%base, i64 4096
282  %res = call <16 x i8> @llvm.s390.vlbb(i8 *%ptr, i32 5)
283  ret <16 x i8> %res
284}
285
286; VLL with the lowest in-range displacement.
287define <16 x i8> @test_vll1(i8 *%ptr, i32 %length) {
288; CHECK-LABEL: test_vll1:
289; CHECK: vll %v24, %r3, 0(%r2)
290; CHECK: br %r14
291  %res = call <16 x i8> @llvm.s390.vll(i32 %length, i8 *%ptr)
292  ret <16 x i8> %res
293}
294
295; VLL with the highest in-range displacement.
296define <16 x i8> @test_vll2(i8 *%base, i32 %length) {
297; CHECK-LABEL: test_vll2:
298; CHECK: vll %v24, %r3, 4095(%r2)
299; CHECK: br %r14
300  %ptr = getelementptr i8, i8 *%base, i64 4095
301  %res = call <16 x i8> @llvm.s390.vll(i32 %length, i8 *%ptr)
302  ret <16 x i8> %res
303}
304
305; VLL with an out-of-range displacementa.
306define <16 x i8> @test_vll3(i8 *%base, i32 %length) {
307; CHECK-LABEL: test_vll3:
308; CHECK: vll %v24, %r3, 0({{%r[1-5]}})
309; CHECK: br %r14
310  %ptr = getelementptr i8, i8 *%base, i64 4096
311  %res = call <16 x i8> @llvm.s390.vll(i32 %length, i8 *%ptr)
312  ret <16 x i8> %res
313}
314
315; Check that VLL doesn't allow an index.
316define <16 x i8> @test_vll4(i8 *%base, i64 %index, i32 %length) {
317; CHECK-LABEL: test_vll4:
318; CHECK: vll %v24, %r4, 0({{%r[1-5]}})
319; CHECK: br %r14
320  %ptr = getelementptr i8, i8 *%base, i64 %index
321  %res = call <16 x i8> @llvm.s390.vll(i32 %length, i8 *%ptr)
322  ret <16 x i8> %res
323}
324
325; VPDI taking element 0 from each half.
326define <2 x i64> @test_vpdi1(<2 x i64> %a, <2 x i64> %b) {
327; CHECK-LABEL: test_vpdi1:
328; CHECK: vpdi %v24, %v24, %v26, 0
329; CHECK: br %r14
330  %res = call <2 x i64> @llvm.s390.vpdi(<2 x i64> %a, <2 x i64> %b, i32 0)
331  ret <2 x i64> %res
332}
333
334; VPDI taking element 1 from each half.
335define <2 x i64> @test_vpdi2(<2 x i64> %a, <2 x i64> %b) {
336; CHECK-LABEL: test_vpdi2:
337; CHECK: vpdi %v24, %v24, %v26, 10
338; CHECK: br %r14
339  %res = call <2 x i64> @llvm.s390.vpdi(<2 x i64> %a, <2 x i64> %b, i32 10)
340  ret <2 x i64> %res
341}
342
343; VPERM.
344define <16 x i8> @test_vperm(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
345; CHECK-LABEL: test_vperm:
346; CHECK: vperm %v24, %v24, %v26, %v28
347; CHECK: br %r14
348  %res = call <16 x i8> @llvm.s390.vperm(<16 x i8> %a, <16 x i8> %b,
349                                         <16 x i8> %c)
350  ret <16 x i8> %res
351}
352
353; VPKSH.
354define <16 x i8> @test_vpksh(<8 x i16> %a, <8 x i16> %b) {
355; CHECK-LABEL: test_vpksh:
356; CHECK: vpksh %v24, %v24, %v26
357; CHECK: br %r14
358  %res = call <16 x i8> @llvm.s390.vpksh(<8 x i16> %a, <8 x i16> %b)
359  ret <16 x i8> %res
360}
361
362; VPKSF.
363define <8 x i16> @test_vpksf(<4 x i32> %a, <4 x i32> %b) {
364; CHECK-LABEL: test_vpksf:
365; CHECK: vpksf %v24, %v24, %v26
366; CHECK: br %r14
367  %res = call <8 x i16> @llvm.s390.vpksf(<4 x i32> %a, <4 x i32> %b)
368  ret <8 x i16> %res
369}
370
371; VPKSG.
372define <4 x i32> @test_vpksg(<2 x i64> %a, <2 x i64> %b) {
373; CHECK-LABEL: test_vpksg:
374; CHECK: vpksg %v24, %v24, %v26
375; CHECK: br %r14
376  %res = call <4 x i32> @llvm.s390.vpksg(<2 x i64> %a, <2 x i64> %b)
377  ret <4 x i32> %res
378}
379
380; VPKSHS with no processing of the result.
381define <16 x i8> @test_vpkshs(<8 x i16> %a, <8 x i16> %b, i32 *%ccptr) {
382; CHECK-LABEL: test_vpkshs:
383; CHECK: vpkshs %v24, %v24, %v26
384; CHECK: ipm [[REG:%r[0-5]]]
385; CHECK: srl [[REG]], 28
386; CHECK: st [[REG]], 0(%r2)
387; CHECK: br %r14
388  %call = call {<16 x i8>, i32} @llvm.s390.vpkshs(<8 x i16> %a, <8 x i16> %b)
389  %res = extractvalue {<16 x i8>, i32} %call, 0
390  %cc = extractvalue {<16 x i8>, i32} %call, 1
391  store i32 %cc, i32 *%ccptr
392  ret <16 x i8> %res
393}
394
395; VPKSHS, storing to %ptr if all values were saturated.
396define <16 x i8> @test_vpkshs_all_store(<8 x i16> %a, <8 x i16> %b, i32 *%ptr) {
397; CHECK-LABEL: test_vpkshs_all_store:
398; CHECK: vpkshs %v24, %v24, %v26
399; CHECK-NEXT: {{bnor|bler}} %r14
400; CHECK: mvhi 0(%r2), 0
401; CHECK: br %r14
402  %call = call {<16 x i8>, i32} @llvm.s390.vpkshs(<8 x i16> %a, <8 x i16> %b)
403  %res = extractvalue {<16 x i8>, i32} %call, 0
404  %cc = extractvalue {<16 x i8>, i32} %call, 1
405  %cmp = icmp uge i32 %cc, 3
406  br i1 %cmp, label %store, label %exit
407
408store:
409  store i32 0, i32 *%ptr
410  br label %exit
411
412exit:
413  ret <16 x i8> %res
414}
415
416; VPKSFS with no processing of the result.
417define <8 x i16> @test_vpksfs(<4 x i32> %a, <4 x i32> %b, i32 *%ccptr) {
418; CHECK-LABEL: test_vpksfs:
419; CHECK: vpksfs %v24, %v24, %v26
420; CHECK: ipm [[REG:%r[0-5]]]
421; CHECK: srl [[REG]], 28
422; CHECK: st [[REG]], 0(%r2)
423; CHECK: br %r14
424  %call = call {<8 x i16>, i32} @llvm.s390.vpksfs(<4 x i32> %a, <4 x i32> %b)
425  %res = extractvalue {<8 x i16>, i32} %call, 0
426  %cc = extractvalue {<8 x i16>, i32} %call, 1
427  store i32 %cc, i32 *%ccptr
428  ret <8 x i16> %res
429}
430
431; VPKSFS, storing to %ptr if any values were saturated.
432define <8 x i16> @test_vpksfs_any_store(<4 x i32> %a, <4 x i32> %b, i32 *%ptr) {
433; CHECK-LABEL: test_vpksfs_any_store:
434; CHECK: vpksfs %v24, %v24, %v26
435; CHECK-NEXT: {{bher|ber}} %r14
436; CHECK: mvhi 0(%r2), 0
437; CHECK: br %r14
438  %call = call {<8 x i16>, i32} @llvm.s390.vpksfs(<4 x i32> %a, <4 x i32> %b)
439  %res = extractvalue {<8 x i16>, i32} %call, 0
440  %cc = extractvalue {<8 x i16>, i32} %call, 1
441  %cmp = icmp ugt i32 %cc, 0
442  br i1 %cmp, label %store, label %exit
443
444store:
445  store i32 0, i32 *%ptr
446  br label %exit
447
448exit:
449  ret <8 x i16> %res
450}
451
452; VPKSGS with no processing of the result.
453define <4 x i32> @test_vpksgs(<2 x i64> %a, <2 x i64> %b, i32 *%ccptr) {
454; CHECK-LABEL: test_vpksgs:
455; CHECK: vpksgs %v24, %v24, %v26
456; CHECK: ipm [[REG:%r[0-5]]]
457; CHECK: srl [[REG]], 28
458; CHECK: st [[REG]], 0(%r2)
459; CHECK: br %r14
460  %call = call {<4 x i32>, i32} @llvm.s390.vpksgs(<2 x i64> %a, <2 x i64> %b)
461  %res = extractvalue {<4 x i32>, i32} %call, 0
462  %cc = extractvalue {<4 x i32>, i32} %call, 1
463  store i32 %cc, i32 *%ccptr
464  ret <4 x i32> %res
465}
466
467; VPKSGS, storing to %ptr if no elements were saturated
468define <4 x i32> @test_vpksgs_none_store(<2 x i64> %a, <2 x i64> %b,
469                                         i32 *%ptr) {
470; CHECK-LABEL: test_vpksgs_none_store:
471; CHECK: vpksgs %v24, %v24, %v26
472; CHECK-NEXT: {{bnher|bner}} %r14
473; CHECK: mvhi 0(%r2), 0
474; CHECK: br %r14
475  %call = call {<4 x i32>, i32} @llvm.s390.vpksgs(<2 x i64> %a, <2 x i64> %b)
476  %res = extractvalue {<4 x i32>, i32} %call, 0
477  %cc = extractvalue {<4 x i32>, i32} %call, 1
478  %cmp = icmp sle i32 %cc, 0
479  br i1 %cmp, label %store, label %exit
480
481store:
482  store i32 0, i32 *%ptr
483  br label %exit
484
485exit:
486  ret <4 x i32> %res
487}
488
489; VPKLSH.
490define <16 x i8> @test_vpklsh(<8 x i16> %a, <8 x i16> %b) {
491; CHECK-LABEL: test_vpklsh:
492; CHECK: vpklsh %v24, %v24, %v26
493; CHECK: br %r14
494  %res = call <16 x i8> @llvm.s390.vpklsh(<8 x i16> %a, <8 x i16> %b)
495  ret <16 x i8> %res
496}
497
498; VPKLSF.
499define <8 x i16> @test_vpklsf(<4 x i32> %a, <4 x i32> %b) {
500; CHECK-LABEL: test_vpklsf:
501; CHECK: vpklsf %v24, %v24, %v26
502; CHECK: br %r14
503  %res = call <8 x i16> @llvm.s390.vpklsf(<4 x i32> %a, <4 x i32> %b)
504  ret <8 x i16> %res
505}
506
507; VPKLSG.
508define <4 x i32> @test_vpklsg(<2 x i64> %a, <2 x i64> %b) {
509; CHECK-LABEL: test_vpklsg:
510; CHECK: vpklsg %v24, %v24, %v26
511; CHECK: br %r14
512  %res = call <4 x i32> @llvm.s390.vpklsg(<2 x i64> %a, <2 x i64> %b)
513  ret <4 x i32> %res
514}
515
516; VPKLSHS with no processing of the result.
517define <16 x i8> @test_vpklshs(<8 x i16> %a, <8 x i16> %b, i32 *%ccptr) {
518; CHECK-LABEL: test_vpklshs:
519; CHECK: vpklshs %v24, %v24, %v26
520; CHECK: ipm [[REG:%r[0-5]]]
521; CHECK: srl [[REG]], 28
522; CHECK: st [[REG]], 0(%r2)
523; CHECK: br %r14
524  %call = call {<16 x i8>, i32} @llvm.s390.vpklshs(<8 x i16> %a, <8 x i16> %b)
525  %res = extractvalue {<16 x i8>, i32} %call, 0
526  %cc = extractvalue {<16 x i8>, i32} %call, 1
527  store i32 %cc, i32 *%ccptr
528  ret <16 x i8> %res
529}
530
531; VPKLSHS, storing to %ptr if all values were saturated.
532define <16 x i8> @test_vpklshs_all_store(<8 x i16> %a, <8 x i16> %b,
533                                         i32 *%ptr) {
534; CHECK-LABEL: test_vpklshs_all_store:
535; CHECK: vpklshs %v24, %v24, %v26
536; CHECK-NEXT: {{bnor|bler}} %r14
537; CHECK: mvhi 0(%r2), 0
538; CHECK: br %r14
539  %call = call {<16 x i8>, i32} @llvm.s390.vpklshs(<8 x i16> %a, <8 x i16> %b)
540  %res = extractvalue {<16 x i8>, i32} %call, 0
541  %cc = extractvalue {<16 x i8>, i32} %call, 1
542  %cmp = icmp eq i32 %cc, 3
543  br i1 %cmp, label %store, label %exit
544
545store:
546  store i32 0, i32 *%ptr
547  br label %exit
548
549exit:
550  ret <16 x i8> %res
551}
552
553; VPKLSFS with no processing of the result.
554define <8 x i16> @test_vpklsfs(<4 x i32> %a, <4 x i32> %b, i32 *%ccptr) {
555; CHECK-LABEL: test_vpklsfs:
556; CHECK: vpklsfs %v24, %v24, %v26
557; CHECK: ipm [[REG:%r[0-5]]]
558; CHECK: srl [[REG]], 28
559; CHECK: st [[REG]], 0(%r2)
560; CHECK: br %r14
561  %call = call {<8 x i16>, i32} @llvm.s390.vpklsfs(<4 x i32> %a, <4 x i32> %b)
562  %res = extractvalue {<8 x i16>, i32} %call, 0
563  %cc = extractvalue {<8 x i16>, i32} %call, 1
564  store i32 %cc, i32 *%ccptr
565  ret <8 x i16> %res
566}
567
568; VPKLSFS, storing to %ptr if any values were saturated.
569define <8 x i16> @test_vpklsfs_any_store(<4 x i32> %a, <4 x i32> %b,
570                                         i32 *%ptr) {
571; CHECK-LABEL: test_vpklsfs_any_store:
572; CHECK: vpklsfs %v24, %v24, %v26
573; CHECK-NEXT: {{bher|ber}} %r14
574; CHECK: mvhi 0(%r2), 0
575; CHECK: br %r14
576  %call = call {<8 x i16>, i32} @llvm.s390.vpklsfs(<4 x i32> %a, <4 x i32> %b)
577  %res = extractvalue {<8 x i16>, i32} %call, 0
578  %cc = extractvalue {<8 x i16>, i32} %call, 1
579  %cmp = icmp ne i32 %cc, 0
580  br i1 %cmp, label %store, label %exit
581
582store:
583  store i32 0, i32 *%ptr
584  br label %exit
585
586exit:
587  ret <8 x i16> %res
588}
589
590; VPKLSGS with no processing of the result.
591define <4 x i32> @test_vpklsgs(<2 x i64> %a, <2 x i64> %b, i32 *%ccptr) {
592; CHECK-LABEL: test_vpklsgs:
593; CHECK: vpklsgs %v24, %v24, %v26
594; CHECK: ipm [[REG:%r[0-5]]]
595; CHECK: srl [[REG]], 28
596; CHECK: st [[REG]], 0(%r2)
597; CHECK: br %r14
598  %call = call {<4 x i32>, i32} @llvm.s390.vpklsgs(<2 x i64> %a, <2 x i64> %b)
599  %res = extractvalue {<4 x i32>, i32} %call, 0
600  %cc = extractvalue {<4 x i32>, i32} %call, 1
601  store i32 %cc, i32 *%ccptr
602  ret <4 x i32> %res
603}
604
605; VPKLSGS, storing to %ptr if no elements were saturated
606define <4 x i32> @test_vpklsgs_none_store(<2 x i64> %a, <2 x i64> %b,
607                                          i32 *%ptr) {
608; CHECK-LABEL: test_vpklsgs_none_store:
609; CHECK: vpklsgs %v24, %v24, %v26
610; CHECK-NEXT: {{bnher|bner}} %r14
611; CHECK: mvhi 0(%r2), 0
612; CHECK: br %r14
613  %call = call {<4 x i32>, i32} @llvm.s390.vpklsgs(<2 x i64> %a, <2 x i64> %b)
614  %res = extractvalue {<4 x i32>, i32} %call, 0
615  %cc = extractvalue {<4 x i32>, i32} %call, 1
616  %cmp = icmp eq i32 %cc, 0
617  br i1 %cmp, label %store, label %exit
618
619store:
620  store i32 0, i32 *%ptr
621  br label %exit
622
623exit:
624  ret <4 x i32> %res
625}
626
627; VSTL with the lowest in-range displacement.
628define void @test_vstl1(<16 x i8> %vec, i8 *%ptr, i32 %length) {
629; CHECK-LABEL: test_vstl1:
630; CHECK: vstl %v24, %r3, 0(%r2)
631; CHECK: br %r14
632  call void @llvm.s390.vstl(<16 x i8> %vec, i32 %length, i8 *%ptr)
633  ret void
634}
635
636; VSTL with the highest in-range displacement.
637define void @test_vstl2(<16 x i8> %vec, i8 *%base, i32 %length) {
638; CHECK-LABEL: test_vstl2:
639; CHECK: vstl %v24, %r3, 4095(%r2)
640; CHECK: br %r14
641  %ptr = getelementptr i8, i8 *%base, i64 4095
642  call void @llvm.s390.vstl(<16 x i8> %vec, i32 %length, i8 *%ptr)
643  ret void
644}
645
646; VSTL with an out-of-range displacement.
647define void @test_vstl3(<16 x i8> %vec, i8 *%base, i32 %length) {
648; CHECK-LABEL: test_vstl3:
649; CHECK: vstl %v24, %r3, 0({{%r[1-5]}})
650; CHECK: br %r14
651  %ptr = getelementptr i8, i8 *%base, i64 4096
652  call void @llvm.s390.vstl(<16 x i8> %vec, i32 %length, i8 *%ptr)
653  ret void
654}
655
656; Check that VSTL doesn't allow an index.
657define void @test_vstl4(<16 x i8> %vec, i8 *%base, i64 %index, i32 %length) {
658; CHECK-LABEL: test_vstl4:
659; CHECK: vstl %v24, %r4, 0({{%r[1-5]}})
660; CHECK: br %r14
661  %ptr = getelementptr i8, i8 *%base, i64 %index
662  call void @llvm.s390.vstl(<16 x i8> %vec, i32 %length, i8 *%ptr)
663  ret void
664}
665
666; VUPHB.
667define <8 x i16> @test_vuphb(<16 x i8> %a) {
668; CHECK-LABEL: test_vuphb:
669; CHECK: vuphb %v24, %v24
670; CHECK: br %r14
671  %res = call <8 x i16> @llvm.s390.vuphb(<16 x i8> %a)
672  ret <8 x i16> %res
673}
674
675; VUPHH.
676define <4 x i32> @test_vuphh(<8 x i16> %a) {
677; CHECK-LABEL: test_vuphh:
678; CHECK: vuphh %v24, %v24
679; CHECK: br %r14
680  %res = call <4 x i32> @llvm.s390.vuphh(<8 x i16> %a)
681  ret <4 x i32> %res
682}
683
684; VUPHF.
685define <2 x i64> @test_vuphf(<4 x i32> %a) {
686; CHECK-LABEL: test_vuphf:
687; CHECK: vuphf %v24, %v24
688; CHECK: br %r14
689  %res = call <2 x i64> @llvm.s390.vuphf(<4 x i32> %a)
690  ret <2 x i64> %res
691}
692
693; VUPLHB.
694define <8 x i16> @test_vuplhb(<16 x i8> %a) {
695; CHECK-LABEL: test_vuplhb:
696; CHECK: vuplhb %v24, %v24
697; CHECK: br %r14
698  %res = call <8 x i16> @llvm.s390.vuplhb(<16 x i8> %a)
699  ret <8 x i16> %res
700}
701
702; VUPLHH.
703define <4 x i32> @test_vuplhh(<8 x i16> %a) {
704; CHECK-LABEL: test_vuplhh:
705; CHECK: vuplhh %v24, %v24
706; CHECK: br %r14
707  %res = call <4 x i32> @llvm.s390.vuplhh(<8 x i16> %a)
708  ret <4 x i32> %res
709}
710
711; VUPLHF.
712define <2 x i64> @test_vuplhf(<4 x i32> %a) {
713; CHECK-LABEL: test_vuplhf:
714; CHECK: vuplhf %v24, %v24
715; CHECK: br %r14
716  %res = call <2 x i64> @llvm.s390.vuplhf(<4 x i32> %a)
717  ret <2 x i64> %res
718}
719
720; VUPLB.
721define <8 x i16> @test_vuplb(<16 x i8> %a) {
722; CHECK-LABEL: test_vuplb:
723; CHECK: vuplb %v24, %v24
724; CHECK: br %r14
725  %res = call <8 x i16> @llvm.s390.vuplb(<16 x i8> %a)
726  ret <8 x i16> %res
727}
728
729; VUPLHW.
730define <4 x i32> @test_vuplhw(<8 x i16> %a) {
731; CHECK-LABEL: test_vuplhw:
732; CHECK: vuplhw %v24, %v24
733; CHECK: br %r14
734  %res = call <4 x i32> @llvm.s390.vuplhw(<8 x i16> %a)
735  ret <4 x i32> %res
736}
737
738; VUPLF.
739define <2 x i64> @test_vuplf(<4 x i32> %a) {
740; CHECK-LABEL: test_vuplf:
741; CHECK: vuplf %v24, %v24
742; CHECK: br %r14
743  %res = call <2 x i64> @llvm.s390.vuplf(<4 x i32> %a)
744  ret <2 x i64> %res
745}
746
747; VUPLLB.
748define <8 x i16> @test_vupllb(<16 x i8> %a) {
749; CHECK-LABEL: test_vupllb:
750; CHECK: vupllb %v24, %v24
751; CHECK: br %r14
752  %res = call <8 x i16> @llvm.s390.vupllb(<16 x i8> %a)
753  ret <8 x i16> %res
754}
755
756; VUPLLH.
757define <4 x i32> @test_vupllh(<8 x i16> %a) {
758; CHECK-LABEL: test_vupllh:
759; CHECK: vupllh %v24, %v24
760; CHECK: br %r14
761  %res = call <4 x i32> @llvm.s390.vupllh(<8 x i16> %a)
762  ret <4 x i32> %res
763}
764
765; VUPLLF.
766define <2 x i64> @test_vupllf(<4 x i32> %a) {
767; CHECK-LABEL: test_vupllf:
768; CHECK: vupllf %v24, %v24
769; CHECK: br %r14
770  %res = call <2 x i64> @llvm.s390.vupllf(<4 x i32> %a)
771  ret <2 x i64> %res
772}
773
774; VACCB.
775define <16 x i8> @test_vaccb(<16 x i8> %a, <16 x i8> %b) {
776; CHECK-LABEL: test_vaccb:
777; CHECK: vaccb %v24, %v24, %v26
778; CHECK: br %r14
779  %res = call <16 x i8> @llvm.s390.vaccb(<16 x i8> %a, <16 x i8> %b)
780  ret <16 x i8> %res
781}
782
783; VACCH.
784define <8 x i16> @test_vacch(<8 x i16> %a, <8 x i16> %b) {
785; CHECK-LABEL: test_vacch:
786; CHECK: vacch %v24, %v24, %v26
787; CHECK: br %r14
788  %res = call <8 x i16> @llvm.s390.vacch(<8 x i16> %a, <8 x i16> %b)
789  ret <8 x i16> %res
790}
791
792; VACCF.
793define <4 x i32> @test_vaccf(<4 x i32> %a, <4 x i32> %b) {
794; CHECK-LABEL: test_vaccf:
795; CHECK: vaccf %v24, %v24, %v26
796; CHECK: br %r14
797  %res = call <4 x i32> @llvm.s390.vaccf(<4 x i32> %a, <4 x i32> %b)
798  ret <4 x i32> %res
799}
800
801; VACCG.
802define <2 x i64> @test_vaccg(<2 x i64> %a, <2 x i64> %b) {
803; CHECK-LABEL: test_vaccg:
804; CHECK: vaccg %v24, %v24, %v26
805; CHECK: br %r14
806  %res = call <2 x i64> @llvm.s390.vaccg(<2 x i64> %a, <2 x i64> %b)
807  ret <2 x i64> %res
808}
809
810; VAQ.
811define <16 x i8> @test_vaq(<16 x i8> %a, <16 x i8> %b) {
812; CHECK-LABEL: test_vaq:
813; CHECK: vaq %v24, %v24, %v26
814; CHECK: br %r14
815  %res = call <16 x i8> @llvm.s390.vaq(<16 x i8> %a, <16 x i8> %b)
816  ret <16 x i8> %res
817}
818
819; VACQ.
820define <16 x i8> @test_vacq(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
821; CHECK-LABEL: test_vacq:
822; CHECK: vacq %v24, %v24, %v26, %v28
823; CHECK: br %r14
824  %res = call <16 x i8> @llvm.s390.vacq(<16 x i8> %a, <16 x i8> %b,
825                                        <16 x i8> %c)
826  ret <16 x i8> %res
827}
828
829; VACCQ.
830define <16 x i8> @test_vaccq(<16 x i8> %a, <16 x i8> %b) {
831; CHECK-LABEL: test_vaccq:
832; CHECK: vaccq %v24, %v24, %v26
833; CHECK: br %r14
834  %res = call <16 x i8> @llvm.s390.vaccq(<16 x i8> %a, <16 x i8> %b)
835  ret <16 x i8> %res
836}
837
838; VACCCQ.
839define <16 x i8> @test_vacccq(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
840; CHECK-LABEL: test_vacccq:
841; CHECK: vacccq %v24, %v24, %v26, %v28
842; CHECK: br %r14
843  %res = call <16 x i8> @llvm.s390.vacccq(<16 x i8> %a, <16 x i8> %b,
844                                          <16 x i8> %c)
845  ret <16 x i8> %res
846}
847
848; VAVGB.
849define <16 x i8> @test_vavgb(<16 x i8> %a, <16 x i8> %b) {
850; CHECK-LABEL: test_vavgb:
851; CHECK: vavgb %v24, %v24, %v26
852; CHECK: br %r14
853  %res = call <16 x i8> @llvm.s390.vavgb(<16 x i8> %a, <16 x i8> %b)
854  ret <16 x i8> %res
855}
856
857; VAVGH.
858define <8 x i16> @test_vavgh(<8 x i16> %a, <8 x i16> %b) {
859; CHECK-LABEL: test_vavgh:
860; CHECK: vavgh %v24, %v24, %v26
861; CHECK: br %r14
862  %res = call <8 x i16> @llvm.s390.vavgh(<8 x i16> %a, <8 x i16> %b)
863  ret <8 x i16> %res
864}
865
866; VAVGF.
867define <4 x i32> @test_vavgf(<4 x i32> %a, <4 x i32> %b) {
868; CHECK-LABEL: test_vavgf:
869; CHECK: vavgf %v24, %v24, %v26
870; CHECK: br %r14
871  %res = call <4 x i32> @llvm.s390.vavgf(<4 x i32> %a, <4 x i32> %b)
872  ret <4 x i32> %res
873}
874
875; VAVGG.
876define <2 x i64> @test_vavgg(<2 x i64> %a, <2 x i64> %b) {
877; CHECK-LABEL: test_vavgg:
878; CHECK: vavgg %v24, %v24, %v26
879; CHECK: br %r14
880  %res = call <2 x i64> @llvm.s390.vavgg(<2 x i64> %a, <2 x i64> %b)
881  ret <2 x i64> %res
882}
883
884; VAVGLB.
885define <16 x i8> @test_vavglb(<16 x i8> %a, <16 x i8> %b) {
886; CHECK-LABEL: test_vavglb:
887; CHECK: vavglb %v24, %v24, %v26
888; CHECK: br %r14
889  %res = call <16 x i8> @llvm.s390.vavglb(<16 x i8> %a, <16 x i8> %b)
890  ret <16 x i8> %res
891}
892
893; VAVGLH.
894define <8 x i16> @test_vavglh(<8 x i16> %a, <8 x i16> %b) {
895; CHECK-LABEL: test_vavglh:
896; CHECK: vavglh %v24, %v24, %v26
897; CHECK: br %r14
898  %res = call <8 x i16> @llvm.s390.vavglh(<8 x i16> %a, <8 x i16> %b)
899  ret <8 x i16> %res
900}
901
902; VAVGLF.
903define <4 x i32> @test_vavglf(<4 x i32> %a, <4 x i32> %b) {
904; CHECK-LABEL: test_vavglf:
905; CHECK: vavglf %v24, %v24, %v26
906; CHECK: br %r14
907  %res = call <4 x i32> @llvm.s390.vavglf(<4 x i32> %a, <4 x i32> %b)
908  ret <4 x i32> %res
909}
910
911; VAVGLG.
912define <2 x i64> @test_vavglg(<2 x i64> %a, <2 x i64> %b) {
913; CHECK-LABEL: test_vavglg:
914; CHECK: vavglg %v24, %v24, %v26
915; CHECK: br %r14
916  %res = call <2 x i64> @llvm.s390.vavglg(<2 x i64> %a, <2 x i64> %b)
917  ret <2 x i64> %res
918}
919
920; VCKSM.
921define <4 x i32> @test_vcksm(<4 x i32> %a, <4 x i32> %b) {
922; CHECK-LABEL: test_vcksm:
923; CHECK: vcksm %v24, %v24, %v26
924; CHECK: br %r14
925  %res = call <4 x i32> @llvm.s390.vcksm(<4 x i32> %a, <4 x i32> %b)
926  ret <4 x i32> %res
927}
928
929; VGFMB.
930define <8 x i16> @test_vgfmb(<16 x i8> %a, <16 x i8> %b) {
931; CHECK-LABEL: test_vgfmb:
932; CHECK: vgfmb %v24, %v24, %v26
933; CHECK: br %r14
934  %res = call <8 x i16> @llvm.s390.vgfmb(<16 x i8> %a, <16 x i8> %b)
935  ret <8 x i16> %res
936}
937
938; VGFMH.
939define <4 x i32> @test_vgfmh(<8 x i16> %a, <8 x i16> %b) {
940; CHECK-LABEL: test_vgfmh:
941; CHECK: vgfmh %v24, %v24, %v26
942; CHECK: br %r14
943  %res = call <4 x i32> @llvm.s390.vgfmh(<8 x i16> %a, <8 x i16> %b)
944  ret <4 x i32> %res
945}
946
947; VGFMF.
948define <2 x i64> @test_vgfmf(<4 x i32> %a, <4 x i32> %b) {
949; CHECK-LABEL: test_vgfmf:
950; CHECK: vgfmf %v24, %v24, %v26
951; CHECK: br %r14
952  %res = call <2 x i64> @llvm.s390.vgfmf(<4 x i32> %a, <4 x i32> %b)
953  ret <2 x i64> %res
954}
955
956; VGFMG.
957define <16 x i8> @test_vgfmg(<2 x i64> %a, <2 x i64> %b) {
958; CHECK-LABEL: test_vgfmg:
959; CHECK: vgfmg %v24, %v24, %v26
960; CHECK: br %r14
961  %res = call <16 x i8> @llvm.s390.vgfmg(<2 x i64> %a, <2 x i64> %b)
962  ret <16 x i8> %res
963}
964
965; VGFMAB.
966define <8 x i16> @test_vgfmab(<16 x i8> %a, <16 x i8> %b, <8 x i16> %c) {
967; CHECK-LABEL: test_vgfmab:
968; CHECK: vgfmab %v24, %v24, %v26, %v28
969; CHECK: br %r14
970  %res = call <8 x i16> @llvm.s390.vgfmab(<16 x i8> %a, <16 x i8> %b,
971                                          <8 x i16> %c)
972  ret <8 x i16> %res
973}
974
975; VGFMAH.
976define <4 x i32> @test_vgfmah(<8 x i16> %a, <8 x i16> %b, <4 x i32> %c) {
977; CHECK-LABEL: test_vgfmah:
978; CHECK: vgfmah %v24, %v24, %v26, %v28
979; CHECK: br %r14
980  %res = call <4 x i32> @llvm.s390.vgfmah(<8 x i16> %a, <8 x i16> %b,
981                                          <4 x i32> %c)
982  ret <4 x i32> %res
983}
984
985; VGFMAF.
986define <2 x i64> @test_vgfmaf(<4 x i32> %a, <4 x i32> %b, <2 x i64> %c) {
987; CHECK-LABEL: test_vgfmaf:
988; CHECK: vgfmaf %v24, %v24, %v26, %v28
989; CHECK: br %r14
990  %res = call <2 x i64> @llvm.s390.vgfmaf(<4 x i32> %a, <4 x i32> %b,
991                                          <2 x i64> %c)
992  ret <2 x i64> %res
993}
994
995; VGFMAG.
996define <16 x i8> @test_vgfmag(<2 x i64> %a, <2 x i64> %b, <16 x i8> %c) {
997; CHECK-LABEL: test_vgfmag:
998; CHECK: vgfmag %v24, %v24, %v26, %v28
999; CHECK: br %r14
1000  %res = call <16 x i8> @llvm.s390.vgfmag(<2 x i64> %a, <2 x i64> %b,
1001                                          <16 x i8> %c)
1002  ret <16 x i8> %res
1003}
1004
1005; VMAHB.
1006define <16 x i8> @test_vmahb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
1007; CHECK-LABEL: test_vmahb:
1008; CHECK: vmahb %v24, %v24, %v26, %v28
1009; CHECK: br %r14
1010  %res = call <16 x i8> @llvm.s390.vmahb(<16 x i8> %a, <16 x i8> %b,
1011                                         <16 x i8> %c)
1012  ret <16 x i8> %res
1013}
1014
1015; VMAHH.
1016define <8 x i16> @test_vmahh(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) {
1017; CHECK-LABEL: test_vmahh:
1018; CHECK: vmahh %v24, %v24, %v26, %v28
1019; CHECK: br %r14
1020  %res = call <8 x i16> @llvm.s390.vmahh(<8 x i16> %a, <8 x i16> %b,
1021                                         <8 x i16> %c)
1022  ret <8 x i16> %res
1023}
1024
1025; VMAHF.
1026define <4 x i32> @test_vmahf(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
1027; CHECK-LABEL: test_vmahf:
1028; CHECK: vmahf %v24, %v24, %v26, %v28
1029; CHECK: br %r14
1030  %res = call <4 x i32> @llvm.s390.vmahf(<4 x i32> %a, <4 x i32> %b,
1031                                         <4 x i32> %c)
1032  ret <4 x i32> %res
1033}
1034
1035; VMALHB.
1036define <16 x i8> @test_vmalhb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
1037; CHECK-LABEL: test_vmalhb:
1038; CHECK: vmalhb %v24, %v24, %v26, %v28
1039; CHECK: br %r14
1040  %res = call <16 x i8> @llvm.s390.vmalhb(<16 x i8> %a, <16 x i8> %b,
1041                                          <16 x i8> %c)
1042  ret <16 x i8> %res
1043}
1044
1045; VMALHH.
1046define <8 x i16> @test_vmalhh(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) {
1047; CHECK-LABEL: test_vmalhh:
1048; CHECK: vmalhh %v24, %v24, %v26, %v28
1049; CHECK: br %r14
1050  %res = call <8 x i16> @llvm.s390.vmalhh(<8 x i16> %a, <8 x i16> %b,
1051                                          <8 x i16> %c)
1052  ret <8 x i16> %res
1053}
1054
1055; VMALHF.
1056define <4 x i32> @test_vmalhf(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
1057; CHECK-LABEL: test_vmalhf:
1058; CHECK: vmalhf %v24, %v24, %v26, %v28
1059; CHECK: br %r14
1060  %res = call <4 x i32> @llvm.s390.vmalhf(<4 x i32> %a, <4 x i32> %b,
1061                                          <4 x i32> %c)
1062  ret <4 x i32> %res
1063}
1064
1065; VMAEB.
1066define <8 x i16> @test_vmaeb(<16 x i8> %a, <16 x i8> %b, <8 x i16> %c) {
1067; CHECK-LABEL: test_vmaeb:
1068; CHECK: vmaeb %v24, %v24, %v26, %v28
1069; CHECK: br %r14
1070  %res = call <8 x i16> @llvm.s390.vmaeb(<16 x i8> %a, <16 x i8> %b,
1071                                         <8 x i16> %c)
1072  ret <8 x i16> %res
1073}
1074
1075; VMAEH.
1076define <4 x i32> @test_vmaeh(<8 x i16> %a, <8 x i16> %b, <4 x i32> %c) {
1077; CHECK-LABEL: test_vmaeh:
1078; CHECK: vmaeh %v24, %v24, %v26, %v28
1079; CHECK: br %r14
1080  %res = call <4 x i32> @llvm.s390.vmaeh(<8 x i16> %a, <8 x i16> %b,
1081                                         <4 x i32> %c)
1082  ret <4 x i32> %res
1083}
1084
1085; VMAEF.
1086define <2 x i64> @test_vmaef(<4 x i32> %a, <4 x i32> %b, <2 x i64> %c) {
1087; CHECK-LABEL: test_vmaef:
1088; CHECK: vmaef %v24, %v24, %v26, %v28
1089; CHECK: br %r14
1090  %res = call <2 x i64> @llvm.s390.vmaef(<4 x i32> %a, <4 x i32> %b,
1091                                         <2 x i64> %c)
1092  ret <2 x i64> %res
1093}
1094
1095; VMALEB.
1096define <8 x i16> @test_vmaleb(<16 x i8> %a, <16 x i8> %b, <8 x i16> %c) {
1097; CHECK-LABEL: test_vmaleb:
1098; CHECK: vmaleb %v24, %v24, %v26, %v28
1099; CHECK: br %r14
1100  %res = call <8 x i16> @llvm.s390.vmaleb(<16 x i8> %a, <16 x i8> %b,
1101                                          <8 x i16> %c)
1102  ret <8 x i16> %res
1103}
1104
1105; VMALEH.
1106define <4 x i32> @test_vmaleh(<8 x i16> %a, <8 x i16> %b, <4 x i32> %c) {
1107; CHECK-LABEL: test_vmaleh:
1108; CHECK: vmaleh %v24, %v24, %v26, %v28
1109; CHECK: br %r14
1110  %res = call <4 x i32> @llvm.s390.vmaleh(<8 x i16> %a, <8 x i16> %b,
1111                                          <4 x i32> %c)
1112  ret <4 x i32> %res
1113}
1114
1115; VMALEF.
1116define <2 x i64> @test_vmalef(<4 x i32> %a, <4 x i32> %b, <2 x i64> %c) {
1117; CHECK-LABEL: test_vmalef:
1118; CHECK: vmalef %v24, %v24, %v26, %v28
1119; CHECK: br %r14
1120  %res = call <2 x i64> @llvm.s390.vmalef(<4 x i32> %a, <4 x i32> %b,
1121                                          <2 x i64> %c)
1122  ret <2 x i64> %res
1123}
1124
1125; VMAOB.
1126define <8 x i16> @test_vmaob(<16 x i8> %a, <16 x i8> %b, <8 x i16> %c) {
1127; CHECK-LABEL: test_vmaob:
1128; CHECK: vmaob %v24, %v24, %v26, %v28
1129; CHECK: br %r14
1130  %res = call <8 x i16> @llvm.s390.vmaob(<16 x i8> %a, <16 x i8> %b,
1131                                         <8 x i16> %c)
1132  ret <8 x i16> %res
1133}
1134
1135; VMAOH.
1136define <4 x i32> @test_vmaoh(<8 x i16> %a, <8 x i16> %b, <4 x i32> %c) {
1137; CHECK-LABEL: test_vmaoh:
1138; CHECK: vmaoh %v24, %v24, %v26, %v28
1139; CHECK: br %r14
1140  %res = call <4 x i32> @llvm.s390.vmaoh(<8 x i16> %a, <8 x i16> %b,
1141                                         <4 x i32> %c)
1142  ret <4 x i32> %res
1143}
1144
1145; VMAOF.
1146define <2 x i64> @test_vmaof(<4 x i32> %a, <4 x i32> %b, <2 x i64> %c) {
1147; CHECK-LABEL: test_vmaof:
1148; CHECK: vmaof %v24, %v24, %v26, %v28
1149; CHECK: br %r14
1150  %res = call <2 x i64> @llvm.s390.vmaof(<4 x i32> %a, <4 x i32> %b,
1151                                         <2 x i64> %c)
1152  ret <2 x i64> %res
1153}
1154
1155; VMALOB.
1156define <8 x i16> @test_vmalob(<16 x i8> %a, <16 x i8> %b, <8 x i16> %c) {
1157; CHECK-LABEL: test_vmalob:
1158; CHECK: vmalob %v24, %v24, %v26, %v28
1159; CHECK: br %r14
1160  %res = call <8 x i16> @llvm.s390.vmalob(<16 x i8> %a, <16 x i8> %b,
1161                                          <8 x i16> %c)
1162  ret <8 x i16> %res
1163}
1164
1165; VMALOH.
1166define <4 x i32> @test_vmaloh(<8 x i16> %a, <8 x i16> %b, <4 x i32> %c) {
1167; CHECK-LABEL: test_vmaloh:
1168; CHECK: vmaloh %v24, %v24, %v26, %v28
1169; CHECK: br %r14
1170  %res = call <4 x i32> @llvm.s390.vmaloh(<8 x i16> %a, <8 x i16> %b,
1171                                          <4 x i32> %c)
1172  ret <4 x i32> %res
1173}
1174
1175; VMALOF.
1176define <2 x i64> @test_vmalof(<4 x i32> %a, <4 x i32> %b, <2 x i64> %c) {
1177; CHECK-LABEL: test_vmalof:
1178; CHECK: vmalof %v24, %v24, %v26, %v28
1179; CHECK: br %r14
1180  %res = call <2 x i64> @llvm.s390.vmalof(<4 x i32> %a, <4 x i32> %b,
1181                                          <2 x i64> %c)
1182  ret <2 x i64> %res
1183}
1184
1185; VMHB.
1186define <16 x i8> @test_vmhb(<16 x i8> %a, <16 x i8> %b) {
1187; CHECK-LABEL: test_vmhb:
1188; CHECK: vmhb %v24, %v24, %v26
1189; CHECK: br %r14
1190  %res = call <16 x i8> @llvm.s390.vmhb(<16 x i8> %a, <16 x i8> %b)
1191  ret <16 x i8> %res
1192}
1193
1194; VMHH.
1195define <8 x i16> @test_vmhh(<8 x i16> %a, <8 x i16> %b) {
1196; CHECK-LABEL: test_vmhh:
1197; CHECK: vmhh %v24, %v24, %v26
1198; CHECK: br %r14
1199  %res = call <8 x i16> @llvm.s390.vmhh(<8 x i16> %a, <8 x i16> %b)
1200  ret <8 x i16> %res
1201}
1202
1203; VMHF.
1204define <4 x i32> @test_vmhf(<4 x i32> %a, <4 x i32> %b) {
1205; CHECK-LABEL: test_vmhf:
1206; CHECK: vmhf %v24, %v24, %v26
1207; CHECK: br %r14
1208  %res = call <4 x i32> @llvm.s390.vmhf(<4 x i32> %a, <4 x i32> %b)
1209  ret <4 x i32> %res
1210}
1211
1212; VMLHB.
1213define <16 x i8> @test_vmlhb(<16 x i8> %a, <16 x i8> %b) {
1214; CHECK-LABEL: test_vmlhb:
1215; CHECK: vmlhb %v24, %v24, %v26
1216; CHECK: br %r14
1217  %res = call <16 x i8> @llvm.s390.vmlhb(<16 x i8> %a, <16 x i8> %b)
1218  ret <16 x i8> %res
1219}
1220
1221; VMLHH.
1222define <8 x i16> @test_vmlhh(<8 x i16> %a, <8 x i16> %b) {
1223; CHECK-LABEL: test_vmlhh:
1224; CHECK: vmlhh %v24, %v24, %v26
1225; CHECK: br %r14
1226  %res = call <8 x i16> @llvm.s390.vmlhh(<8 x i16> %a, <8 x i16> %b)
1227  ret <8 x i16> %res
1228}
1229
1230; VMLHF.
1231define <4 x i32> @test_vmlhf(<4 x i32> %a, <4 x i32> %b) {
1232; CHECK-LABEL: test_vmlhf:
1233; CHECK: vmlhf %v24, %v24, %v26
1234; CHECK: br %r14
1235  %res = call <4 x i32> @llvm.s390.vmlhf(<4 x i32> %a, <4 x i32> %b)
1236  ret <4 x i32> %res
1237}
1238
1239; VMEB.
1240define <8 x i16> @test_vmeb(<16 x i8> %a, <16 x i8> %b) {
1241; CHECK-LABEL: test_vmeb:
1242; CHECK: vmeb %v24, %v24, %v26
1243; CHECK: br %r14
1244  %res = call <8 x i16> @llvm.s390.vmeb(<16 x i8> %a, <16 x i8> %b)
1245  ret <8 x i16> %res
1246}
1247
1248; VMEH.
1249define <4 x i32> @test_vmeh(<8 x i16> %a, <8 x i16> %b) {
1250; CHECK-LABEL: test_vmeh:
1251; CHECK: vmeh %v24, %v24, %v26
1252; CHECK: br %r14
1253  %res = call <4 x i32> @llvm.s390.vmeh(<8 x i16> %a, <8 x i16> %b)
1254  ret <4 x i32> %res
1255}
1256
1257; VMEF.
1258define <2 x i64> @test_vmef(<4 x i32> %a, <4 x i32> %b) {
1259; CHECK-LABEL: test_vmef:
1260; CHECK: vmef %v24, %v24, %v26
1261; CHECK: br %r14
1262  %res = call <2 x i64> @llvm.s390.vmef(<4 x i32> %a, <4 x i32> %b)
1263  ret <2 x i64> %res
1264}
1265
1266; VMLEB.
1267define <8 x i16> @test_vmleb(<16 x i8> %a, <16 x i8> %b) {
1268; CHECK-LABEL: test_vmleb:
1269; CHECK: vmleb %v24, %v24, %v26
1270; CHECK: br %r14
1271  %res = call <8 x i16> @llvm.s390.vmleb(<16 x i8> %a, <16 x i8> %b)
1272  ret <8 x i16> %res
1273}
1274
1275; VMLEH.
1276define <4 x i32> @test_vmleh(<8 x i16> %a, <8 x i16> %b) {
1277; CHECK-LABEL: test_vmleh:
1278; CHECK: vmleh %v24, %v24, %v26
1279; CHECK: br %r14
1280  %res = call <4 x i32> @llvm.s390.vmleh(<8 x i16> %a, <8 x i16> %b)
1281  ret <4 x i32> %res
1282}
1283
1284; VMLEF.
1285define <2 x i64> @test_vmlef(<4 x i32> %a, <4 x i32> %b) {
1286; CHECK-LABEL: test_vmlef:
1287; CHECK: vmlef %v24, %v24, %v26
1288; CHECK: br %r14
1289  %res = call <2 x i64> @llvm.s390.vmlef(<4 x i32> %a, <4 x i32> %b)
1290  ret <2 x i64> %res
1291}
1292
1293; VMOB.
1294define <8 x i16> @test_vmob(<16 x i8> %a, <16 x i8> %b) {
1295; CHECK-LABEL: test_vmob:
1296; CHECK: vmob %v24, %v24, %v26
1297; CHECK: br %r14
1298  %res = call <8 x i16> @llvm.s390.vmob(<16 x i8> %a, <16 x i8> %b)
1299  ret <8 x i16> %res
1300}
1301
1302; VMOH.
1303define <4 x i32> @test_vmoh(<8 x i16> %a, <8 x i16> %b) {
1304; CHECK-LABEL: test_vmoh:
1305; CHECK: vmoh %v24, %v24, %v26
1306; CHECK: br %r14
1307  %res = call <4 x i32> @llvm.s390.vmoh(<8 x i16> %a, <8 x i16> %b)
1308  ret <4 x i32> %res
1309}
1310
1311; VMOF.
1312define <2 x i64> @test_vmof(<4 x i32> %a, <4 x i32> %b) {
1313; CHECK-LABEL: test_vmof:
1314; CHECK: vmof %v24, %v24, %v26
1315; CHECK: br %r14
1316  %res = call <2 x i64> @llvm.s390.vmof(<4 x i32> %a, <4 x i32> %b)
1317  ret <2 x i64> %res
1318}
1319
1320; VMLOB.
1321define <8 x i16> @test_vmlob(<16 x i8> %a, <16 x i8> %b) {
1322; CHECK-LABEL: test_vmlob:
1323; CHECK: vmlob %v24, %v24, %v26
1324; CHECK: br %r14
1325  %res = call <8 x i16> @llvm.s390.vmlob(<16 x i8> %a, <16 x i8> %b)
1326  ret <8 x i16> %res
1327}
1328
1329; VMLOH.
1330define <4 x i32> @test_vmloh(<8 x i16> %a, <8 x i16> %b) {
1331; CHECK-LABEL: test_vmloh:
1332; CHECK: vmloh %v24, %v24, %v26
1333; CHECK: br %r14
1334  %res = call <4 x i32> @llvm.s390.vmloh(<8 x i16> %a, <8 x i16> %b)
1335  ret <4 x i32> %res
1336}
1337
1338; VMLOF.
1339define <2 x i64> @test_vmlof(<4 x i32> %a, <4 x i32> %b) {
1340; CHECK-LABEL: test_vmlof:
1341; CHECK: vmlof %v24, %v24, %v26
1342; CHECK: br %r14
1343  %res = call <2 x i64> @llvm.s390.vmlof(<4 x i32> %a, <4 x i32> %b)
1344  ret <2 x i64> %res
1345}
1346
1347; VERLLVB.
1348define <16 x i8> @test_verllvb(<16 x i8> %a, <16 x i8> %b) {
1349; CHECK-LABEL: test_verllvb:
1350; CHECK: verllvb %v24, %v24, %v26
1351; CHECK: br %r14
1352  %res = call <16 x i8> @llvm.s390.verllvb(<16 x i8> %a, <16 x i8> %b)
1353  ret <16 x i8> %res
1354}
1355
1356; VERLLVH.
1357define <8 x i16> @test_verllvh(<8 x i16> %a, <8 x i16> %b) {
1358; CHECK-LABEL: test_verllvh:
1359; CHECK: verllvh %v24, %v24, %v26
1360; CHECK: br %r14
1361  %res = call <8 x i16> @llvm.s390.verllvh(<8 x i16> %a, <8 x i16> %b)
1362  ret <8 x i16> %res
1363}
1364
1365; VERLLVF.
1366define <4 x i32> @test_verllvf(<4 x i32> %a, <4 x i32> %b) {
1367; CHECK-LABEL: test_verllvf:
1368; CHECK: verllvf %v24, %v24, %v26
1369; CHECK: br %r14
1370  %res = call <4 x i32> @llvm.s390.verllvf(<4 x i32> %a, <4 x i32> %b)
1371  ret <4 x i32> %res
1372}
1373
1374; VERLLVG.
1375define <2 x i64> @test_verllvg(<2 x i64> %a, <2 x i64> %b) {
1376; CHECK-LABEL: test_verllvg:
1377; CHECK: verllvg %v24, %v24, %v26
1378; CHECK: br %r14
1379  %res = call <2 x i64> @llvm.s390.verllvg(<2 x i64> %a, <2 x i64> %b)
1380  ret <2 x i64> %res
1381}
1382
1383; VERLLB.
1384define <16 x i8> @test_verllb(<16 x i8> %a, i32 %b) {
1385; CHECK-LABEL: test_verllb:
1386; CHECK: verllb %v24, %v24, 0(%r2)
1387; CHECK: br %r14
1388  %res = call <16 x i8> @llvm.s390.verllb(<16 x i8> %a, i32 %b)
1389  ret <16 x i8> %res
1390}
1391
1392; VERLLH.
1393define <8 x i16> @test_verllh(<8 x i16> %a, i32 %b) {
1394; CHECK-LABEL: test_verllh:
1395; CHECK: verllh %v24, %v24, 0(%r2)
1396; CHECK: br %r14
1397  %res = call <8 x i16> @llvm.s390.verllh(<8 x i16> %a, i32 %b)
1398  ret <8 x i16> %res
1399}
1400
1401; VERLLF.
1402define <4 x i32> @test_verllf(<4 x i32> %a, i32 %b) {
1403; CHECK-LABEL: test_verllf:
1404; CHECK: verllf %v24, %v24, 0(%r2)
1405; CHECK: br %r14
1406  %res = call <4 x i32> @llvm.s390.verllf(<4 x i32> %a, i32 %b)
1407  ret <4 x i32> %res
1408}
1409
1410; VERLLG.
1411define <2 x i64> @test_verllg(<2 x i64> %a, i32 %b) {
1412; CHECK-LABEL: test_verllg:
1413; CHECK: verllg %v24, %v24, 0(%r2)
1414; CHECK: br %r14
1415  %res = call <2 x i64> @llvm.s390.verllg(<2 x i64> %a, i32 %b)
1416  ret <2 x i64> %res
1417}
1418
1419; VERLLB with the smallest count.
1420define <16 x i8> @test_verllb_1(<16 x i8> %a) {
1421; CHECK-LABEL: test_verllb_1:
1422; CHECK: verllb %v24, %v24, 1
1423; CHECK: br %r14
1424  %res = call <16 x i8> @llvm.s390.verllb(<16 x i8> %a, i32 1)
1425  ret <16 x i8> %res
1426}
1427
1428; VERLLB with the largest count.
1429define <16 x i8> @test_verllb_4095(<16 x i8> %a) {
1430; CHECK-LABEL: test_verllb_4095:
1431; CHECK: verllb %v24, %v24, 4095
1432; CHECK: br %r14
1433  %res = call <16 x i8> @llvm.s390.verllb(<16 x i8> %a, i32 4095)
1434  ret <16 x i8> %res
1435}
1436
1437; VERLLB with the largest count + 1.
1438define <16 x i8> @test_verllb_4096(<16 x i8> %a) {
1439; CHECK-LABEL: test_verllb_4096:
1440; CHECK: lhi [[REG:%r[1-5]]], 4096
1441; CHECK: verllb %v24, %v24, 0([[REG]])
1442; CHECK: br %r14
1443  %res = call <16 x i8> @llvm.s390.verllb(<16 x i8> %a, i32 4096)
1444  ret <16 x i8> %res
1445}
1446
1447; VERIMB.
1448define <16 x i8> @test_verimb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
1449; CHECK-LABEL: test_verimb:
1450; CHECK: verimb %v24, %v26, %v28, 1
1451; CHECK: br %r14
1452  %res = call <16 x i8> @llvm.s390.verimb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, i32 1)
1453  ret <16 x i8> %res
1454}
1455
1456; VERIMH.
1457define <8 x i16> @test_verimh(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) {
1458; CHECK-LABEL: test_verimh:
1459; CHECK: verimh %v24, %v26, %v28, 1
1460; CHECK: br %r14
1461  %res = call <8 x i16> @llvm.s390.verimh(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c, i32 1)
1462  ret <8 x i16> %res
1463}
1464
1465; VERIMF.
1466define <4 x i32> @test_verimf(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
1467; CHECK-LABEL: test_verimf:
1468; CHECK: verimf %v24, %v26, %v28, 1
1469; CHECK: br %r14
1470  %res = call <4 x i32> @llvm.s390.verimf(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, i32 1)
1471  ret <4 x i32> %res
1472}
1473
1474; VERIMG.
1475define <2 x i64> @test_verimg(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c) {
1476; CHECK-LABEL: test_verimg:
1477; CHECK: verimg %v24, %v26, %v28, 1
1478; CHECK: br %r14
1479  %res = call <2 x i64> @llvm.s390.verimg(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c, i32 1)
1480  ret <2 x i64> %res
1481}
1482
1483; VERIMB with a different mask.
1484define <16 x i8> @test_verimb_254(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
1485; CHECK-LABEL: test_verimb_254:
1486; CHECK: verimb %v24, %v26, %v28, 254
1487; CHECK: br %r14
1488  %res = call <16 x i8> @llvm.s390.verimb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, i32 254)
1489  ret <16 x i8> %res
1490}
1491
1492; VSL.
1493define <16 x i8> @test_vsl(<16 x i8> %a, <16 x i8> %b) {
1494; CHECK-LABEL: test_vsl:
1495; CHECK: vsl %v24, %v24, %v26
1496; CHECK: br %r14
1497  %res = call <16 x i8> @llvm.s390.vsl(<16 x i8> %a, <16 x i8> %b)
1498  ret <16 x i8> %res
1499}
1500
1501; VSLB.
1502define <16 x i8> @test_vslb(<16 x i8> %a, <16 x i8> %b) {
1503; CHECK-LABEL: test_vslb:
1504; CHECK: vslb %v24, %v24, %v26
1505; CHECK: br %r14
1506  %res = call <16 x i8> @llvm.s390.vslb(<16 x i8> %a, <16 x i8> %b)
1507  ret <16 x i8> %res
1508}
1509
1510; VSRA.
1511define <16 x i8> @test_vsra(<16 x i8> %a, <16 x i8> %b) {
1512; CHECK-LABEL: test_vsra:
1513; CHECK: vsra %v24, %v24, %v26
1514; CHECK: br %r14
1515  %res = call <16 x i8> @llvm.s390.vsra(<16 x i8> %a, <16 x i8> %b)
1516  ret <16 x i8> %res
1517}
1518
1519; VSRAB.
1520define <16 x i8> @test_vsrab(<16 x i8> %a, <16 x i8> %b) {
1521; CHECK-LABEL: test_vsrab:
1522; CHECK: vsrab %v24, %v24, %v26
1523; CHECK: br %r14
1524  %res = call <16 x i8> @llvm.s390.vsrab(<16 x i8> %a, <16 x i8> %b)
1525  ret <16 x i8> %res
1526}
1527
1528; VSRL.
1529define <16 x i8> @test_vsrl(<16 x i8> %a, <16 x i8> %b) {
1530; CHECK-LABEL: test_vsrl:
1531; CHECK: vsrl %v24, %v24, %v26
1532; CHECK: br %r14
1533  %res = call <16 x i8> @llvm.s390.vsrl(<16 x i8> %a, <16 x i8> %b)
1534  ret <16 x i8> %res
1535}
1536
1537; VSRLB.
1538define <16 x i8> @test_vsrlb(<16 x i8> %a, <16 x i8> %b) {
1539; CHECK-LABEL: test_vsrlb:
1540; CHECK: vsrlb %v24, %v24, %v26
1541; CHECK: br %r14
1542  %res = call <16 x i8> @llvm.s390.vsrlb(<16 x i8> %a, <16 x i8> %b)
1543  ret <16 x i8> %res
1544}
1545
1546; VSLDB with the minimum useful value.
1547define <16 x i8> @test_vsldb_1(<16 x i8> %a, <16 x i8> %b) {
1548; CHECK-LABEL: test_vsldb_1:
1549; CHECK: vsldb %v24, %v24, %v26, 1
1550; CHECK: br %r14
1551  %res = call <16 x i8> @llvm.s390.vsldb(<16 x i8> %a, <16 x i8> %b, i32 1)
1552  ret <16 x i8> %res
1553}
1554
1555; VSLDB with the maximum value.
1556define <16 x i8> @test_vsldb_15(<16 x i8> %a, <16 x i8> %b) {
1557; CHECK-LABEL: test_vsldb_15:
1558; CHECK: vsldb %v24, %v24, %v26, 15
1559; CHECK: br %r14
1560  %res = call <16 x i8> @llvm.s390.vsldb(<16 x i8> %a, <16 x i8> %b, i32 15)
1561  ret <16 x i8> %res
1562}
1563
1564; VSCBIB.
1565define <16 x i8> @test_vscbib(<16 x i8> %a, <16 x i8> %b) {
1566; CHECK-LABEL: test_vscbib:
1567; CHECK: vscbib %v24, %v24, %v26
1568; CHECK: br %r14
1569  %res = call <16 x i8> @llvm.s390.vscbib(<16 x i8> %a, <16 x i8> %b)
1570  ret <16 x i8> %res
1571}
1572
1573; VSCBIH.
1574define <8 x i16> @test_vscbih(<8 x i16> %a, <8 x i16> %b) {
1575; CHECK-LABEL: test_vscbih:
1576; CHECK: vscbih %v24, %v24, %v26
1577; CHECK: br %r14
1578  %res = call <8 x i16> @llvm.s390.vscbih(<8 x i16> %a, <8 x i16> %b)
1579  ret <8 x i16> %res
1580}
1581
1582; VSCBIF.
1583define <4 x i32> @test_vscbif(<4 x i32> %a, <4 x i32> %b) {
1584; CHECK-LABEL: test_vscbif:
1585; CHECK: vscbif %v24, %v24, %v26
1586; CHECK: br %r14
1587  %res = call <4 x i32> @llvm.s390.vscbif(<4 x i32> %a, <4 x i32> %b)
1588  ret <4 x i32> %res
1589}
1590
1591; VSCBIG.
1592define <2 x i64> @test_vscbig(<2 x i64> %a, <2 x i64> %b) {
1593; CHECK-LABEL: test_vscbig:
1594; CHECK: vscbig %v24, %v24, %v26
1595; CHECK: br %r14
1596  %res = call <2 x i64> @llvm.s390.vscbig(<2 x i64> %a, <2 x i64> %b)
1597  ret <2 x i64> %res
1598}
1599
1600; VSQ.
1601define <16 x i8> @test_vsq(<16 x i8> %a, <16 x i8> %b) {
1602; CHECK-LABEL: test_vsq:
1603; CHECK: vsq %v24, %v24, %v26
1604; CHECK: br %r14
1605  %res = call <16 x i8> @llvm.s390.vsq(<16 x i8> %a, <16 x i8> %b)
1606  ret <16 x i8> %res
1607}
1608
1609; VSBIQ.
1610define <16 x i8> @test_vsbiq(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
1611; CHECK-LABEL: test_vsbiq:
1612; CHECK: vsbiq %v24, %v24, %v26, %v28
1613; CHECK: br %r14
1614  %res = call <16 x i8> @llvm.s390.vsbiq(<16 x i8> %a, <16 x i8> %b,
1615                                         <16 x i8> %c)
1616  ret <16 x i8> %res
1617}
1618
1619; VSCBIQ.
1620define <16 x i8> @test_vscbiq(<16 x i8> %a, <16 x i8> %b) {
1621; CHECK-LABEL: test_vscbiq:
1622; CHECK: vscbiq %v24, %v24, %v26
1623; CHECK: br %r14
1624  %res = call <16 x i8> @llvm.s390.vscbiq(<16 x i8> %a, <16 x i8> %b)
1625  ret <16 x i8> %res
1626}
1627
1628; VSBCBIQ.
1629define <16 x i8> @test_vsbcbiq(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
1630; CHECK-LABEL: test_vsbcbiq:
1631; CHECK: vsbcbiq %v24, %v24, %v26, %v28
1632; CHECK: br %r14
1633  %res = call <16 x i8> @llvm.s390.vsbcbiq(<16 x i8> %a, <16 x i8> %b,
1634                                           <16 x i8> %c)
1635  ret <16 x i8> %res
1636}
1637
1638; VSUMB.
1639define <4 x i32> @test_vsumb(<16 x i8> %a, <16 x i8> %b) {
1640; CHECK-LABEL: test_vsumb:
1641; CHECK: vsumb %v24, %v24, %v26
1642; CHECK: br %r14
1643  %res = call <4 x i32> @llvm.s390.vsumb(<16 x i8> %a, <16 x i8> %b)
1644  ret <4 x i32> %res
1645}
1646
1647; VSUMH.
1648define <4 x i32> @test_vsumh(<8 x i16> %a, <8 x i16> %b) {
1649; CHECK-LABEL: test_vsumh:
1650; CHECK: vsumh %v24, %v24, %v26
1651; CHECK: br %r14
1652  %res = call <4 x i32> @llvm.s390.vsumh(<8 x i16> %a, <8 x i16> %b)
1653  ret <4 x i32> %res
1654}
1655
1656; VSUMGH.
1657define <2 x i64> @test_vsumgh(<8 x i16> %a, <8 x i16> %b) {
1658; CHECK-LABEL: test_vsumgh:
1659; CHECK: vsumgh %v24, %v24, %v26
1660; CHECK: br %r14
1661  %res = call <2 x i64> @llvm.s390.vsumgh(<8 x i16> %a, <8 x i16> %b)
1662  ret <2 x i64> %res
1663}
1664
1665; VSUMGF.
1666define <2 x i64> @test_vsumgf(<4 x i32> %a, <4 x i32> %b) {
1667; CHECK-LABEL: test_vsumgf:
1668; CHECK: vsumgf %v24, %v24, %v26
1669; CHECK: br %r14
1670  %res = call <2 x i64> @llvm.s390.vsumgf(<4 x i32> %a, <4 x i32> %b)
1671  ret <2 x i64> %res
1672}
1673
1674; VSUMQF.
1675define <16 x i8> @test_vsumqf(<4 x i32> %a, <4 x i32> %b) {
1676; CHECK-LABEL: test_vsumqf:
1677; CHECK: vsumqf %v24, %v24, %v26
1678; CHECK: br %r14
1679  %res = call <16 x i8> @llvm.s390.vsumqf(<4 x i32> %a, <4 x i32> %b)
1680  ret <16 x i8> %res
1681}
1682
1683; VSUMQG.
1684define <16 x i8> @test_vsumqg(<2 x i64> %a, <2 x i64> %b) {
1685; CHECK-LABEL: test_vsumqg:
1686; CHECK: vsumqg %v24, %v24, %v26
1687; CHECK: br %r14
1688  %res = call <16 x i8> @llvm.s390.vsumqg(<2 x i64> %a, <2 x i64> %b)
1689  ret <16 x i8> %res
1690}
1691
1692; VTM with no processing of the result.
1693define i32 @test_vtm(<16 x i8> %a, <16 x i8> %b) {
1694; CHECK-LABEL: test_vtm:
1695; CHECK: vtm %v24, %v26
1696; CHECK: ipm %r2
1697; CHECK: srl %r2, 28
1698; CHECK: br %r14
1699  %res = call i32 @llvm.s390.vtm(<16 x i8> %a, <16 x i8> %b)
1700  ret i32 %res
1701}
1702
1703; VTM, storing to %ptr if all bits are set.
1704define void @test_vtm_all_store(<16 x i8> %a, <16 x i8> %b, i32 *%ptr) {
1705; CHECK-LABEL: test_vtm_all_store:
1706; CHECK-NOT: %r
1707; CHECK: vtm %v24, %v26
1708; CHECK-NEXT: {{bnor|bler}} %r14
1709; CHECK: mvhi 0(%r2), 0
1710; CHECK: br %r14
1711  %res = call i32 @llvm.s390.vtm(<16 x i8> %a, <16 x i8> %b)
1712  %cmp = icmp sge i32 %res, 3
1713  br i1 %cmp, label %store, label %exit
1714
1715store:
1716  store i32 0, i32 *%ptr
1717  br label %exit
1718
1719exit:
1720  ret void
1721}
1722
1723; VCEQBS with no processing of the result.
1724define i32 @test_vceqbs(<16 x i8> %a, <16 x i8> %b) {
1725; CHECK-LABEL: test_vceqbs:
1726; CHECK: vceqbs {{%v[0-9]+}}, %v24, %v26
1727; CHECK: ipm %r2
1728; CHECK: srl %r2, 28
1729; CHECK: br %r14
1730  %call = call {<16 x i8>, i32} @llvm.s390.vceqbs(<16 x i8> %a, <16 x i8> %b)
1731  %res = extractvalue {<16 x i8>, i32} %call, 1
1732  ret i32 %res
1733}
1734
1735; VCEQBS, returning 1 if any elements are equal (CC != 3).
1736define i32 @test_vceqbs_any_bool(<16 x i8> %a, <16 x i8> %b) {
1737; CHECK-LABEL: test_vceqbs_any_bool:
1738; CHECK: vceqbs {{%v[0-9]+}}, %v24, %v26
1739; CHECK: ipm %r2
1740; CHECK: afi %r2, -536870912
1741; CHECK: srl %r2, 31
1742; CHECK: br %r14
1743  %call = call {<16 x i8>, i32} @llvm.s390.vceqbs(<16 x i8> %a, <16 x i8> %b)
1744  %res = extractvalue {<16 x i8>, i32} %call, 1
1745  %cmp = icmp ne i32 %res, 3
1746  %ext = zext i1 %cmp to i32
1747  ret i32 %ext
1748}
1749
1750; VCEQBS, storing to %ptr if any elements are equal.
1751define <16 x i8> @test_vceqbs_any_store(<16 x i8> %a, <16 x i8> %b, i32 *%ptr) {
1752; CHECK-LABEL: test_vceqbs_any_store:
1753; CHECK-NOT: %r
1754; CHECK: vceqbs %v24, %v24, %v26
1755; CHECK-NEXT: {{bor|bnler}} %r14
1756; CHECK: mvhi 0(%r2), 0
1757; CHECK: br %r14
1758  %call = call {<16 x i8>, i32} @llvm.s390.vceqbs(<16 x i8> %a, <16 x i8> %b)
1759  %res = extractvalue {<16 x i8>, i32} %call, 0
1760  %cc = extractvalue {<16 x i8>, i32} %call, 1
1761  %cmp = icmp ule i32 %cc, 2
1762  br i1 %cmp, label %store, label %exit
1763
1764store:
1765  store i32 0, i32 *%ptr
1766  br label %exit
1767
1768exit:
1769  ret <16 x i8> %res
1770}
1771
1772; VCEQHS with no processing of the result.
1773define i32 @test_vceqhs(<8 x i16> %a, <8 x i16> %b) {
1774; CHECK-LABEL: test_vceqhs:
1775; CHECK: vceqhs {{%v[0-9]+}}, %v24, %v26
1776; CHECK: ipm %r2
1777; CHECK: srl %r2, 28
1778; CHECK: br %r14
1779  %call = call {<8 x i16>, i32} @llvm.s390.vceqhs(<8 x i16> %a, <8 x i16> %b)
1780  %res = extractvalue {<8 x i16>, i32} %call, 1
1781  ret i32 %res
1782}
1783
1784; VCEQHS, returning 1 if not all elements are equal.
1785define i32 @test_vceqhs_notall_bool(<8 x i16> %a, <8 x i16> %b) {
1786; CHECK-LABEL: test_vceqhs_notall_bool:
1787; CHECK: vceqhs {{%v[0-9]+}}, %v24, %v26
1788; CHECK: ipm [[REG:%r[0-5]]]
1789; CHECK: risblg %r2, [[REG]], 31, 159, 36
1790; CHECK: br %r14
1791  %call = call {<8 x i16>, i32} @llvm.s390.vceqhs(<8 x i16> %a, <8 x i16> %b)
1792  %res = extractvalue {<8 x i16>, i32} %call, 1
1793  %cmp = icmp sge i32 %res, 1
1794  %ext = zext i1 %cmp to i32
1795  ret i32 %ext
1796}
1797
1798; VCEQHS, storing to %ptr if not all elements are equal.
1799define <8 x i16> @test_vceqhs_notall_store(<8 x i16> %a, <8 x i16> %b,
1800                                           i32 *%ptr) {
1801; CHECK-LABEL: test_vceqhs_notall_store:
1802; CHECK-NOT: %r
1803; CHECK: vceqhs %v24, %v24, %v26
1804; CHECK-NEXT: {{bher|ber}} %r14
1805; CHECK: mvhi 0(%r2), 0
1806; CHECK: br %r14
1807  %call = call {<8 x i16>, i32} @llvm.s390.vceqhs(<8 x i16> %a, <8 x i16> %b)
1808  %res = extractvalue {<8 x i16>, i32} %call, 0
1809  %cc = extractvalue {<8 x i16>, i32} %call, 1
1810  %cmp = icmp ugt i32 %cc, 0
1811  br i1 %cmp, label %store, label %exit
1812
1813store:
1814  store i32 0, i32 *%ptr
1815  br label %exit
1816
1817exit:
1818  ret <8 x i16> %res
1819}
1820
1821; VCEQFS with no processing of the result.
1822define i32 @test_vceqfs(<4 x i32> %a, <4 x i32> %b) {
1823; CHECK-LABEL: test_vceqfs:
1824; CHECK: vceqfs {{%v[0-9]+}}, %v24, %v26
1825; CHECK: ipm %r2
1826; CHECK: srl %r2, 28
1827; CHECK: br %r14
1828  %call = call {<4 x i32>, i32} @llvm.s390.vceqfs(<4 x i32> %a, <4 x i32> %b)
1829  %res = extractvalue {<4 x i32>, i32} %call, 1
1830  ret i32 %res
1831}
1832
1833; VCEQFS, returning 1 if no elements are equal.
1834define i32 @test_vceqfs_none_bool(<4 x i32> %a, <4 x i32> %b) {
1835; CHECK-LABEL: test_vceqfs_none_bool:
1836; CHECK: vceqfs {{%v[0-9]+}}, %v24, %v26
1837; CHECK: ipm [[REG:%r[0-5]]]
1838; CHECK: risblg %r2, [[REG]], 31, 159, 35
1839; CHECK: br %r14
1840  %call = call {<4 x i32>, i32} @llvm.s390.vceqfs(<4 x i32> %a, <4 x i32> %b)
1841  %res = extractvalue {<4 x i32>, i32} %call, 1
1842  %cmp = icmp eq i32 %res, 3
1843  %ext = zext i1 %cmp to i32
1844  ret i32 %ext
1845}
1846
1847; VCEQFS, storing to %ptr if no elements are equal.
1848define <4 x i32> @test_vceqfs_none_store(<4 x i32> %a, <4 x i32> %b,
1849                                         i32 *%ptr) {
1850; CHECK-LABEL: test_vceqfs_none_store:
1851; CHECK-NOT: %r
1852; CHECK: vceqfs %v24, %v24, %v26
1853; CHECK-NEXT: {{bnor|bler}} %r14
1854; CHECK: mvhi 0(%r2), 0
1855; CHECK: br %r14
1856  %call = call {<4 x i32>, i32} @llvm.s390.vceqfs(<4 x i32> %a, <4 x i32> %b)
1857  %res = extractvalue {<4 x i32>, i32} %call, 0
1858  %cc = extractvalue {<4 x i32>, i32} %call, 1
1859  %cmp = icmp uge i32 %cc, 3
1860  br i1 %cmp, label %store, label %exit
1861
1862store:
1863  store i32 0, i32 *%ptr
1864  br label %exit
1865
1866exit:
1867  ret <4 x i32> %res
1868}
1869
1870; VCEQGS with no processing of the result.
1871define i32 @test_vceqgs(<2 x i64> %a, <2 x i64> %b) {
1872; CHECK-LABEL: test_vceqgs:
1873; CHECK: vceqgs {{%v[0-9]+}}, %v24, %v26
1874; CHECK: ipm %r2
1875; CHECK: srl %r2, 28
1876; CHECK: br %r14
1877  %call = call {<2 x i64>, i32} @llvm.s390.vceqgs(<2 x i64> %a, <2 x i64> %b)
1878  %res = extractvalue {<2 x i64>, i32} %call, 1
1879  ret i32 %res
1880}
1881
1882; VCEQGS returning 1 if all elements are equal (CC == 0).
1883define i32 @test_vceqgs_all_bool(<2 x i64> %a, <2 x i64> %b) {
1884; CHECK-LABEL: test_vceqgs_all_bool:
1885; CHECK: vceqgs {{%v[0-9]+}}, %v24, %v26
1886; CHECK: ipm %r2
1887; CHECK: afi %r2, -268435456
1888; CHECK: srl %r2, 31
1889; CHECK: br %r14
1890  %call = call {<2 x i64>, i32} @llvm.s390.vceqgs(<2 x i64> %a, <2 x i64> %b)
1891  %res = extractvalue {<2 x i64>, i32} %call, 1
1892  %cmp = icmp ult i32 %res, 1
1893  %ext = zext i1 %cmp to i32
1894  ret i32 %ext
1895}
1896
1897; VCEQGS, storing to %ptr if all elements are equal.
1898define <2 x i64> @test_vceqgs_all_store(<2 x i64> %a, <2 x i64> %b, i32 *%ptr) {
1899; CHECK-LABEL: test_vceqgs_all_store:
1900; CHECK-NOT: %r
1901; CHECK: vceqgs %v24, %v24, %v26
1902; CHECK-NEXT: {{bnher|bner}} %r14
1903; CHECK: mvhi 0(%r2), 0
1904; CHECK: br %r14
1905  %call = call {<2 x i64>, i32} @llvm.s390.vceqgs(<2 x i64> %a, <2 x i64> %b)
1906  %res = extractvalue {<2 x i64>, i32} %call, 0
1907  %cc = extractvalue {<2 x i64>, i32} %call, 1
1908  %cmp = icmp sle i32 %cc, 0
1909  br i1 %cmp, label %store, label %exit
1910
1911store:
1912  store i32 0, i32 *%ptr
1913  br label %exit
1914
1915exit:
1916  ret <2 x i64> %res
1917}
1918
1919; VCHBS with no processing of the result.
1920define i32 @test_vchbs(<16 x i8> %a, <16 x i8> %b) {
1921; CHECK-LABEL: test_vchbs:
1922; CHECK: vchbs {{%v[0-9]+}}, %v24, %v26
1923; CHECK: ipm %r2
1924; CHECK: srl %r2, 28
1925; CHECK: br %r14
1926  %call = call {<16 x i8>, i32} @llvm.s390.vchbs(<16 x i8> %a, <16 x i8> %b)
1927  %res = extractvalue {<16 x i8>, i32} %call, 1
1928  ret i32 %res
1929}
1930
1931; VCHBS, returning 1 if any elements are higher (CC != 3).
1932define i32 @test_vchbs_any_bool(<16 x i8> %a, <16 x i8> %b) {
1933; CHECK-LABEL: test_vchbs_any_bool:
1934; CHECK: vchbs {{%v[0-9]+}}, %v24, %v26
1935; CHECK: ipm %r2
1936; CHECK: afi %r2, -536870912
1937; CHECK: srl %r2, 31
1938; CHECK: br %r14
1939  %call = call {<16 x i8>, i32} @llvm.s390.vchbs(<16 x i8> %a, <16 x i8> %b)
1940  %res = extractvalue {<16 x i8>, i32} %call, 1
1941  %cmp = icmp ne i32 %res, 3
1942  %ext = zext i1 %cmp to i32
1943  ret i32 %ext
1944}
1945
1946; VCHBS, storing to %ptr if any elements are higher.
1947define <16 x i8> @test_vchbs_any_store(<16 x i8> %a, <16 x i8> %b, i32 *%ptr) {
1948; CHECK-LABEL: test_vchbs_any_store:
1949; CHECK-NOT: %r
1950; CHECK: vchbs %v24, %v24, %v26
1951; CHECK-NEXT: {{bor|bnler}} %r14
1952; CHECK: mvhi 0(%r2), 0
1953; CHECK: br %r14
1954  %call = call {<16 x i8>, i32} @llvm.s390.vchbs(<16 x i8> %a, <16 x i8> %b)
1955  %res = extractvalue {<16 x i8>, i32} %call, 0
1956  %cc = extractvalue {<16 x i8>, i32} %call, 1
1957  %cmp = icmp ule i32 %cc, 2
1958  br i1 %cmp, label %store, label %exit
1959
1960store:
1961  store i32 0, i32 *%ptr
1962  br label %exit
1963
1964exit:
1965  ret <16 x i8> %res
1966}
1967
1968; VCHHS with no processing of the result.
1969define i32 @test_vchhs(<8 x i16> %a, <8 x i16> %b) {
1970; CHECK-LABEL: test_vchhs:
1971; CHECK: vchhs {{%v[0-9]+}}, %v24, %v26
1972; CHECK: ipm %r2
1973; CHECK: srl %r2, 28
1974; CHECK: br %r14
1975  %call = call {<8 x i16>, i32} @llvm.s390.vchhs(<8 x i16> %a, <8 x i16> %b)
1976  %res = extractvalue {<8 x i16>, i32} %call, 1
1977  ret i32 %res
1978}
1979
1980; VCHHS, returning 1 if not all elements are higher.
1981define i32 @test_vchhs_notall_bool(<8 x i16> %a, <8 x i16> %b) {
1982; CHECK-LABEL: test_vchhs_notall_bool:
1983; CHECK: vchhs {{%v[0-9]+}}, %v24, %v26
1984; CHECK: ipm [[REG:%r[0-5]]]
1985; CHECK: risblg %r2, [[REG]], 31, 159, 36
1986; CHECK: br %r14
1987  %call = call {<8 x i16>, i32} @llvm.s390.vchhs(<8 x i16> %a, <8 x i16> %b)
1988  %res = extractvalue {<8 x i16>, i32} %call, 1
1989  %cmp = icmp sge i32 %res, 1
1990  %ext = zext i1 %cmp to i32
1991  ret i32 %ext
1992}
1993
1994; VCHHS, storing to %ptr if not all elements are higher.
1995define <8 x i16> @test_vchhs_notall_store(<8 x i16> %a, <8 x i16> %b,
1996                                          i32 *%ptr) {
1997; CHECK-LABEL: test_vchhs_notall_store:
1998; CHECK-NOT: %r
1999; CHECK: vchhs %v24, %v24, %v26
2000; CHECK-NEXT: {{bher|ber}} %r14
2001; CHECK: mvhi 0(%r2), 0
2002; CHECK: br %r14
2003  %call = call {<8 x i16>, i32} @llvm.s390.vchhs(<8 x i16> %a, <8 x i16> %b)
2004  %res = extractvalue {<8 x i16>, i32} %call, 0
2005  %cc = extractvalue {<8 x i16>, i32} %call, 1
2006  %cmp = icmp ugt i32 %cc, 0
2007  br i1 %cmp, label %store, label %exit
2008
2009store:
2010  store i32 0, i32 *%ptr
2011  br label %exit
2012
2013exit:
2014  ret <8 x i16> %res
2015}
2016
2017; VCHFS with no processing of the result.
2018define i32 @test_vchfs(<4 x i32> %a, <4 x i32> %b) {
2019; CHECK-LABEL: test_vchfs:
2020; CHECK: vchfs {{%v[0-9]+}}, %v24, %v26
2021; CHECK: ipm %r2
2022; CHECK: srl %r2, 28
2023; CHECK: br %r14
2024  %call = call {<4 x i32>, i32} @llvm.s390.vchfs(<4 x i32> %a, <4 x i32> %b)
2025  %res = extractvalue {<4 x i32>, i32} %call, 1
2026  ret i32 %res
2027}
2028
2029; VCHFS, returning 1 if no elements are higher.
2030define i32 @test_vchfs_none_bool(<4 x i32> %a, <4 x i32> %b) {
2031; CHECK-LABEL: test_vchfs_none_bool:
2032; CHECK: vchfs {{%v[0-9]+}}, %v24, %v26
2033; CHECK: ipm [[REG:%r[0-5]]]
2034; CHECK: risblg %r2, [[REG]], 31, 159, 35
2035; CHECK: br %r14
2036  %call = call {<4 x i32>, i32} @llvm.s390.vchfs(<4 x i32> %a, <4 x i32> %b)
2037  %res = extractvalue {<4 x i32>, i32} %call, 1
2038  %cmp = icmp eq i32 %res, 3
2039  %ext = zext i1 %cmp to i32
2040  ret i32 %ext
2041}
2042
2043; VCHFS, storing to %ptr if no elements are higher.
2044define <4 x i32> @test_vchfs_none_store(<4 x i32> %a, <4 x i32> %b, i32 *%ptr) {
2045; CHECK-LABEL: test_vchfs_none_store:
2046; CHECK-NOT: %r
2047; CHECK: vchfs %v24, %v24, %v26
2048; CHECK-NEXT: {{bnor|bler}} %r14
2049; CHECK: mvhi 0(%r2), 0
2050; CHECK: br %r14
2051  %call = call {<4 x i32>, i32} @llvm.s390.vchfs(<4 x i32> %a, <4 x i32> %b)
2052  %res = extractvalue {<4 x i32>, i32} %call, 0
2053  %cc = extractvalue {<4 x i32>, i32} %call, 1
2054  %cmp = icmp uge i32 %cc, 3
2055  br i1 %cmp, label %store, label %exit
2056
2057store:
2058  store i32 0, i32 *%ptr
2059  br label %exit
2060
2061exit:
2062  ret <4 x i32> %res
2063}
2064
2065; VCHGS with no processing of the result.
2066define i32 @test_vchgs(<2 x i64> %a, <2 x i64> %b) {
2067; CHECK-LABEL: test_vchgs:
2068; CHECK: vchgs {{%v[0-9]+}}, %v24, %v26
2069; CHECK: ipm %r2
2070; CHECK: srl %r2, 28
2071; CHECK: br %r14
2072  %call = call {<2 x i64>, i32} @llvm.s390.vchgs(<2 x i64> %a, <2 x i64> %b)
2073  %res = extractvalue {<2 x i64>, i32} %call, 1
2074  ret i32 %res
2075}
2076
2077; VCHGS returning 1 if all elements are higher (CC == 0).
2078define i32 @test_vchgs_all_bool(<2 x i64> %a, <2 x i64> %b) {
2079; CHECK-LABEL: test_vchgs_all_bool:
2080; CHECK: vchgs {{%v[0-9]+}}, %v24, %v26
2081; CHECK: ipm %r2
2082; CHECK: afi %r2, -268435456
2083; CHECK: srl %r2, 31
2084; CHECK: br %r14
2085  %call = call {<2 x i64>, i32} @llvm.s390.vchgs(<2 x i64> %a, <2 x i64> %b)
2086  %res = extractvalue {<2 x i64>, i32} %call, 1
2087  %cmp = icmp ult i32 %res, 1
2088  %ext = zext i1 %cmp to i32
2089  ret i32 %ext
2090}
2091
2092; VCHGS, storing to %ptr if all elements are higher.
2093define <2 x i64> @test_vchgs_all_store(<2 x i64> %a, <2 x i64> %b, i32 *%ptr) {
2094; CHECK-LABEL: test_vchgs_all_store:
2095; CHECK-NOT: %r
2096; CHECK: vchgs %v24, %v24, %v26
2097; CHECK-NEXT: {{bnher|bner}} %r14
2098; CHECK: mvhi 0(%r2), 0
2099; CHECK: br %r14
2100  %call = call {<2 x i64>, i32} @llvm.s390.vchgs(<2 x i64> %a, <2 x i64> %b)
2101  %res = extractvalue {<2 x i64>, i32} %call, 0
2102  %cc = extractvalue {<2 x i64>, i32} %call, 1
2103  %cmp = icmp sle i32 %cc, 0
2104  br i1 %cmp, label %store, label %exit
2105
2106store:
2107  store i32 0, i32 *%ptr
2108  br label %exit
2109
2110exit:
2111  ret <2 x i64> %res
2112}
2113
2114; VCHLBS with no processing of the result.
2115define i32 @test_vchlbs(<16 x i8> %a, <16 x i8> %b) {
2116; CHECK-LABEL: test_vchlbs:
2117; CHECK: vchlbs {{%v[0-9]+}}, %v24, %v26
2118; CHECK: ipm %r2
2119; CHECK: srl %r2, 28
2120; CHECK: br %r14
2121  %call = call {<16 x i8>, i32} @llvm.s390.vchlbs(<16 x i8> %a, <16 x i8> %b)
2122  %res = extractvalue {<16 x i8>, i32} %call, 1
2123  ret i32 %res
2124}
2125
2126; VCHLBS, returning 1 if any elements are higher (CC != 3).
2127define i32 @test_vchlbs_any_bool(<16 x i8> %a, <16 x i8> %b) {
2128; CHECK-LABEL: test_vchlbs_any_bool:
2129; CHECK: vchlbs {{%v[0-9]+}}, %v24, %v26
2130; CHECK: ipm %r2
2131; CHECK: afi %r2, -536870912
2132; CHECK: srl %r2, 31
2133; CHECK: br %r14
2134  %call = call {<16 x i8>, i32} @llvm.s390.vchlbs(<16 x i8> %a, <16 x i8> %b)
2135  %res = extractvalue {<16 x i8>, i32} %call, 1
2136  %cmp = icmp ne i32 %res, 3
2137  %ext = zext i1 %cmp to i32
2138  ret i32 %ext
2139}
2140
2141; VCHLBS, storing to %ptr if any elements are higher.
2142define <16 x i8> @test_vchlbs_any_store(<16 x i8> %a, <16 x i8> %b, i32 *%ptr) {
2143; CHECK-LABEL: test_vchlbs_any_store:
2144; CHECK-NOT: %r
2145; CHECK: vchlbs %v24, %v24, %v26
2146; CHECK-NEXT: {{bor|bnler}} %r14
2147; CHECK: mvhi 0(%r2), 0
2148; CHECK: br %r14
2149  %call = call {<16 x i8>, i32} @llvm.s390.vchlbs(<16 x i8> %a, <16 x i8> %b)
2150  %res = extractvalue {<16 x i8>, i32} %call, 0
2151  %cc = extractvalue {<16 x i8>, i32} %call, 1
2152  %cmp = icmp sle i32 %cc, 2
2153  br i1 %cmp, label %store, label %exit
2154
2155store:
2156  store i32 0, i32 *%ptr
2157  br label %exit
2158
2159exit:
2160  ret <16 x i8> %res
2161}
2162
2163; VCHLHS with no processing of the result.
2164define i32 @test_vchlhs(<8 x i16> %a, <8 x i16> %b) {
2165; CHECK-LABEL: test_vchlhs:
2166; CHECK: vchlhs {{%v[0-9]+}}, %v24, %v26
2167; CHECK: ipm %r2
2168; CHECK: srl %r2, 28
2169; CHECK: br %r14
2170  %call = call {<8 x i16>, i32} @llvm.s390.vchlhs(<8 x i16> %a, <8 x i16> %b)
2171  %res = extractvalue {<8 x i16>, i32} %call, 1
2172  ret i32 %res
2173}
2174
2175; VCHLHS, returning 1 if not all elements are higher.
2176define i32 @test_vchlhs_notall_bool(<8 x i16> %a, <8 x i16> %b) {
2177; CHECK-LABEL: test_vchlhs_notall_bool:
2178; CHECK: vchlhs {{%v[0-9]+}}, %v24, %v26
2179; CHECK: ipm [[REG:%r[0-5]]]
2180; CHECK: risblg %r2, [[REG]], 31, 159, 36
2181; CHECK: br %r14
2182  %call = call {<8 x i16>, i32} @llvm.s390.vchlhs(<8 x i16> %a, <8 x i16> %b)
2183  %res = extractvalue {<8 x i16>, i32} %call, 1
2184  %cmp = icmp uge i32 %res, 1
2185  %ext = zext i1 %cmp to i32
2186  ret i32 %ext
2187}
2188
2189; VCHLHS, storing to %ptr if not all elements are higher.
2190define <8 x i16> @test_vchlhs_notall_store(<8 x i16> %a, <8 x i16> %b,
2191                                           i32 *%ptr) {
2192; CHECK-LABEL: test_vchlhs_notall_store:
2193; CHECK-NOT: %r
2194; CHECK: vchlhs %v24, %v24, %v26
2195; CHECK-NEXT: {{bher|ber}} %r14
2196; CHECK: mvhi 0(%r2), 0
2197; CHECK: br %r14
2198  %call = call {<8 x i16>, i32} @llvm.s390.vchlhs(<8 x i16> %a, <8 x i16> %b)
2199  %res = extractvalue {<8 x i16>, i32} %call, 0
2200  %cc = extractvalue {<8 x i16>, i32} %call, 1
2201  %cmp = icmp sgt i32 %cc, 0
2202  br i1 %cmp, label %store, label %exit
2203
2204store:
2205  store i32 0, i32 *%ptr
2206  br label %exit
2207
2208exit:
2209  ret <8 x i16> %res
2210}
2211
2212; VCHLFS with no processing of the result.
2213define i32 @test_vchlfs(<4 x i32> %a, <4 x i32> %b) {
2214; CHECK-LABEL: test_vchlfs:
2215; CHECK: vchlfs {{%v[0-9]+}}, %v24, %v26
2216; CHECK: ipm %r2
2217; CHECK: srl %r2, 28
2218; CHECK: br %r14
2219  %call = call {<4 x i32>, i32} @llvm.s390.vchlfs(<4 x i32> %a, <4 x i32> %b)
2220  %res = extractvalue {<4 x i32>, i32} %call, 1
2221  ret i32 %res
2222}
2223
2224; VCHLFS, returning 1 if no elements are higher.
2225define i32 @test_vchlfs_none_bool(<4 x i32> %a, <4 x i32> %b) {
2226; CHECK-LABEL: test_vchlfs_none_bool:
2227; CHECK: vchlfs {{%v[0-9]+}}, %v24, %v26
2228; CHECK: ipm [[REG:%r[0-5]]]
2229; CHECK: risblg %r2, [[REG]], 31, 159, 35
2230; CHECK: br %r14
2231  %call = call {<4 x i32>, i32} @llvm.s390.vchlfs(<4 x i32> %a, <4 x i32> %b)
2232  %res = extractvalue {<4 x i32>, i32} %call, 1
2233  %cmp = icmp eq i32 %res, 3
2234  %ext = zext i1 %cmp to i32
2235  ret i32 %ext
2236}
2237
2238; VCHLFS, storing to %ptr if no elements are higher.
2239define <4 x i32> @test_vchlfs_none_store(<4 x i32> %a, <4 x i32> %b,
2240                                         i32 *%ptr) {
2241; CHECK-LABEL: test_vchlfs_none_store:
2242; CHECK-NOT: %r
2243; CHECK: vchlfs %v24, %v24, %v26
2244; CHECK-NEXT: {{bnor|bler}} %r14
2245; CHECK: mvhi 0(%r2), 0
2246; CHECK: br %r14
2247  %call = call {<4 x i32>, i32} @llvm.s390.vchlfs(<4 x i32> %a, <4 x i32> %b)
2248  %res = extractvalue {<4 x i32>, i32} %call, 0
2249  %cc = extractvalue {<4 x i32>, i32} %call, 1
2250  %cmp = icmp sge i32 %cc, 3
2251  br i1 %cmp, label %store, label %exit
2252
2253store:
2254  store i32 0, i32 *%ptr
2255  br label %exit
2256
2257exit:
2258  ret <4 x i32> %res
2259}
2260
2261; VCHLGS with no processing of the result.
2262define i32 @test_vchlgs(<2 x i64> %a, <2 x i64> %b) {
2263; CHECK-LABEL: test_vchlgs:
2264; CHECK: vchlgs {{%v[0-9]+}}, %v24, %v26
2265; CHECK: ipm %r2
2266; CHECK: srl %r2, 28
2267; CHECK: br %r14
2268  %call = call {<2 x i64>, i32} @llvm.s390.vchlgs(<2 x i64> %a, <2 x i64> %b)
2269  %res = extractvalue {<2 x i64>, i32} %call, 1
2270  ret i32 %res
2271}
2272
2273; VCHLGS returning 1 if all elements are higher (CC == 0).
2274define i32 @test_vchlgs_all_bool(<2 x i64> %a, <2 x i64> %b) {
2275; CHECK-LABEL: test_vchlgs_all_bool:
2276; CHECK: vchlgs {{%v[0-9]+}}, %v24, %v26
2277; CHECK: ipm %r2
2278; CHECK: afi %r2, -268435456
2279; CHECK: srl %r2, 31
2280; CHECK: br %r14
2281  %call = call {<2 x i64>, i32} @llvm.s390.vchlgs(<2 x i64> %a, <2 x i64> %b)
2282  %res = extractvalue {<2 x i64>, i32} %call, 1
2283  %cmp = icmp slt i32 %res, 1
2284  %ext = zext i1 %cmp to i32
2285  ret i32 %ext
2286}
2287
2288; VCHLGS, storing to %ptr if all elements are higher.
2289define <2 x i64> @test_vchlgs_all_store(<2 x i64> %a, <2 x i64> %b, i32 *%ptr) {
2290; CHECK-LABEL: test_vchlgs_all_store:
2291; CHECK-NOT: %r
2292; CHECK: vchlgs %v24, %v24, %v26
2293; CHECK-NEXT: {{bnher|bner}} %r14
2294; CHECK: mvhi 0(%r2), 0
2295; CHECK: br %r14
2296  %call = call {<2 x i64>, i32} @llvm.s390.vchlgs(<2 x i64> %a, <2 x i64> %b)
2297  %res = extractvalue {<2 x i64>, i32} %call, 0
2298  %cc = extractvalue {<2 x i64>, i32} %call, 1
2299  %cmp = icmp ule i32 %cc, 0
2300  br i1 %cmp, label %store, label %exit
2301
2302store:
2303  store i32 0, i32 *%ptr
2304  br label %exit
2305
2306exit:
2307  ret <2 x i64> %res
2308}
2309
2310; VFAEB with !IN !RT.
2311define <16 x i8> @test_vfaeb_0(<16 x i8> %a, <16 x i8> %b) {
2312; CHECK-LABEL: test_vfaeb_0:
2313; CHECK: vfaeb %v24, %v24, %v26, 0
2314; CHECK: br %r14
2315  %res = call <16 x i8> @llvm.s390.vfaeb(<16 x i8> %a, <16 x i8> %b, i32 0)
2316  ret <16 x i8> %res
2317}
2318
2319; VFAEB with !IN RT.
2320define <16 x i8> @test_vfaeb_4(<16 x i8> %a, <16 x i8> %b) {
2321; CHECK-LABEL: test_vfaeb_4:
2322; CHECK: vfaeb %v24, %v24, %v26, 4
2323; CHECK: br %r14
2324  %res = call <16 x i8> @llvm.s390.vfaeb(<16 x i8> %a, <16 x i8> %b, i32 4)
2325  ret <16 x i8> %res
2326}
2327
2328; VFAEB with IN !RT.
2329define <16 x i8> @test_vfaeb_8(<16 x i8> %a, <16 x i8> %b) {
2330; CHECK-LABEL: test_vfaeb_8:
2331; CHECK: vfaeb %v24, %v24, %v26, 8
2332; CHECK: br %r14
2333  %res = call <16 x i8> @llvm.s390.vfaeb(<16 x i8> %a, <16 x i8> %b, i32 8)
2334  ret <16 x i8> %res
2335}
2336
2337; VFAEB with IN RT.
2338define <16 x i8> @test_vfaeb_12(<16 x i8> %a, <16 x i8> %b) {
2339; CHECK-LABEL: test_vfaeb_12:
2340; CHECK: vfaeb %v24, %v24, %v26, 12
2341; CHECK: br %r14
2342  %res = call <16 x i8> @llvm.s390.vfaeb(<16 x i8> %a, <16 x i8> %b, i32 12)
2343  ret <16 x i8> %res
2344}
2345
2346; VFAEB with CS -- should be ignored.
2347define <16 x i8> @test_vfaeb_1(<16 x i8> %a, <16 x i8> %b) {
2348; CHECK-LABEL: test_vfaeb_1:
2349; CHECK: vfaeb %v24, %v24, %v26, 0
2350; CHECK: br %r14
2351  %res = call <16 x i8> @llvm.s390.vfaeb(<16 x i8> %a, <16 x i8> %b, i32 1)
2352  ret <16 x i8> %res
2353}
2354
2355; VFAEH.
2356define <8 x i16> @test_vfaeh(<8 x i16> %a, <8 x i16> %b) {
2357; CHECK-LABEL: test_vfaeh:
2358; CHECK: vfaeh %v24, %v24, %v26, 4
2359; CHECK: br %r14
2360  %res = call <8 x i16> @llvm.s390.vfaeh(<8 x i16> %a, <8 x i16> %b, i32 4)
2361  ret <8 x i16> %res
2362}
2363
2364; VFAEF.
2365define <4 x i32> @test_vfaef(<4 x i32> %a, <4 x i32> %b) {
2366; CHECK-LABEL: test_vfaef:
2367; CHECK: vfaef %v24, %v24, %v26, 8
2368; CHECK: br %r14
2369  %res = call <4 x i32> @llvm.s390.vfaef(<4 x i32> %a, <4 x i32> %b, i32 8)
2370  ret <4 x i32> %res
2371}
2372
2373; VFAEBS.
2374define <16 x i8> @test_vfaebs(<16 x i8> %a, <16 x i8> %b, i32 *%ccptr) {
2375; CHECK-LABEL: test_vfaebs:
2376; CHECK: vfaebs %v24, %v24, %v26, 0
2377; CHECK: ipm [[REG:%r[0-5]]]
2378; CHECK: srl [[REG]], 28
2379; CHECK: st [[REG]], 0(%r2)
2380; CHECK: br %r14
2381  %call = call {<16 x i8>, i32} @llvm.s390.vfaebs(<16 x i8> %a, <16 x i8> %b,
2382                                                  i32 0)
2383  %res = extractvalue {<16 x i8>, i32} %call, 0
2384  %cc = extractvalue {<16 x i8>, i32} %call, 1
2385  store i32 %cc, i32 *%ccptr
2386  ret <16 x i8> %res
2387}
2388
2389; VFAEHS.
2390define <8 x i16> @test_vfaehs(<8 x i16> %a, <8 x i16> %b, i32 *%ccptr) {
2391; CHECK-LABEL: test_vfaehs:
2392; CHECK: vfaehs %v24, %v24, %v26, 4
2393; CHECK: ipm [[REG:%r[0-5]]]
2394; CHECK: srl [[REG]], 28
2395; CHECK: st [[REG]], 0(%r2)
2396; CHECK: br %r14
2397  %call = call {<8 x i16>, i32} @llvm.s390.vfaehs(<8 x i16> %a, <8 x i16> %b,
2398                                                  i32 4)
2399  %res = extractvalue {<8 x i16>, i32} %call, 0
2400  %cc = extractvalue {<8 x i16>, i32} %call, 1
2401  store i32 %cc, i32 *%ccptr
2402  ret <8 x i16> %res
2403}
2404
2405; VFAEFS.
2406define <4 x i32> @test_vfaefs(<4 x i32> %a, <4 x i32> %b, i32 *%ccptr) {
2407; CHECK-LABEL: test_vfaefs:
2408; CHECK: vfaefs %v24, %v24, %v26, 8
2409; CHECK: ipm [[REG:%r[0-5]]]
2410; CHECK: srl [[REG]], 28
2411; CHECK: st [[REG]], 0(%r2)
2412; CHECK: br %r14
2413  %call = call {<4 x i32>, i32} @llvm.s390.vfaefs(<4 x i32> %a, <4 x i32> %b,
2414                                                  i32 8)
2415  %res = extractvalue {<4 x i32>, i32} %call, 0
2416  %cc = extractvalue {<4 x i32>, i32} %call, 1
2417  store i32 %cc, i32 *%ccptr
2418  ret <4 x i32> %res
2419}
2420
2421; VFAEZB with !IN !RT.
2422define <16 x i8> @test_vfaezb_0(<16 x i8> %a, <16 x i8> %b) {
2423; CHECK-LABEL: test_vfaezb_0:
2424; CHECK: vfaezb %v24, %v24, %v26, 0
2425; CHECK: br %r14
2426  %res = call <16 x i8> @llvm.s390.vfaezb(<16 x i8> %a, <16 x i8> %b, i32 0)
2427  ret <16 x i8> %res
2428}
2429
2430; VFAEZB with !IN RT.
2431define <16 x i8> @test_vfaezb_4(<16 x i8> %a, <16 x i8> %b) {
2432; CHECK-LABEL: test_vfaezb_4:
2433; CHECK: vfaezb %v24, %v24, %v26, 4
2434; CHECK: br %r14
2435  %res = call <16 x i8> @llvm.s390.vfaezb(<16 x i8> %a, <16 x i8> %b, i32 4)
2436  ret <16 x i8> %res
2437}
2438
2439; VFAEZB with IN !RT.
2440define <16 x i8> @test_vfaezb_8(<16 x i8> %a, <16 x i8> %b) {
2441; CHECK-LABEL: test_vfaezb_8:
2442; CHECK: vfaezb %v24, %v24, %v26, 8
2443; CHECK: br %r14
2444  %res = call <16 x i8> @llvm.s390.vfaezb(<16 x i8> %a, <16 x i8> %b, i32 8)
2445  ret <16 x i8> %res
2446}
2447
2448; VFAEZB with IN RT.
2449define <16 x i8> @test_vfaezb_12(<16 x i8> %a, <16 x i8> %b) {
2450; CHECK-LABEL: test_vfaezb_12:
2451; CHECK: vfaezb %v24, %v24, %v26, 12
2452; CHECK: br %r14
2453  %res = call <16 x i8> @llvm.s390.vfaezb(<16 x i8> %a, <16 x i8> %b, i32 12)
2454  ret <16 x i8> %res
2455}
2456
2457; VFAEZB with CS -- should be ignored.
2458define <16 x i8> @test_vfaezb_1(<16 x i8> %a, <16 x i8> %b) {
2459; CHECK-LABEL: test_vfaezb_1:
2460; CHECK: vfaezb %v24, %v24, %v26, 0
2461; CHECK: br %r14
2462  %res = call <16 x i8> @llvm.s390.vfaezb(<16 x i8> %a, <16 x i8> %b, i32 1)
2463  ret <16 x i8> %res
2464}
2465
2466; VFAEZH.
2467define <8 x i16> @test_vfaezh(<8 x i16> %a, <8 x i16> %b) {
2468; CHECK-LABEL: test_vfaezh:
2469; CHECK: vfaezh %v24, %v24, %v26, 4
2470; CHECK: br %r14
2471  %res = call <8 x i16> @llvm.s390.vfaezh(<8 x i16> %a, <8 x i16> %b, i32 4)
2472  ret <8 x i16> %res
2473}
2474
2475; VFAEZF.
2476define <4 x i32> @test_vfaezf(<4 x i32> %a, <4 x i32> %b) {
2477; CHECK-LABEL: test_vfaezf:
2478; CHECK: vfaezf %v24, %v24, %v26, 8
2479; CHECK: br %r14
2480  %res = call <4 x i32> @llvm.s390.vfaezf(<4 x i32> %a, <4 x i32> %b, i32 8)
2481  ret <4 x i32> %res
2482}
2483
2484; VFAEZBS.
2485define <16 x i8> @test_vfaezbs(<16 x i8> %a, <16 x i8> %b, i32 *%ccptr) {
2486; CHECK-LABEL: test_vfaezbs:
2487; CHECK: vfaezbs %v24, %v24, %v26, 0
2488; CHECK: ipm [[REG:%r[0-5]]]
2489; CHECK: srl [[REG]], 28
2490; CHECK: st [[REG]], 0(%r2)
2491; CHECK: br %r14
2492  %call = call {<16 x i8>, i32} @llvm.s390.vfaezbs(<16 x i8> %a, <16 x i8> %b,
2493                                                   i32 0)
2494  %res = extractvalue {<16 x i8>, i32} %call, 0
2495  %cc = extractvalue {<16 x i8>, i32} %call, 1
2496  store i32 %cc, i32 *%ccptr
2497  ret <16 x i8> %res
2498}
2499
2500; VFAEZHS.
2501define <8 x i16> @test_vfaezhs(<8 x i16> %a, <8 x i16> %b, i32 *%ccptr) {
2502; CHECK-LABEL: test_vfaezhs:
2503; CHECK: vfaezhs %v24, %v24, %v26, 4
2504; CHECK: ipm [[REG:%r[0-5]]]
2505; CHECK: srl [[REG]], 28
2506; CHECK: st [[REG]], 0(%r2)
2507; CHECK: br %r14
2508  %call = call {<8 x i16>, i32} @llvm.s390.vfaezhs(<8 x i16> %a, <8 x i16> %b,
2509                                                   i32 4)
2510  %res = extractvalue {<8 x i16>, i32} %call, 0
2511  %cc = extractvalue {<8 x i16>, i32} %call, 1
2512  store i32 %cc, i32 *%ccptr
2513  ret <8 x i16> %res
2514}
2515
2516; VFAEZFS.
2517define <4 x i32> @test_vfaezfs(<4 x i32> %a, <4 x i32> %b, i32 *%ccptr) {
2518; CHECK-LABEL: test_vfaezfs:
2519; CHECK: vfaezfs %v24, %v24, %v26, 8
2520; CHECK: ipm [[REG:%r[0-5]]]
2521; CHECK: srl [[REG]], 28
2522; CHECK: st [[REG]], 0(%r2)
2523; CHECK: br %r14
2524  %call = call {<4 x i32>, i32} @llvm.s390.vfaezfs(<4 x i32> %a, <4 x i32> %b,
2525                                                   i32 8)
2526  %res = extractvalue {<4 x i32>, i32} %call, 0
2527  %cc = extractvalue {<4 x i32>, i32} %call, 1
2528  store i32 %cc, i32 *%ccptr
2529  ret <4 x i32> %res
2530}
2531
2532; VFEEB.
2533define <16 x i8> @test_vfeeb_0(<16 x i8> %a, <16 x i8> %b) {
2534; CHECK-LABEL: test_vfeeb_0:
2535; CHECK: vfeeb %v24, %v24, %v26
2536; CHECK: br %r14
2537  %res = call <16 x i8> @llvm.s390.vfeeb(<16 x i8> %a, <16 x i8> %b)
2538  ret <16 x i8> %res
2539}
2540
2541; VFEEH.
2542define <8 x i16> @test_vfeeh(<8 x i16> %a, <8 x i16> %b) {
2543; CHECK-LABEL: test_vfeeh:
2544; CHECK: vfeeh %v24, %v24, %v26
2545; CHECK: br %r14
2546  %res = call <8 x i16> @llvm.s390.vfeeh(<8 x i16> %a, <8 x i16> %b)
2547  ret <8 x i16> %res
2548}
2549
2550; VFEEF.
2551define <4 x i32> @test_vfeef(<4 x i32> %a, <4 x i32> %b) {
2552; CHECK-LABEL: test_vfeef:
2553; CHECK: vfeef %v24, %v24, %v26
2554; CHECK: br %r14
2555  %res = call <4 x i32> @llvm.s390.vfeef(<4 x i32> %a, <4 x i32> %b)
2556  ret <4 x i32> %res
2557}
2558
2559; VFEEBS.
2560define <16 x i8> @test_vfeebs(<16 x i8> %a, <16 x i8> %b, i32 *%ccptr) {
2561; CHECK-LABEL: test_vfeebs:
2562; CHECK: vfeebs %v24, %v24, %v26
2563; CHECK: ipm [[REG:%r[0-5]]]
2564; CHECK: srl [[REG]], 28
2565; CHECK: st [[REG]], 0(%r2)
2566; CHECK: br %r14
2567  %call = call {<16 x i8>, i32} @llvm.s390.vfeebs(<16 x i8> %a, <16 x i8> %b)
2568  %res = extractvalue {<16 x i8>, i32} %call, 0
2569  %cc = extractvalue {<16 x i8>, i32} %call, 1
2570  store i32 %cc, i32 *%ccptr
2571  ret <16 x i8> %res
2572}
2573
2574; VFEEHS.
2575define <8 x i16> @test_vfeehs(<8 x i16> %a, <8 x i16> %b, i32 *%ccptr) {
2576; CHECK-LABEL: test_vfeehs:
2577; CHECK: vfeehs %v24, %v24, %v26
2578; CHECK: ipm [[REG:%r[0-5]]]
2579; CHECK: srl [[REG]], 28
2580; CHECK: st [[REG]], 0(%r2)
2581; CHECK: br %r14
2582  %call = call {<8 x i16>, i32} @llvm.s390.vfeehs(<8 x i16> %a, <8 x i16> %b)
2583  %res = extractvalue {<8 x i16>, i32} %call, 0
2584  %cc = extractvalue {<8 x i16>, i32} %call, 1
2585  store i32 %cc, i32 *%ccptr
2586  ret <8 x i16> %res
2587}
2588
2589; VFEEFS.
2590define <4 x i32> @test_vfeefs(<4 x i32> %a, <4 x i32> %b, i32 *%ccptr) {
2591; CHECK-LABEL: test_vfeefs:
2592; CHECK: vfeefs %v24, %v24, %v26
2593; CHECK: ipm [[REG:%r[0-5]]]
2594; CHECK: srl [[REG]], 28
2595; CHECK: st [[REG]], 0(%r2)
2596; CHECK: br %r14
2597  %call = call {<4 x i32>, i32} @llvm.s390.vfeefs(<4 x i32> %a, <4 x i32> %b)
2598  %res = extractvalue {<4 x i32>, i32} %call, 0
2599  %cc = extractvalue {<4 x i32>, i32} %call, 1
2600  store i32 %cc, i32 *%ccptr
2601  ret <4 x i32> %res
2602}
2603
2604; VFEEZB.
2605define <16 x i8> @test_vfeezb(<16 x i8> %a, <16 x i8> %b) {
2606; CHECK-LABEL: test_vfeezb:
2607; CHECK: vfeezb %v24, %v24, %v26
2608; CHECK: br %r14
2609  %res = call <16 x i8> @llvm.s390.vfeezb(<16 x i8> %a, <16 x i8> %b)
2610  ret <16 x i8> %res
2611}
2612
2613; VFEEZH.
2614define <8 x i16> @test_vfeezh(<8 x i16> %a, <8 x i16> %b) {
2615; CHECK-LABEL: test_vfeezh:
2616; CHECK: vfeezh %v24, %v24, %v26
2617; CHECK: br %r14
2618  %res = call <8 x i16> @llvm.s390.vfeezh(<8 x i16> %a, <8 x i16> %b)
2619  ret <8 x i16> %res
2620}
2621
2622; VFEEZF.
2623define <4 x i32> @test_vfeezf(<4 x i32> %a, <4 x i32> %b) {
2624; CHECK-LABEL: test_vfeezf:
2625; CHECK: vfeezf %v24, %v24, %v26
2626; CHECK: br %r14
2627  %res = call <4 x i32> @llvm.s390.vfeezf(<4 x i32> %a, <4 x i32> %b)
2628  ret <4 x i32> %res
2629}
2630
2631; VFEEZBS.
2632define <16 x i8> @test_vfeezbs(<16 x i8> %a, <16 x i8> %b, i32 *%ccptr) {
2633; CHECK-LABEL: test_vfeezbs:
2634; CHECK: vfeezbs %v24, %v24, %v26
2635; CHECK: ipm [[REG:%r[0-5]]]
2636; CHECK: srl [[REG]], 28
2637; CHECK: st [[REG]], 0(%r2)
2638; CHECK: br %r14
2639  %call = call {<16 x i8>, i32} @llvm.s390.vfeezbs(<16 x i8> %a, <16 x i8> %b)
2640  %res = extractvalue {<16 x i8>, i32} %call, 0
2641  %cc = extractvalue {<16 x i8>, i32} %call, 1
2642  store i32 %cc, i32 *%ccptr
2643  ret <16 x i8> %res
2644}
2645
2646; VFEEZHS.
2647define <8 x i16> @test_vfeezhs(<8 x i16> %a, <8 x i16> %b, i32 *%ccptr) {
2648; CHECK-LABEL: test_vfeezhs:
2649; CHECK: vfeezhs %v24, %v24, %v26
2650; CHECK: ipm [[REG:%r[0-5]]]
2651; CHECK: srl [[REG]], 28
2652; CHECK: st [[REG]], 0(%r2)
2653; CHECK: br %r14
2654  %call = call {<8 x i16>, i32} @llvm.s390.vfeezhs(<8 x i16> %a, <8 x i16> %b)
2655  %res = extractvalue {<8 x i16>, i32} %call, 0
2656  %cc = extractvalue {<8 x i16>, i32} %call, 1
2657  store i32 %cc, i32 *%ccptr
2658  ret <8 x i16> %res
2659}
2660
2661; VFEEZFS.
2662define <4 x i32> @test_vfeezfs(<4 x i32> %a, <4 x i32> %b, i32 *%ccptr) {
2663; CHECK-LABEL: test_vfeezfs:
2664; CHECK: vfeezfs %v24, %v24, %v26
2665; CHECK: ipm [[REG:%r[0-5]]]
2666; CHECK: srl [[REG]], 28
2667; CHECK: st [[REG]], 0(%r2)
2668; CHECK: br %r14
2669  %call = call {<4 x i32>, i32} @llvm.s390.vfeezfs(<4 x i32> %a, <4 x i32> %b)
2670  %res = extractvalue {<4 x i32>, i32} %call, 0
2671  %cc = extractvalue {<4 x i32>, i32} %call, 1
2672  store i32 %cc, i32 *%ccptr
2673  ret <4 x i32> %res
2674}
2675
2676; VFENEB.
2677define <16 x i8> @test_vfeneb_0(<16 x i8> %a, <16 x i8> %b) {
2678; CHECK-LABEL: test_vfeneb_0:
2679; CHECK: vfeneb %v24, %v24, %v26
2680; CHECK: br %r14
2681  %res = call <16 x i8> @llvm.s390.vfeneb(<16 x i8> %a, <16 x i8> %b)
2682  ret <16 x i8> %res
2683}
2684
2685; VFENEH.
2686define <8 x i16> @test_vfeneh(<8 x i16> %a, <8 x i16> %b) {
2687; CHECK-LABEL: test_vfeneh:
2688; CHECK: vfeneh %v24, %v24, %v26
2689; CHECK: br %r14
2690  %res = call <8 x i16> @llvm.s390.vfeneh(<8 x i16> %a, <8 x i16> %b)
2691  ret <8 x i16> %res
2692}
2693
2694; VFENEF.
2695define <4 x i32> @test_vfenef(<4 x i32> %a, <4 x i32> %b) {
2696; CHECK-LABEL: test_vfenef:
2697; CHECK: vfenef %v24, %v24, %v26
2698; CHECK: br %r14
2699  %res = call <4 x i32> @llvm.s390.vfenef(<4 x i32> %a, <4 x i32> %b)
2700  ret <4 x i32> %res
2701}
2702
2703; VFENEBS.
2704define <16 x i8> @test_vfenebs(<16 x i8> %a, <16 x i8> %b, i32 *%ccptr) {
2705; CHECK-LABEL: test_vfenebs:
2706; CHECK: vfenebs %v24, %v24, %v26
2707; CHECK: ipm [[REG:%r[0-5]]]
2708; CHECK: srl [[REG]], 28
2709; CHECK: st [[REG]], 0(%r2)
2710; CHECK: br %r14
2711  %call = call {<16 x i8>, i32} @llvm.s390.vfenebs(<16 x i8> %a, <16 x i8> %b)
2712  %res = extractvalue {<16 x i8>, i32} %call, 0
2713  %cc = extractvalue {<16 x i8>, i32} %call, 1
2714  store i32 %cc, i32 *%ccptr
2715  ret <16 x i8> %res
2716}
2717
2718; VFENEHS.
2719define <8 x i16> @test_vfenehs(<8 x i16> %a, <8 x i16> %b, i32 *%ccptr) {
2720; CHECK-LABEL: test_vfenehs:
2721; CHECK: vfenehs %v24, %v24, %v26
2722; CHECK: ipm [[REG:%r[0-5]]]
2723; CHECK: srl [[REG]], 28
2724; CHECK: st [[REG]], 0(%r2)
2725; CHECK: br %r14
2726  %call = call {<8 x i16>, i32} @llvm.s390.vfenehs(<8 x i16> %a, <8 x i16> %b)
2727  %res = extractvalue {<8 x i16>, i32} %call, 0
2728  %cc = extractvalue {<8 x i16>, i32} %call, 1
2729  store i32 %cc, i32 *%ccptr
2730  ret <8 x i16> %res
2731}
2732
2733; VFENEFS.
2734define <4 x i32> @test_vfenefs(<4 x i32> %a, <4 x i32> %b, i32 *%ccptr) {
2735; CHECK-LABEL: test_vfenefs:
2736; CHECK: vfenefs %v24, %v24, %v26
2737; CHECK: ipm [[REG:%r[0-5]]]
2738; CHECK: srl [[REG]], 28
2739; CHECK: st [[REG]], 0(%r2)
2740; CHECK: br %r14
2741  %call = call {<4 x i32>, i32} @llvm.s390.vfenefs(<4 x i32> %a, <4 x i32> %b)
2742  %res = extractvalue {<4 x i32>, i32} %call, 0
2743  %cc = extractvalue {<4 x i32>, i32} %call, 1
2744  store i32 %cc, i32 *%ccptr
2745  ret <4 x i32> %res
2746}
2747
2748; VFENEZB.
2749define <16 x i8> @test_vfenezb(<16 x i8> %a, <16 x i8> %b) {
2750; CHECK-LABEL: test_vfenezb:
2751; CHECK: vfenezb %v24, %v24, %v26
2752; CHECK: br %r14
2753  %res = call <16 x i8> @llvm.s390.vfenezb(<16 x i8> %a, <16 x i8> %b)
2754  ret <16 x i8> %res
2755}
2756
2757; VFENEZH.
2758define <8 x i16> @test_vfenezh(<8 x i16> %a, <8 x i16> %b) {
2759; CHECK-LABEL: test_vfenezh:
2760; CHECK: vfenezh %v24, %v24, %v26
2761; CHECK: br %r14
2762  %res = call <8 x i16> @llvm.s390.vfenezh(<8 x i16> %a, <8 x i16> %b)
2763  ret <8 x i16> %res
2764}
2765
2766; VFENEZF.
2767define <4 x i32> @test_vfenezf(<4 x i32> %a, <4 x i32> %b) {
2768; CHECK-LABEL: test_vfenezf:
2769; CHECK: vfenezf %v24, %v24, %v26
2770; CHECK: br %r14
2771  %res = call <4 x i32> @llvm.s390.vfenezf(<4 x i32> %a, <4 x i32> %b)
2772  ret <4 x i32> %res
2773}
2774
2775; VFENEZBS.
2776define <16 x i8> @test_vfenezbs(<16 x i8> %a, <16 x i8> %b, i32 *%ccptr) {
2777; CHECK-LABEL: test_vfenezbs:
2778; CHECK: vfenezbs %v24, %v24, %v26
2779; CHECK: ipm [[REG:%r[0-5]]]
2780; CHECK: srl [[REG]], 28
2781; CHECK: st [[REG]], 0(%r2)
2782; CHECK: br %r14
2783  %call = call {<16 x i8>, i32} @llvm.s390.vfenezbs(<16 x i8> %a, <16 x i8> %b)
2784  %res = extractvalue {<16 x i8>, i32} %call, 0
2785  %cc = extractvalue {<16 x i8>, i32} %call, 1
2786  store i32 %cc, i32 *%ccptr
2787  ret <16 x i8> %res
2788}
2789
2790; VFENEZHS.
2791define <8 x i16> @test_vfenezhs(<8 x i16> %a, <8 x i16> %b, i32 *%ccptr) {
2792; CHECK-LABEL: test_vfenezhs:
2793; CHECK: vfenezhs %v24, %v24, %v26
2794; CHECK: ipm [[REG:%r[0-5]]]
2795; CHECK: srl [[REG]], 28
2796; CHECK: st [[REG]], 0(%r2)
2797; CHECK: br %r14
2798  %call = call {<8 x i16>, i32} @llvm.s390.vfenezhs(<8 x i16> %a, <8 x i16> %b)
2799  %res = extractvalue {<8 x i16>, i32} %call, 0
2800  %cc = extractvalue {<8 x i16>, i32} %call, 1
2801  store i32 %cc, i32 *%ccptr
2802  ret <8 x i16> %res
2803}
2804
2805; VFENEZFS.
2806define <4 x i32> @test_vfenezfs(<4 x i32> %a, <4 x i32> %b, i32 *%ccptr) {
2807; CHECK-LABEL: test_vfenezfs:
2808; CHECK: vfenezfs %v24, %v24, %v26
2809; CHECK: ipm [[REG:%r[0-5]]]
2810; CHECK: srl [[REG]], 28
2811; CHECK: st [[REG]], 0(%r2)
2812; CHECK: br %r14
2813  %call = call {<4 x i32>, i32} @llvm.s390.vfenezfs(<4 x i32> %a, <4 x i32> %b)
2814  %res = extractvalue {<4 x i32>, i32} %call, 0
2815  %cc = extractvalue {<4 x i32>, i32} %call, 1
2816  store i32 %cc, i32 *%ccptr
2817  ret <4 x i32> %res
2818}
2819
2820; VISTRB.
2821define <16 x i8> @test_vistrb(<16 x i8> %a) {
2822; CHECK-LABEL: test_vistrb:
2823; CHECK: vistrb %v24, %v24
2824; CHECK: br %r14
2825  %res = call <16 x i8> @llvm.s390.vistrb(<16 x i8> %a)
2826  ret <16 x i8> %res
2827}
2828
2829; VISTRH.
2830define <8 x i16> @test_vistrh(<8 x i16> %a) {
2831; CHECK-LABEL: test_vistrh:
2832; CHECK: vistrh %v24, %v24
2833; CHECK: br %r14
2834  %res = call <8 x i16> @llvm.s390.vistrh(<8 x i16> %a)
2835  ret <8 x i16> %res
2836}
2837
2838; VISTRF.
2839define <4 x i32> @test_vistrf(<4 x i32> %a) {
2840; CHECK-LABEL: test_vistrf:
2841; CHECK: vistrf %v24, %v24
2842; CHECK: br %r14
2843  %res = call <4 x i32> @llvm.s390.vistrf(<4 x i32> %a)
2844  ret <4 x i32> %res
2845}
2846
2847; VISTRBS.
2848define <16 x i8> @test_vistrbs(<16 x i8> %a, i32 *%ccptr) {
2849; CHECK-LABEL: test_vistrbs:
2850; CHECK: vistrbs %v24, %v24
2851; CHECK: ipm [[REG:%r[0-5]]]
2852; CHECK: srl [[REG]], 28
2853; CHECK: st [[REG]], 0(%r2)
2854; CHECK: br %r14
2855  %call = call {<16 x i8>, i32} @llvm.s390.vistrbs(<16 x i8> %a)
2856  %res = extractvalue {<16 x i8>, i32} %call, 0
2857  %cc = extractvalue {<16 x i8>, i32} %call, 1
2858  store i32 %cc, i32 *%ccptr
2859  ret <16 x i8> %res
2860}
2861
2862; VISTRHS.
2863define <8 x i16> @test_vistrhs(<8 x i16> %a, i32 *%ccptr) {
2864; CHECK-LABEL: test_vistrhs:
2865; CHECK: vistrhs %v24, %v24
2866; CHECK: ipm [[REG:%r[0-5]]]
2867; CHECK: srl [[REG]], 28
2868; CHECK: st [[REG]], 0(%r2)
2869; CHECK: br %r14
2870  %call = call {<8 x i16>, i32} @llvm.s390.vistrhs(<8 x i16> %a)
2871  %res = extractvalue {<8 x i16>, i32} %call, 0
2872  %cc = extractvalue {<8 x i16>, i32} %call, 1
2873  store i32 %cc, i32 *%ccptr
2874  ret <8 x i16> %res
2875}
2876
2877; VISTRFS.
2878define <4 x i32> @test_vistrfs(<4 x i32> %a, i32 *%ccptr) {
2879; CHECK-LABEL: test_vistrfs:
2880; CHECK: vistrfs %v24, %v24
2881; CHECK: ipm [[REG:%r[0-5]]]
2882; CHECK: srl [[REG]], 28
2883; CHECK: st [[REG]], 0(%r2)
2884; CHECK: br %r14
2885  %call = call {<4 x i32>, i32} @llvm.s390.vistrfs(<4 x i32> %a)
2886  %res = extractvalue {<4 x i32>, i32} %call, 0
2887  %cc = extractvalue {<4 x i32>, i32} %call, 1
2888  store i32 %cc, i32 *%ccptr
2889  ret <4 x i32> %res
2890}
2891
2892; VSTRCB with !IN !RT.
2893define <16 x i8> @test_vstrcb_0(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
2894; CHECK-LABEL: test_vstrcb_0:
2895; CHECK: vstrcb %v24, %v24, %v26, %v28, 0
2896; CHECK: br %r14
2897  %res = call <16 x i8> @llvm.s390.vstrcb(<16 x i8> %a, <16 x i8> %b,
2898                                          <16 x i8> %c, i32 0)
2899  ret <16 x i8> %res
2900}
2901
2902; VSTRCB with !IN RT.
2903define <16 x i8> @test_vstrcb_4(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
2904; CHECK-LABEL: test_vstrcb_4:
2905; CHECK: vstrcb %v24, %v24, %v26, %v28, 4
2906; CHECK: br %r14
2907  %res = call <16 x i8> @llvm.s390.vstrcb(<16 x i8> %a, <16 x i8> %b,
2908                                          <16 x i8> %c, i32 4)
2909  ret <16 x i8> %res
2910}
2911
2912; VSTRCB with IN !RT.
2913define <16 x i8> @test_vstrcb_8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
2914; CHECK-LABEL: test_vstrcb_8:
2915; CHECK: vstrcb %v24, %v24, %v26, %v28, 8
2916; CHECK: br %r14
2917  %res = call <16 x i8> @llvm.s390.vstrcb(<16 x i8> %a, <16 x i8> %b,
2918                                          <16 x i8> %c, i32 8)
2919  ret <16 x i8> %res
2920}
2921
2922; VSTRCB with IN RT.
2923define <16 x i8> @test_vstrcb_12(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
2924; CHECK-LABEL: test_vstrcb_12:
2925; CHECK: vstrcb %v24, %v24, %v26, %v28, 12
2926; CHECK: br %r14
2927  %res = call <16 x i8> @llvm.s390.vstrcb(<16 x i8> %a, <16 x i8> %b,
2928                                          <16 x i8> %c, i32 12)
2929  ret <16 x i8> %res
2930}
2931
2932; VSTRCB with CS -- should be ignored.
2933define <16 x i8> @test_vstrcb_1(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
2934; CHECK-LABEL: test_vstrcb_1:
2935; CHECK: vstrcb %v24, %v24, %v26, %v28, 0
2936; CHECK: br %r14
2937  %res = call <16 x i8> @llvm.s390.vstrcb(<16 x i8> %a, <16 x i8> %b,
2938                                          <16 x i8> %c, i32 1)
2939  ret <16 x i8> %res
2940}
2941
2942; VSTRCH.
2943define <8 x i16> @test_vstrch(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) {
2944; CHECK-LABEL: test_vstrch:
2945; CHECK: vstrch %v24, %v24, %v26, %v28, 4
2946; CHECK: br %r14
2947  %res = call <8 x i16> @llvm.s390.vstrch(<8 x i16> %a, <8 x i16> %b,
2948                                          <8 x i16> %c, i32 4)
2949  ret <8 x i16> %res
2950}
2951
2952; VSTRCF.
2953define <4 x i32> @test_vstrcf(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
2954; CHECK-LABEL: test_vstrcf:
2955; CHECK: vstrcf %v24, %v24, %v26, %v28, 8
2956; CHECK: br %r14
2957  %res = call <4 x i32> @llvm.s390.vstrcf(<4 x i32> %a, <4 x i32> %b,
2958                                          <4 x i32> %c, i32 8)
2959  ret <4 x i32> %res
2960}
2961
2962; VSTRCBS.
2963define <16 x i8> @test_vstrcbs(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c,
2964                               i32 *%ccptr) {
2965; CHECK-LABEL: test_vstrcbs:
2966; CHECK: vstrcbs %v24, %v24, %v26, %v28, 0
2967; CHECK: ipm [[REG:%r[0-5]]]
2968; CHECK: srl [[REG]], 28
2969; CHECK: st [[REG]], 0(%r2)
2970; CHECK: br %r14
2971  %call = call {<16 x i8>, i32} @llvm.s390.vstrcbs(<16 x i8> %a, <16 x i8> %b,
2972                                                   <16 x i8> %c, i32 0)
2973  %res = extractvalue {<16 x i8>, i32} %call, 0
2974  %cc = extractvalue {<16 x i8>, i32} %call, 1
2975  store i32 %cc, i32 *%ccptr
2976  ret <16 x i8> %res
2977}
2978
2979; VSTRCHS.
2980define <8 x i16> @test_vstrchs(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c,
2981                               i32 *%ccptr) {
2982; CHECK-LABEL: test_vstrchs:
2983; CHECK: vstrchs %v24, %v24, %v26, %v28, 4
2984; CHECK: ipm [[REG:%r[0-5]]]
2985; CHECK: srl [[REG]], 28
2986; CHECK: st [[REG]], 0(%r2)
2987; CHECK: br %r14
2988  %call = call {<8 x i16>, i32} @llvm.s390.vstrchs(<8 x i16> %a, <8 x i16> %b,
2989                                                   <8 x i16> %c, i32 4)
2990  %res = extractvalue {<8 x i16>, i32} %call, 0
2991  %cc = extractvalue {<8 x i16>, i32} %call, 1
2992  store i32 %cc, i32 *%ccptr
2993  ret <8 x i16> %res
2994}
2995
2996; VSTRCFS.
2997define <4 x i32> @test_vstrcfs(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c,
2998                               i32 *%ccptr) {
2999; CHECK-LABEL: test_vstrcfs:
3000; CHECK: vstrcfs %v24, %v24, %v26, %v28, 8
3001; CHECK: ipm [[REG:%r[0-5]]]
3002; CHECK: srl [[REG]], 28
3003; CHECK: st [[REG]], 0(%r2)
3004; CHECK: br %r14
3005  %call = call {<4 x i32>, i32} @llvm.s390.vstrcfs(<4 x i32> %a, <4 x i32> %b,
3006                                                   <4 x i32> %c, i32 8)
3007  %res = extractvalue {<4 x i32>, i32} %call, 0
3008  %cc = extractvalue {<4 x i32>, i32} %call, 1
3009  store i32 %cc, i32 *%ccptr
3010  ret <4 x i32> %res
3011}
3012
3013; VSTRCZB with !IN !RT.
3014define <16 x i8> @test_vstrczb_0(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
3015; CHECK-LABEL: test_vstrczb_0:
3016; CHECK: vstrczb %v24, %v24, %v26, %v28, 0
3017; CHECK: br %r14
3018  %res = call <16 x i8> @llvm.s390.vstrczb(<16 x i8> %a, <16 x i8> %b,
3019                                           <16 x i8> %c, i32 0)
3020  ret <16 x i8> %res
3021}
3022
3023; VSTRCZB with !IN RT.
3024define <16 x i8> @test_vstrczb_4(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
3025; CHECK-LABEL: test_vstrczb_4:
3026; CHECK: vstrczb %v24, %v24, %v26, %v28, 4
3027; CHECK: br %r14
3028  %res = call <16 x i8> @llvm.s390.vstrczb(<16 x i8> %a, <16 x i8> %b,
3029                                           <16 x i8> %c, i32 4)
3030  ret <16 x i8> %res
3031}
3032
3033; VSTRCZB with IN !RT.
3034define <16 x i8> @test_vstrczb_8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
3035; CHECK-LABEL: test_vstrczb_8:
3036; CHECK: vstrczb %v24, %v24, %v26, %v28, 8
3037; CHECK: br %r14
3038  %res = call <16 x i8> @llvm.s390.vstrczb(<16 x i8> %a, <16 x i8> %b,
3039                                           <16 x i8> %c, i32 8)
3040  ret <16 x i8> %res
3041}
3042
3043; VSTRCZB with IN RT.
3044define <16 x i8> @test_vstrczb_12(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
3045; CHECK-LABEL: test_vstrczb_12:
3046; CHECK: vstrczb %v24, %v24, %v26, %v28, 12
3047; CHECK: br %r14
3048  %res = call <16 x i8> @llvm.s390.vstrczb(<16 x i8> %a, <16 x i8> %b,
3049                                           <16 x i8> %c, i32 12)
3050  ret <16 x i8> %res
3051}
3052
3053; VSTRCZB with CS -- should be ignored.
3054define <16 x i8> @test_vstrczb_1(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
3055; CHECK-LABEL: test_vstrczb_1:
3056; CHECK: vstrczb %v24, %v24, %v26, %v28, 0
3057; CHECK: br %r14
3058  %res = call <16 x i8> @llvm.s390.vstrczb(<16 x i8> %a, <16 x i8> %b,
3059                                           <16 x i8> %c, i32 1)
3060  ret <16 x i8> %res
3061}
3062
3063; VSTRCZH.
3064define <8 x i16> @test_vstrczh(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c) {
3065; CHECK-LABEL: test_vstrczh:
3066; CHECK: vstrczh %v24, %v24, %v26, %v28, 4
3067; CHECK: br %r14
3068  %res = call <8 x i16> @llvm.s390.vstrczh(<8 x i16> %a, <8 x i16> %b,
3069                                           <8 x i16> %c,  i32 4)
3070  ret <8 x i16> %res
3071}
3072
3073; VSTRCZF.
3074define <4 x i32> @test_vstrczf(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
3075; CHECK-LABEL: test_vstrczf:
3076; CHECK: vstrczf %v24, %v24, %v26, %v28, 8
3077; CHECK: br %r14
3078  %res = call <4 x i32> @llvm.s390.vstrczf(<4 x i32> %a, <4 x i32> %b,
3079                                           <4 x i32> %c, i32 8)
3080  ret <4 x i32> %res
3081}
3082
3083; VSTRCZBS.
3084define <16 x i8> @test_vstrczbs(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c,
3085                                i32 *%ccptr) {
3086; CHECK-LABEL: test_vstrczbs:
3087; CHECK: vstrczbs %v24, %v24, %v26, %v28, 0
3088; CHECK: ipm [[REG:%r[0-5]]]
3089; CHECK: srl [[REG]], 28
3090; CHECK: st [[REG]], 0(%r2)
3091; CHECK: br %r14
3092  %call = call {<16 x i8>, i32} @llvm.s390.vstrczbs(<16 x i8> %a, <16 x i8> %b,
3093                                                    <16 x i8> %c, i32 0)
3094  %res = extractvalue {<16 x i8>, i32} %call, 0
3095  %cc = extractvalue {<16 x i8>, i32} %call, 1
3096  store i32 %cc, i32 *%ccptr
3097  ret <16 x i8> %res
3098}
3099
3100; VSTRCZHS.
3101define <8 x i16> @test_vstrczhs(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c,
3102                                i32 *%ccptr) {
3103; CHECK-LABEL: test_vstrczhs:
3104; CHECK: vstrczhs %v24, %v24, %v26, %v28, 4
3105; CHECK: ipm [[REG:%r[0-5]]]
3106; CHECK: srl [[REG]], 28
3107; CHECK: st [[REG]], 0(%r2)
3108; CHECK: br %r14
3109  %call = call {<8 x i16>, i32} @llvm.s390.vstrczhs(<8 x i16> %a, <8 x i16> %b,
3110                                                    <8 x i16> %c, i32 4)
3111  %res = extractvalue {<8 x i16>, i32} %call, 0
3112  %cc = extractvalue {<8 x i16>, i32} %call, 1
3113  store i32 %cc, i32 *%ccptr
3114  ret <8 x i16> %res
3115}
3116
3117; VSTRCZFS.
3118define <4 x i32> @test_vstrczfs(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c,
3119                                i32 *%ccptr) {
3120; CHECK-LABEL: test_vstrczfs:
3121; CHECK: vstrczfs %v24, %v24, %v26, %v28, 8
3122; CHECK: ipm [[REG:%r[0-5]]]
3123; CHECK: srl [[REG]], 28
3124; CHECK: st [[REG]], 0(%r2)
3125; CHECK: br %r14
3126  %call = call {<4 x i32>, i32} @llvm.s390.vstrczfs(<4 x i32> %a, <4 x i32> %b,
3127                                                    <4 x i32> %c, i32 8)
3128  %res = extractvalue {<4 x i32>, i32} %call, 0
3129  %cc = extractvalue {<4 x i32>, i32} %call, 1
3130  store i32 %cc, i32 *%ccptr
3131  ret <4 x i32> %res
3132}
3133
3134; VFCEDBS with no processing of the result.
3135define i32 @test_vfcedbs(<2 x double> %a, <2 x double> %b) {
3136; CHECK-LABEL: test_vfcedbs:
3137; CHECK: vfcedbs {{%v[0-9]+}}, %v24, %v26
3138; CHECK: ipm %r2
3139; CHECK: srl %r2, 28
3140; CHECK: br %r14
3141  %call = call {<2 x i64>, i32} @llvm.s390.vfcedbs(<2 x double> %a,
3142                                                   <2 x double> %b)
3143  %res = extractvalue {<2 x i64>, i32} %call, 1
3144  ret i32 %res
3145}
3146
3147; VFCEDBS, returning 1 if any elements are equal (CC != 3).
3148define i32 @test_vfcedbs_any_bool(<2 x double> %a, <2 x double> %b) {
3149; CHECK-LABEL: test_vfcedbs_any_bool:
3150; CHECK: vfcedbs {{%v[0-9]+}}, %v24, %v26
3151; CHECK: ipm %r2
3152; CHECK: afi %r2, -536870912
3153; CHECK: srl %r2, 31
3154; CHECK: br %r14
3155  %call = call {<2 x i64>, i32} @llvm.s390.vfcedbs(<2 x double> %a,
3156                                                   <2 x double> %b)
3157  %res = extractvalue {<2 x i64>, i32} %call, 1
3158  %cmp = icmp ne i32 %res, 3
3159  %ext = zext i1 %cmp to i32
3160  ret i32 %ext
3161}
3162
3163; VFCEDBS, storing to %ptr if any elements are equal.
3164define <2 x i64> @test_vfcedbs_any_store(<2 x double> %a, <2 x double> %b,
3165                                         i32 *%ptr) {
3166; CHECK-LABEL: test_vfcedbs_any_store:
3167; CHECK-NOT: %r
3168; CHECK: vfcedbs %v24, %v24, %v26
3169; CHECK-NEXT: {{bor|bnler}} %r14
3170; CHECK: mvhi 0(%r2), 0
3171; CHECK: br %r14
3172  %call = call {<2 x i64>, i32} @llvm.s390.vfcedbs(<2 x double> %a,
3173                                                   <2 x double> %b)
3174  %res = extractvalue {<2 x i64>, i32} %call, 0
3175  %cc = extractvalue {<2 x i64>, i32} %call, 1
3176  %cmp = icmp ule i32 %cc, 2
3177  br i1 %cmp, label %store, label %exit
3178
3179store:
3180  store i32 0, i32 *%ptr
3181  br label %exit
3182
3183exit:
3184  ret <2 x i64> %res
3185}
3186
3187; VFCHDBS with no processing of the result.
3188define i32 @test_vfchdbs(<2 x double> %a, <2 x double> %b) {
3189; CHECK-LABEL: test_vfchdbs:
3190; CHECK: vfchdbs {{%v[0-9]+}}, %v24, %v26
3191; CHECK: ipm %r2
3192; CHECK: srl %r2, 28
3193; CHECK: br %r14
3194  %call = call {<2 x i64>, i32} @llvm.s390.vfchdbs(<2 x double> %a,
3195                                                   <2 x double> %b)
3196  %res = extractvalue {<2 x i64>, i32} %call, 1
3197  ret i32 %res
3198}
3199
3200; VFCHDBS, returning 1 if not all elements are higher.
3201define i32 @test_vfchdbs_notall_bool(<2 x double> %a, <2 x double> %b) {
3202; CHECK-LABEL: test_vfchdbs_notall_bool:
3203; CHECK: vfchdbs {{%v[0-9]+}}, %v24, %v26
3204; CHECK: ipm [[REG:%r[0-5]]]
3205; CHECK: risblg %r2, [[REG]], 31, 159, 36
3206; CHECK: br %r14
3207  %call = call {<2 x i64>, i32} @llvm.s390.vfchdbs(<2 x double> %a,
3208                                                   <2 x double> %b)
3209  %res = extractvalue {<2 x i64>, i32} %call, 1
3210  %cmp = icmp sge i32 %res, 1
3211  %ext = zext i1 %cmp to i32
3212  ret i32 %ext
3213}
3214
3215; VFCHDBS, storing to %ptr if not all elements are higher.
3216define <2 x i64> @test_vfchdbs_notall_store(<2 x double> %a, <2 x double> %b,
3217                                            i32 *%ptr) {
3218; CHECK-LABEL: test_vfchdbs_notall_store:
3219; CHECK-NOT: %r
3220; CHECK: vfchdbs %v24, %v24, %v26
3221; CHECK-NEXT: {{bher|ber}} %r14
3222; CHECK: mvhi 0(%r2), 0
3223; CHECK: br %r14
3224  %call = call {<2 x i64>, i32} @llvm.s390.vfchdbs(<2 x double> %a,
3225                                                   <2 x double> %b)
3226  %res = extractvalue {<2 x i64>, i32} %call, 0
3227  %cc = extractvalue {<2 x i64>, i32} %call, 1
3228  %cmp = icmp ugt i32 %cc, 0
3229  br i1 %cmp, label %store, label %exit
3230
3231store:
3232  store i32 0, i32 *%ptr
3233  br label %exit
3234
3235exit:
3236  ret <2 x i64> %res
3237}
3238
3239; VFCHEDBS with no processing of the result.
3240define i32 @test_vfchedbs(<2 x double> %a, <2 x double> %b) {
3241; CHECK-LABEL: test_vfchedbs:
3242; CHECK: vfchedbs {{%v[0-9]+}}, %v24, %v26
3243; CHECK: ipm %r2
3244; CHECK: srl %r2, 28
3245; CHECK: br %r14
3246  %call = call {<2 x i64>, i32} @llvm.s390.vfchedbs(<2 x double> %a,
3247						    <2 x double> %b)
3248  %res = extractvalue {<2 x i64>, i32} %call, 1
3249  ret i32 %res
3250}
3251
3252; VFCHEDBS, returning 1 if neither element is higher or equal.
3253define i32 @test_vfchedbs_none_bool(<2 x double> %a, <2 x double> %b) {
3254; CHECK-LABEL: test_vfchedbs_none_bool:
3255; CHECK: vfchedbs {{%v[0-9]+}}, %v24, %v26
3256; CHECK: ipm [[REG:%r[0-5]]]
3257; CHECK: risblg %r2, [[REG]], 31, 159, 35
3258; CHECK: br %r14
3259  %call = call {<2 x i64>, i32} @llvm.s390.vfchedbs(<2 x double> %a,
3260						    <2 x double> %b)
3261  %res = extractvalue {<2 x i64>, i32} %call, 1
3262  %cmp = icmp eq i32 %res, 3
3263  %ext = zext i1 %cmp to i32
3264  ret i32 %ext
3265}
3266
3267; VFCHEDBS, storing to %ptr if neither element is higher or equal.
3268define <2 x i64> @test_vfchedbs_none_store(<2 x double> %a, <2 x double> %b,
3269                                           i32 *%ptr) {
3270; CHECK-LABEL: test_vfchedbs_none_store:
3271; CHECK-NOT: %r
3272; CHECK: vfchedbs %v24, %v24, %v26
3273; CHECK-NEXT: {{bnor|bler}} %r14
3274; CHECK: mvhi 0(%r2), 0
3275; CHECK: br %r14
3276  %call = call {<2 x i64>, i32} @llvm.s390.vfchedbs(<2 x double> %a,
3277						    <2 x double> %b)
3278  %res = extractvalue {<2 x i64>, i32} %call, 0
3279  %cc = extractvalue {<2 x i64>, i32} %call, 1
3280  %cmp = icmp uge i32 %cc, 3
3281  br i1 %cmp, label %store, label %exit
3282
3283store:
3284  store i32 0, i32 *%ptr
3285  br label %exit
3286
3287exit:
3288  ret <2 x i64> %res
3289}
3290
3291; VFTCIDB with the lowest useful class selector and no processing of the result.
3292define i32 @test_vftcidb(<2 x double> %a) {
3293; CHECK-LABEL: test_vftcidb:
3294; CHECK: vftcidb {{%v[0-9]+}}, %v24, 1
3295; CHECK: ipm %r2
3296; CHECK: srl %r2, 28
3297; CHECK: br %r14
3298  %call = call {<2 x i64>, i32} @llvm.s390.vftcidb(<2 x double> %a, i32 1)
3299  %res = extractvalue {<2 x i64>, i32} %call, 1
3300  ret i32 %res
3301}
3302
3303; VFTCIDB with the highest useful class selector, returning 1 if all elements
3304; have the right class (CC == 0).
3305define i32 @test_vftcidb_all_bool(<2 x double> %a) {
3306; CHECK-LABEL: test_vftcidb_all_bool:
3307; CHECK: vftcidb {{%v[0-9]+}}, %v24, 4094
3308; CHECK: afi %r2, -268435456
3309; CHECK: srl %r2, 31
3310; CHECK: br %r14
3311  %call = call {<2 x i64>, i32} @llvm.s390.vftcidb(<2 x double> %a, i32 4094)
3312  %res = extractvalue {<2 x i64>, i32} %call, 1
3313  %cmp = icmp eq i32 %res, 0
3314  %ext = zext i1 %cmp to i32
3315  ret i32 %ext
3316}
3317
3318; VFIDB with a rounding mode not usable via standard intrinsics.
3319define <2 x double> @test_vfidb_0_4(<2 x double> %a) {
3320; CHECK-LABEL: test_vfidb_0_4:
3321; CHECK: vfidb %v24, %v24, 0, 4
3322; CHECK: br %r14
3323  %res = call <2 x double> @llvm.s390.vfidb(<2 x double> %a, i32 0, i32 4)
3324  ret <2 x double> %res
3325}
3326
3327; VFIDB with IEEE-inexact exception suppressed.
3328define <2 x double> @test_vfidb_4_0(<2 x double> %a) {
3329; CHECK-LABEL: test_vfidb_4_0:
3330; CHECK: vfidb %v24, %v24, 4, 0
3331; CHECK: br %r14
3332  %res = call <2 x double> @llvm.s390.vfidb(<2 x double> %a, i32 4, i32 0)
3333  ret <2 x double> %res
3334}
3335
3336