1; Test vector negation.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
4
5; Test a v16i8 negation.
6define <16 x i8> @f1(<16 x i8> %dummy, <16 x i8> %val) {
7; CHECK-LABEL: f1:
8; CHECK: vlcb %v24, %v26
9; CHECK: br %r14
10  %ret = sub <16 x i8> zeroinitializer, %val
11  ret <16 x i8> %ret
12}
13
14; Test a v8i16 negation.
15define <8 x i16> @f2(<8 x i16> %dummy, <8 x i16> %val) {
16; CHECK-LABEL: f2:
17; CHECK: vlch %v24, %v26
18; CHECK: br %r14
19  %ret = sub <8 x i16> zeroinitializer, %val
20  ret <8 x i16> %ret
21}
22
23; Test a v4i32 negation.
24define <4 x i32> @f3(<4 x i32> %dummy, <4 x i32> %val) {
25; CHECK-LABEL: f3:
26; CHECK: vlcf %v24, %v26
27; CHECK: br %r14
28  %ret = sub <4 x i32> zeroinitializer, %val
29  ret <4 x i32> %ret
30}
31
32; Test a v2i64 negation.
33define <2 x i64> @f4(<2 x i64> %dummy, <2 x i64> %val) {
34; CHECK-LABEL: f4:
35; CHECK: vlcg %v24, %v26
36; CHECK: br %r14
37  %ret = sub <2 x i64> zeroinitializer, %val
38  ret <2 x i64> %ret
39}
40
41; Test a v2f64 negation.
42define <2 x double> @f5(<2 x double> %dummy, <2 x double> %val) {
43; CHECK-LABEL: f5:
44; CHECK: vflcdb %v24, %v26
45; CHECK: br %r14
46  %ret = fsub <2 x double> <double -0.0, double -0.0>, %val
47  ret <2 x double> %ret
48}
49
50; Test an f64 negation that uses vector registers.
51define double @f6(<2 x double> %val) {
52; CHECK-LABEL: f6:
53; CHECK: wflcdb %f0, %v24
54; CHECK: br %r14
55  %scalar = extractelement <2 x double> %val, i32 0
56  %ret = fsub double -0.0, %scalar
57  ret double %ret
58}
59