1; RUN: llc < %s -march=x86 -mattr=+sse2
2
3define void @test() {
4entry:
5	br i1 false, label %bb13944.preheader, label %cond_true418
6
7cond_true418:		; preds = %entry
8	ret void
9
10bb13944.preheader:		; preds = %entry
11	br i1 false, label %bb3517, label %bb13968.preheader
12
13bb3517:		; preds = %bb13944.preheader
14	br i1 false, label %cond_false7408, label %cond_next11422
15
16cond_false7408:		; preds = %bb3517
17	switch i32 0, label %cond_false10578 [
18		 i32 7, label %cond_next11422
19		 i32 6, label %cond_true7828
20		 i32 1, label %cond_true10095
21		 i32 3, label %cond_true10095
22		 i32 5, label %cond_true10176
23		 i32 24, label %cond_true10176
24	]
25
26cond_true7828:		; preds = %cond_false7408
27	br i1 false, label %cond_next8191, label %cond_true8045
28
29cond_true8045:		; preds = %cond_true7828
30	ret void
31
32cond_next8191:		; preds = %cond_true7828
33	%tmp8234 = sub <4 x i32> < i32 939524096, i32 939524096, i32 939524096, i32 939524096 >, zeroinitializer		; <<4 x i32>> [#uses=0]
34	ret void
35
36cond_true10095:		; preds = %cond_false7408, %cond_false7408
37	ret void
38
39cond_true10176:		; preds = %cond_false7408, %cond_false7408
40	ret void
41
42cond_false10578:		; preds = %cond_false7408
43	ret void
44
45cond_next11422:		; preds = %cond_false7408, %bb3517
46	ret void
47
48bb13968.preheader:		; preds = %bb13944.preheader
49	ret void
50}
51