1; RUN: llc < %s -mcpu=generic -mtriple=i686-pc-linux-gnu -asm-verbose=0 | FileCheck %s
2target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
3target triple = "i686-pc-linux-gnu"
4
5define zeroext i16 @test1(i16 zeroext %x) nounwind {
6entry:
7	%div = udiv i16 %x, 33
8	ret i16 %div
9; CHECK-LABEL: test1:
10; CHECK: imull	$63551, %eax
11; CHECK-NEXT: shrl	$21, %eax
12; CHECK-NEXT: ret
13}
14
15define zeroext i16 @test2(i8 signext %x, i16 zeroext %c) nounwind readnone ssp noredzone {
16entry:
17  %div = udiv i16 %c, 3
18  ret i16 %div
19
20; CHECK-LABEL: test2:
21; CHECK: imull	$43691, %eax
22; CHECK-NEXT: shrl	$17, %eax
23; CHECK-NEXT: ret
24}
25
26define zeroext i8 @test3(i8 zeroext %x, i8 zeroext %c) nounwind readnone ssp noredzone {
27entry:
28  %div = udiv i8 %c, 3
29  ret i8 %div
30
31; CHECK-LABEL: test3:
32; CHECK: movzbl  8(%esp), %eax
33; CHECK-NEXT: imull	$171, %eax
34; CHECK-NEXT: andl $65024, %eax
35; CHECK-NEXT: shrl	$9, %eax
36; CHECK-NEXT: ret
37}
38
39define signext i16 @test4(i16 signext %x) nounwind {
40entry:
41	%div = sdiv i16 %x, 33		; <i32> [#uses=1]
42	ret i16 %div
43; CHECK-LABEL: test4:
44; CHECK: imull	$1986, %eax
45}
46
47define i32 @test5(i32 %A) nounwind {
48        %tmp1 = udiv i32 %A, 1577682821         ; <i32> [#uses=1]
49        ret i32 %tmp1
50; CHECK-LABEL: test5:
51; CHECK: movl	$365384439, %eax
52; CHECK: mull	4(%esp)
53}
54
55define signext i16 @test6(i16 signext %x) nounwind {
56entry:
57  %div = sdiv i16 %x, 10
58  ret i16 %div
59; CHECK-LABEL: test6:
60; CHECK: imull $26215, %eax
61; CHECK: movl %eax, %ecx
62; CHECK: shrl $31, %ecx
63; CHECK: sarl $18, %eax
64}
65
66define i32 @test7(i32 %x) nounwind {
67  %div = udiv i32 %x, 28
68  ret i32 %div
69; CHECK-LABEL: test7:
70; CHECK: shrl $2
71; CHECK: movl $613566757
72; CHECK: mull
73; CHECK-NOT: shrl
74; CHECK: ret
75}
76
77; PR13326
78define i8 @test8(i8 %x) nounwind {
79  %div = udiv i8 %x, 78
80  ret i8 %div
81; CHECK-LABEL: test8:
82; CHECK: shrb %
83; CHECK: imull $211
84; CHECK: shrl $13
85; CHECK: ret
86}
87
88define i8 @test9(i8 %x) nounwind {
89  %div = udiv i8 %x, 116
90  ret i8 %div
91; CHECK-LABEL: test9:
92; CHECK: shrb $2
93; CHECK: imull $71
94; CHECK: shrl $11
95; CHECK: ret
96}
97
98define i32 @testsize1(i32 %x) minsize nounwind {
99entry:
100	%div = sdiv i32 %x, 32
101	ret i32 %div
102; CHECK-LABEL: testsize1:
103; CHECK: divl
104}
105
106define i32 @testsize2(i32 %x) minsize nounwind {
107entry:
108	%div = sdiv i32 %x, 33
109	ret i32 %div
110; CHECK-LABEL: testsize2:
111; CHECK: divl
112}
113
114define i32 @testsize3(i32 %x) minsize nounwind {
115entry:
116	%div = udiv i32 %x, 32
117	ret i32 %div
118; CHECK-LABEL: testsize3:
119; CHECK: shrl
120}
121
122define i32 @testsize4(i32 %x) minsize nounwind {
123entry:
124	%div = udiv i32 %x, 33
125	ret i32 %div
126; CHECK-LABEL: testsize4:
127; CHECK: divl
128}
129