1; RUN: llc < %s -mtriple=x86_64-apple-darwin10                                              | FileCheck %s
2; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1                  | FileCheck %s
3; RUN: llc < %s -mtriple=x86_64-apple-darwin10                             -mcpu=corei7-avx | FileCheck %s
4; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 -mcpu=corei7-avx | FileCheck %s
5
6
7define float @select_fcmp_one_f32(float %a, float %b, float %c, float %d) {
8; CHECK-LABEL: select_fcmp_one_f32
9; CHECK:       ucomiss %xmm1, %xmm0
10; CHECK-NEXT:  jne [[BB:LBB[0-9]+_2]]
11; CHECK:       [[BB]]
12; CHECK-NEXT:  movaps %xmm2, %xmm0
13  %1 = fcmp one float %a, %b
14  %2 = select i1 %1, float %c, float %d
15  ret float %2
16}
17
18define double @select_fcmp_one_f64(double %a, double %b, double %c, double %d) {
19; CHECK-LABEL: select_fcmp_one_f64
20; CHECK:       ucomisd %xmm1, %xmm0
21; CHECK-NEXT:  jne [[BB:LBB[0-9]+_2]]
22; CHECK:       [[BB]]
23; CHECK-NEXT:  movaps  %xmm2, %xmm0
24  %1 = fcmp one double %a, %b
25  %2 = select i1 %1, double %c, double %d
26  ret double %2
27}
28
29define float @select_icmp_eq_f32(i64 %a, i64 %b, float %c, float %d) {
30; CHECK-LABEL: select_icmp_eq_f32
31; CHECK:       cmpq %rsi, %rdi
32; CHECK-NEXT:  je [[BB:LBB[0-9]+_2]]
33; CHECK:       [[BB]]
34; CHECK-NEXT:  retq
35  %1 = icmp eq i64 %a, %b
36  %2 = select i1 %1, float %c, float %d
37  ret float %2
38}
39
40define float @select_icmp_ne_f32(i64 %a, i64 %b, float %c, float %d) {
41; CHECK-LABEL: select_icmp_ne_f32
42; CHECK:       cmpq %rsi, %rdi
43; CHECK-NEXT:  jne [[BB:LBB[0-9]+_2]]
44; CHECK:       [[BB]]
45; CHECK-NEXT:  retq
46  %1 = icmp ne i64 %a, %b
47  %2 = select i1 %1, float %c, float %d
48  ret float %2
49}
50
51define float @select_icmp_ugt_f32(i64 %a, i64 %b, float %c, float %d) {
52; CHECK-LABEL: select_icmp_ugt_f32
53; CHECK:       cmpq %rsi, %rdi
54; CHECK-NEXT:  ja [[BB:LBB[0-9]+_2]]
55; CHECK:       [[BB]]
56; CHECK-NEXT:  retq
57  %1 = icmp ugt i64 %a, %b
58  %2 = select i1 %1, float %c, float %d
59  ret float %2
60}
61
62define float @select_icmp_uge_f32(i64 %a, i64 %b, float %c, float %d) {
63; CHECK-LABEL: select_icmp_uge_f32
64; CHECK:       cmpq %rsi, %rdi
65; CHECK-NEXT:  jae [[BB:LBB[0-9]+_2]]
66; CHECK:       [[BB]]
67; CHECK-NEXT:  retq
68  %1 = icmp uge i64 %a, %b
69  %2 = select i1 %1, float %c, float %d
70  ret float %2
71}
72
73define float @select_icmp_ult_f32(i64 %a, i64 %b, float %c, float %d) {
74; CHECK-LABEL: select_icmp_ult_f32
75; CHECK:       cmpq %rsi, %rdi
76; CHECK-NEXT:  jb [[BB:LBB[0-9]+_2]]
77; CHECK:       [[BB]]
78; CHECK-NEXT:  retq
79  %1 = icmp ult i64 %a, %b
80  %2 = select i1 %1, float %c, float %d
81  ret float %2
82}
83
84define float @select_icmp_ule_f32(i64 %a, i64 %b, float %c, float %d) {
85; CHECK-LABEL: select_icmp_ule_f32
86; CHECK:       cmpq %rsi, %rdi
87; CHECK-NEXT:  jbe [[BB:LBB[0-9]+_2]]
88; CHECK:       [[BB]]
89; CHECK-NEXT:  retq
90  %1 = icmp ule i64 %a, %b
91  %2 = select i1 %1, float %c, float %d
92  ret float %2
93}
94
95define float @select_icmp_sgt_f32(i64 %a, i64 %b, float %c, float %d) {
96; CHECK-LABEL: select_icmp_sgt_f32
97; CHECK:       cmpq %rsi, %rdi
98; CHECK-NEXT:  jg [[BB:LBB[0-9]+_2]]
99; CHECK:       [[BB]]
100; CHECK-NEXT:  retq
101  %1 = icmp sgt i64 %a, %b
102  %2 = select i1 %1, float %c, float %d
103  ret float %2
104}
105
106define float @select_icmp_sge_f32(i64 %a, i64 %b, float %c, float %d) {
107; CHECK-LABEL: select_icmp_sge_f32
108; CHECK:       cmpq %rsi, %rdi
109; CHECK-NEXT:  jge [[BB:LBB[0-9]+_2]]
110; CHECK:       [[BB]]
111; CHECK-NEXT:  retq
112  %1 = icmp sge i64 %a, %b
113  %2 = select i1 %1, float %c, float %d
114  ret float %2
115}
116
117define float @select_icmp_slt_f32(i64 %a, i64 %b, float %c, float %d) {
118; CHECK-LABEL: select_icmp_slt_f32
119; CHECK:       cmpq %rsi, %rdi
120; CHECK-NEXT:  jl [[BB:LBB[0-9]+_2]]
121; CHECK:       [[BB]]
122; CHECK-NEXT:  retq
123  %1 = icmp slt i64 %a, %b
124  %2 = select i1 %1, float %c, float %d
125  ret float %2
126}
127
128define float @select_icmp_sle_f32(i64 %a, i64 %b, float %c, float %d) {
129; CHECK-LABEL: select_icmp_sle_f32
130; CHECK:       cmpq %rsi, %rdi
131; CHECK-NEXT:  jle [[BB:LBB[0-9]+_2]]
132; CHECK:       [[BB]]
133; CHECK-NEXT:  retq
134  %1 = icmp sle i64 %a, %b
135  %2 = select i1 %1, float %c, float %d
136  ret float %2
137}
138
139