1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32
3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
4
5define <2 x i64> @t1(<2 x i64> %b1, <2 x i64> %c) nounwind  {
6; X32-LABEL: t1:
7; X32:       # BB#0: # %entry
8; X32-NEXT:    psllw %xmm1, %xmm0
9; X32-NEXT:    retl
10;
11; X64-LABEL: t1:
12; X64:       # BB#0: # %entry
13; X64-NEXT:    psllw %xmm1, %xmm0
14; X64-NEXT:    retq
15entry:
16	%tmp6 = bitcast <2 x i64> %c to <8 x i16>		; <<8 x i16>> [#uses=1]
17	%tmp8 = bitcast <2 x i64> %b1 to <8 x i16>		; <<8 x i16>> [#uses=1]
18	%tmp9 = tail call <8 x i16> @llvm.x86.sse2.psll.w( <8 x i16> %tmp8, <8 x i16> %tmp6 ) nounwind readnone 		; <<8 x i16>> [#uses=1]
19	%tmp10 = bitcast <8 x i16> %tmp9 to <2 x i64>		; <<2 x i64>> [#uses=1]
20	ret <2 x i64> %tmp10
21}
22
23define <2 x i64> @t3(<2 x i64> %b1, i32 %c) nounwind  {
24; X32-LABEL: t3:
25; X32:       # BB#0: # %entry
26; X32-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
27; X32-NEXT:    psraw %xmm1, %xmm0
28; X32-NEXT:    retl
29;
30; X64-LABEL: t3:
31; X64:       # BB#0: # %entry
32; X64-NEXT:    movd %edi, %xmm1
33; X64-NEXT:    psraw %xmm1, %xmm0
34; X64-NEXT:    retq
35entry:
36	%tmp2 = bitcast <2 x i64> %b1 to <8 x i16>		; <<8 x i16>> [#uses=1]
37	%tmp4 = insertelement <4 x i32> undef, i32 %c, i32 0		; <<4 x i32>> [#uses=1]
38	%tmp8 = bitcast <4 x i32> %tmp4 to <8 x i16>		; <<8 x i16>> [#uses=1]
39	%tmp9 = tail call <8 x i16> @llvm.x86.sse2.psra.w( <8 x i16> %tmp2, <8 x i16> %tmp8 )		; <<8 x i16>> [#uses=1]
40	%tmp11 = bitcast <8 x i16> %tmp9 to <2 x i64>		; <<2 x i64>> [#uses=1]
41	ret <2 x i64> %tmp11
42}
43
44declare <8 x i16> @llvm.x86.sse2.psra.w(<8 x i16>, <8 x i16>) nounwind readnone
45
46define <2 x i64> @t2(<2 x i64> %b1, <2 x i64> %c) nounwind  {
47; X32-LABEL: t2:
48; X32:       # BB#0: # %entry
49; X32-NEXT:    psrlq %xmm1, %xmm0
50; X32-NEXT:    retl
51;
52; X64-LABEL: t2:
53; X64:       # BB#0: # %entry
54; X64-NEXT:    psrlq %xmm1, %xmm0
55; X64-NEXT:    retq
56entry:
57	%tmp9 = tail call <2 x i64> @llvm.x86.sse2.psrl.q( <2 x i64> %b1, <2 x i64> %c ) nounwind readnone 		; <<2 x i64>> [#uses=1]
58	ret <2 x i64> %tmp9
59}
60
61declare <2 x i64> @llvm.x86.sse2.psrl.q(<2 x i64>, <2 x i64>) nounwind readnone
62
63declare <8 x i16> @llvm.x86.sse2.psll.w(<8 x i16>, <8 x i16>) nounwind readnone
64