1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32
3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
4
5define <2 x i64> @t1(<2 x i64> %b1, <2 x i64> %c) nounwind  {
6; X32-LABEL: t1:
7; X32:       # BB#0:
8; X32-NEXT:    movl $14, %eax
9; X32-NEXT:    movd %eax, %xmm1
10; X32-NEXT:    psrlw %xmm1, %xmm0
11; X32-NEXT:    retl
12;
13; X64-LABEL: t1:
14; X64:       # BB#0:
15; X64-NEXT:    movl $14, %eax
16; X64-NEXT:    movd %eax, %xmm1
17; X64-NEXT:    psrlw %xmm1, %xmm0
18; X64-NEXT:    retq
19	%tmp1 = bitcast <2 x i64> %b1 to <8 x i16>
20	%tmp2 = tail call <8 x i16> @llvm.x86.sse2.psrl.w( <8 x i16> %tmp1, <8 x i16> bitcast (<4 x i32> < i32 14, i32 undef, i32 undef, i32 undef > to <8 x i16>) ) nounwind readnone
21	%tmp3 = bitcast <8 x i16> %tmp2 to <2 x i64>
22	ret <2 x i64> %tmp3
23}
24
25define <4 x i32> @t2(<2 x i64> %b1, <2 x i64> %c) nounwind  {
26; X32-LABEL: t2:
27; X32:       # BB#0:
28; X32-NEXT:    movl $14, %eax
29; X32-NEXT:    movd %eax, %xmm1
30; X32-NEXT:    pslld %xmm1, %xmm0
31; X32-NEXT:    retl
32;
33; X64-LABEL: t2:
34; X64:       # BB#0:
35; X64-NEXT:    movl $14, %eax
36; X64-NEXT:    movd %eax, %xmm1
37; X64-NEXT:    pslld %xmm1, %xmm0
38; X64-NEXT:    retq
39	%tmp1 = bitcast <2 x i64> %b1 to <4 x i32>
40	%tmp2 = tail call <4 x i32> @llvm.x86.sse2.psll.d( <4 x i32> %tmp1, <4 x i32> < i32 14, i32 undef, i32 undef, i32 undef > ) nounwind readnone
41	ret <4 x i32> %tmp2
42}
43
44declare <8 x i16> @llvm.x86.sse2.psrl.w(<8 x i16>, <8 x i16>) nounwind readnone
45declare <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32>, <4 x i32>) nounwind readnone
46