1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86 --check-prefix=X86-SSE2
3; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86 --check-prefix=X86-SSE42
4; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE2
5; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-SSE42
6
7; unsigned to float v7i16 to v7f32
8
9define void @convert_v7i16_v7f32(<7 x float>* %dst.addr, <7 x i16> %src) nounwind {
10; X86-SSE2-LABEL: convert_v7i16_v7f32:
11; X86-SSE2:       # BB#0: # %entry
12; X86-SSE2-NEXT:    movl {{[0-9]+}}(%esp), %eax
13; X86-SSE2-NEXT:    pxor %xmm1, %xmm1
14; X86-SSE2-NEXT:    movdqa %xmm0, %xmm2
15; X86-SSE2-NEXT:    punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
16; X86-SSE2-NEXT:    cvtdq2ps %xmm2, %xmm2
17; X86-SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
18; X86-SSE2-NEXT:    cvtdq2ps %xmm0, %xmm0
19; X86-SSE2-NEXT:    movups %xmm0, (%eax)
20; X86-SSE2-NEXT:    movss %xmm2, 16(%eax)
21; X86-SSE2-NEXT:    movaps %xmm2, %xmm0
22; X86-SSE2-NEXT:    shufpd {{.*#+}} xmm0 = xmm0[1,0]
23; X86-SSE2-NEXT:    movss %xmm0, 24(%eax)
24; X86-SSE2-NEXT:    shufps {{.*#+}} xmm2 = xmm2[1,1,2,3]
25; X86-SSE2-NEXT:    movss %xmm2, 20(%eax)
26; X86-SSE2-NEXT:    retl
27;
28; X86-SSE42-LABEL: convert_v7i16_v7f32:
29; X86-SSE42:       # BB#0: # %entry
30; X86-SSE42-NEXT:    movl {{[0-9]+}}(%esp), %eax
31; X86-SSE42-NEXT:    pxor %xmm1, %xmm1
32; X86-SSE42-NEXT:    pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
33; X86-SSE42-NEXT:    punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
34; X86-SSE42-NEXT:    cvtdq2ps %xmm0, %xmm0
35; X86-SSE42-NEXT:    cvtdq2ps %xmm2, %xmm1
36; X86-SSE42-NEXT:    extractps $2, %xmm0, 24(%eax)
37; X86-SSE42-NEXT:    extractps $1, %xmm0, 20(%eax)
38; X86-SSE42-NEXT:    movups %xmm1, (%eax)
39; X86-SSE42-NEXT:    movss %xmm0, 16(%eax)
40; X86-SSE42-NEXT:    retl
41;
42; X64-SSE2-LABEL: convert_v7i16_v7f32:
43; X64-SSE2:       # BB#0: # %entry
44; X64-SSE2-NEXT:    pxor %xmm1, %xmm1
45; X64-SSE2-NEXT:    movdqa %xmm0, %xmm2
46; X64-SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
47; X64-SSE2-NEXT:    cvtdq2ps %xmm2, %xmm2
48; X64-SSE2-NEXT:    punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
49; X64-SSE2-NEXT:    cvtdq2ps %xmm0, %xmm0
50; X64-SSE2-NEXT:    movlps %xmm0, 16(%rdi)
51; X64-SSE2-NEXT:    movups %xmm2, (%rdi)
52; X64-SSE2-NEXT:    shufpd {{.*#+}} xmm0 = xmm0[1,0]
53; X64-SSE2-NEXT:    movss %xmm0, 24(%rdi)
54; X64-SSE2-NEXT:    retq
55;
56; X64-SSE42-LABEL: convert_v7i16_v7f32:
57; X64-SSE42:       # BB#0: # %entry
58; X64-SSE42-NEXT:    pxor %xmm1, %xmm1
59; X64-SSE42-NEXT:    pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
60; X64-SSE42-NEXT:    punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
61; X64-SSE42-NEXT:    cvtdq2ps %xmm0, %xmm0
62; X64-SSE42-NEXT:    cvtdq2ps %xmm2, %xmm1
63; X64-SSE42-NEXT:    extractps $2, %xmm0, 24(%rdi)
64; X64-SSE42-NEXT:    movlps %xmm0, 16(%rdi)
65; X64-SSE42-NEXT:    movups %xmm1, (%rdi)
66; X64-SSE42-NEXT:    retq
67entry:
68	%val = uitofp <7 x i16> %src to <7 x float>
69	store <7 x float> %val, <7 x float>* %dst.addr, align 4
70	ret void
71}
72
73; unsigned to float v3i8 to v3f32
74
75define void @convert_v3i8_to_v3f32(<3 x float>* %dst.addr, <3 x i8>* %src.addr) nounwind {
76; X86-SSE2-LABEL: convert_v3i8_to_v3f32:
77; X86-SSE2:       # BB#0: # %entry
78; X86-SSE2-NEXT:    pushl %ebp
79; X86-SSE2-NEXT:    movl %esp, %ebp
80; X86-SSE2-NEXT:    pushl %esi
81; X86-SSE2-NEXT:    andl $-16, %esp
82; X86-SSE2-NEXT:    subl $32, %esp
83; X86-SSE2-NEXT:    movl 8(%ebp), %eax
84; X86-SSE2-NEXT:    movl 12(%ebp), %ecx
85; X86-SSE2-NEXT:    movzwl (%ecx), %edx
86; X86-SSE2-NEXT:    movd %edx, %xmm0
87; X86-SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
88; X86-SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
89; X86-SSE2-NEXT:    movdqa %xmm0, (%esp)
90; X86-SSE2-NEXT:    movl {{[0-9]+}}(%esp), %edx
91; X86-SSE2-NEXT:    shll $8, %edx
92; X86-SSE2-NEXT:    movzbl (%esp), %esi
93; X86-SSE2-NEXT:    orl %edx, %esi
94; X86-SSE2-NEXT:    pinsrw $0, %esi, %xmm0
95; X86-SSE2-NEXT:    movzbl 2(%ecx), %ecx
96; X86-SSE2-NEXT:    pinsrw $1, %ecx, %xmm0
97; X86-SSE2-NEXT:    pxor %xmm1, %xmm1
98; X86-SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
99; X86-SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
100; X86-SSE2-NEXT:    cvtdq2ps %xmm0, %xmm0
101; X86-SSE2-NEXT:    movss %xmm0, (%eax)
102; X86-SSE2-NEXT:    movaps %xmm0, %xmm1
103; X86-SSE2-NEXT:    shufpd {{.*#+}} xmm1 = xmm1[1,0]
104; X86-SSE2-NEXT:    movss %xmm1, 8(%eax)
105; X86-SSE2-NEXT:    shufps {{.*#+}} xmm0 = xmm0[1,1,2,3]
106; X86-SSE2-NEXT:    movss %xmm0, 4(%eax)
107; X86-SSE2-NEXT:    leal -4(%ebp), %esp
108; X86-SSE2-NEXT:    popl %esi
109; X86-SSE2-NEXT:    popl %ebp
110; X86-SSE2-NEXT:    retl
111;
112; X86-SSE42-LABEL: convert_v3i8_to_v3f32:
113; X86-SSE42:       # BB#0: # %entry
114; X86-SSE42-NEXT:    pushl %eax
115; X86-SSE42-NEXT:    movl {{[0-9]+}}(%esp), %eax
116; X86-SSE42-NEXT:    movl {{[0-9]+}}(%esp), %ecx
117; X86-SSE42-NEXT:    movzbl 2(%ecx), %edx
118; X86-SSE42-NEXT:    movzwl (%ecx), %ecx
119; X86-SSE42-NEXT:    movd %ecx, %xmm0
120; X86-SSE42-NEXT:    pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
121; X86-SSE42-NEXT:    pinsrd $2, %edx, %xmm0
122; X86-SSE42-NEXT:    pand .LCPI1_0, %xmm0
123; X86-SSE42-NEXT:    cvtdq2ps %xmm0, %xmm0
124; X86-SSE42-NEXT:    extractps $2, %xmm0, 8(%eax)
125; X86-SSE42-NEXT:    extractps $1, %xmm0, 4(%eax)
126; X86-SSE42-NEXT:    movss %xmm0, (%eax)
127; X86-SSE42-NEXT:    popl %eax
128; X86-SSE42-NEXT:    retl
129;
130; X64-SSE2-LABEL: convert_v3i8_to_v3f32:
131; X64-SSE2:       # BB#0: # %entry
132; X64-SSE2-NEXT:    movzwl (%rsi), %eax
133; X64-SSE2-NEXT:    movd %rax, %xmm0
134; X64-SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
135; X64-SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
136; X64-SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
137; X64-SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
138; X64-SSE2-NEXT:    movdqa %xmm0, -{{[0-9]+}}(%rsp)
139; X64-SSE2-NEXT:    movl -{{[0-9]+}}(%rsp), %eax
140; X64-SSE2-NEXT:    shll $8, %eax
141; X64-SSE2-NEXT:    movzbl -{{[0-9]+}}(%rsp), %ecx
142; X64-SSE2-NEXT:    orl %eax, %ecx
143; X64-SSE2-NEXT:    pinsrw $0, %ecx, %xmm0
144; X64-SSE2-NEXT:    movzbl 2(%rsi), %eax
145; X64-SSE2-NEXT:    pinsrw $1, %eax, %xmm0
146; X64-SSE2-NEXT:    pxor %xmm1, %xmm1
147; X64-SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
148; X64-SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
149; X64-SSE2-NEXT:    cvtdq2ps %xmm0, %xmm0
150; X64-SSE2-NEXT:    movlps %xmm0, (%rdi)
151; X64-SSE2-NEXT:    shufpd {{.*#+}} xmm0 = xmm0[1,0]
152; X64-SSE2-NEXT:    movss %xmm0, 8(%rdi)
153; X64-SSE2-NEXT:    retq
154;
155; X64-SSE42-LABEL: convert_v3i8_to_v3f32:
156; X64-SSE42:       # BB#0: # %entry
157; X64-SSE42-NEXT:    movzbl 2(%rsi), %eax
158; X64-SSE42-NEXT:    movzwl (%rsi), %ecx
159; X64-SSE42-NEXT:    movd %rcx, %xmm0
160; X64-SSE42-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
161; X64-SSE42-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
162; X64-SSE42-NEXT:    pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
163; X64-SSE42-NEXT:    pinsrd $2, %eax, %xmm0
164; X64-SSE42-NEXT:    pand {{.*}}(%rip), %xmm0
165; X64-SSE42-NEXT:    cvtdq2ps %xmm0, %xmm0
166; X64-SSE42-NEXT:    extractps $2, %xmm0, 8(%rdi)
167; X64-SSE42-NEXT:    movlps %xmm0, (%rdi)
168; X64-SSE42-NEXT:    retq
169entry:
170	%load = load <3 x i8>, <3 x i8>* %src.addr, align 1
171	%cvt = uitofp <3 x i8> %load to <3 x float>
172	store <3 x float> %cvt, <3 x float>* %dst.addr, align 4
173	ret void
174}
175