1; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 -disable-mips-delay-filler %s -o - \
2; RUN:   | llvm-objdump -disassemble - | FileCheck %s
3
4; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 %s -o - \
5; RUN:   | llvm-objdump -disassemble - | FileCheck %s
6
7define i64 @f3(i64 %a0) nounwind readnone {
8entry:
9; CHECK: dsll ${{[0-9]+}}, ${{[0-9]+}}, 10
10  %shl = shl i64 %a0, 10
11  ret i64 %shl
12}
13
14define i64 @f4(i64 %a0) nounwind readnone {
15entry:
16; CHECK: dsra ${{[0-9]+}}, ${{[0-9]+}}, 10
17  %shr = ashr i64 %a0, 10
18  ret i64 %shr
19}
20
21define i64 @f5(i64 %a0) nounwind readnone {
22entry:
23; CHECK: dsrl ${{[0-9]+}}, ${{[0-9]+}}, 10
24  %shr = lshr i64 %a0, 10
25  ret i64 %shr
26}
27
28define i64 @f6(i64 %a0) nounwind readnone {
29entry:
30; CHECK: dsll32 ${{[0-9]+}}, ${{[0-9]+}}, 8
31  %shl = shl i64 %a0, 40
32  ret i64 %shl
33}
34
35define i64 @f7(i64 %a0) nounwind readnone {
36entry:
37; CHECK: dsra32 ${{[0-9]+}}, ${{[0-9]+}}, 8
38  %shr = ashr i64 %a0, 40
39  ret i64 %shr
40}
41
42define i64 @f8(i64 %a0) nounwind readnone {
43entry:
44; CHECK: dsrl32 ${{[0-9]+}}, ${{[0-9]+}}, 8
45  %shr = lshr i64 %a0, 40
46  ret i64 %shr
47}
48
49