1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -instcombine -S | FileCheck %s
3
4; There should be no 'and' instructions left in any test.
5
6define i32 @test1(i32 %A) {
7; CHECK-LABEL: @test1(
8; CHECK-NEXT:    ret i32 0
9;
10  %B = and i32 %A, 0
11  ret i32 %B
12}
13
14define i32 @test2(i32 %A) {
15; CHECK-LABEL: @test2(
16; CHECK-NEXT:    ret i32 %A
17;
18  %B = and i32 %A, -1
19  ret i32 %B
20}
21
22define i1 @test3(i1 %A) {
23; CHECK-LABEL: @test3(
24; CHECK-NEXT:    ret i1 false
25;
26  %B = and i1 %A, false
27  ret i1 %B
28}
29
30define i1 @test4(i1 %A) {
31; CHECK-LABEL: @test4(
32; CHECK-NEXT:    ret i1 %A
33;
34  %B = and i1 %A, true
35  ret i1 %B
36}
37
38define i32 @test5(i32 %A) {
39; CHECK-LABEL: @test5(
40; CHECK-NEXT:    ret i32 %A
41;
42  %B = and i32 %A, %A
43  ret i32 %B
44}
45
46define i1 @test6(i1 %A) {
47; CHECK-LABEL: @test6(
48; CHECK-NEXT:    ret i1 %A
49;
50  %B = and i1 %A, %A
51  ret i1 %B
52}
53
54; A & ~A == 0
55define i32 @test7(i32 %A) {
56; CHECK-LABEL: @test7(
57; CHECK-NEXT:    ret i32 0
58;
59  %NotA = xor i32 %A, -1
60  %B = and i32 %A, %NotA
61  ret i32 %B
62}
63
64; AND associates
65define i8 @test8(i8 %A) {
66; CHECK-LABEL: @test8(
67; CHECK-NEXT:    ret i8 0
68;
69  %B = and i8 %A, 3
70  %C = and i8 %B, 4
71  ret i8 %C
72}
73
74; Test of sign bit, convert to setle %A, 0
75define i1 @test9(i32 %A) {
76; CHECK-LABEL: @test9(
77; CHECK-NEXT:    [[C:%.*]] = icmp slt i32 %A, 0
78; CHECK-NEXT:    ret i1 [[C]]
79;
80  %B = and i32 %A, -2147483648
81  %C = icmp ne i32 %B, 0
82  ret i1 %C
83}
84
85; Test of sign bit, convert to setle %A, 0
86define i1 @test9a(i32 %A) {
87; CHECK-LABEL: @test9a(
88; CHECK-NEXT:    [[C:%.*]] = icmp slt i32 %A, 0
89; CHECK-NEXT:    ret i1 [[C]]
90;
91  %B = and i32 %A, -2147483648
92  %C = icmp ne i32 %B, 0
93  ret i1 %C
94}
95
96define i32 @test10(i32 %A) {
97; CHECK-LABEL: @test10(
98; CHECK-NEXT:    ret i32 1
99;
100  %B = and i32 %A, 12
101  %C = xor i32 %B, 15
102  ; (X ^ C1) & C2 --> (X & C2) ^ (C1&C2)
103  %D = and i32 %C, 1
104  ret i32 %D
105}
106
107define i32 @test11(i32 %A, i32* %P) {
108; CHECK-LABEL: @test11(
109; CHECK-NEXT:    [[B:%.*]] = or i32 %A, 3
110; CHECK-NEXT:    [[C:%.*]] = xor i32 [[B]], 12
111; CHECK-NEXT:    store i32 [[C]], i32* %P, align 4
112; CHECK-NEXT:    ret i32 3
113;
114  %B = or i32 %A, 3
115  %C = xor i32 %B, 12
116  ; additional use of C
117  store i32 %C, i32* %P
118  ; %C = and uint %B, 3 --> 3
119  %D = and i32 %C, 3
120  ret i32 %D
121}
122
123define i1 @test12(i32 %A, i32 %B) {
124; CHECK-LABEL: @test12(
125; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 %A, %B
126; CHECK-NEXT:    ret i1 [[TMP1]]
127;
128  %C1 = icmp ult i32 %A, %B
129  %C2 = icmp ule i32 %A, %B
130  ; (A < B) & (A <= B) === (A < B)
131  %D = and i1 %C1, %C2
132  ret i1 %D
133}
134
135define i1 @test13(i32 %A, i32 %B) {
136; CHECK-LABEL: @test13(
137; CHECK-NEXT:    ret i1 false
138;
139  %C1 = icmp ult i32 %A, %B
140  %C2 = icmp ugt i32 %A, %B
141  ; (A < B) & (A > B) === false
142  %D = and i1 %C1, %C2
143  ret i1 %D
144}
145
146define i1 @test14(i8 %A) {
147; CHECK-LABEL: @test14(
148; CHECK-NEXT:    [[C:%.*]] = icmp slt i8 %A, 0
149; CHECK-NEXT:    ret i1 [[C]]
150;
151  %B = and i8 %A, -128
152  %C = icmp ne i8 %B, 0
153  ret i1 %C
154}
155
156define i8 @test15(i8 %A) {
157; CHECK-LABEL: @test15(
158; CHECK-NEXT:    ret i8 0
159;
160  %B = lshr i8 %A, 7
161  ; Always equals zero
162  %C = and i8 %B, 2
163  ret i8 %C
164}
165
166define i8 @test16(i8 %A) {
167; CHECK-LABEL: @test16(
168; CHECK-NEXT:    ret i8 0
169;
170  %B = shl i8 %A, 2
171  %C = and i8 %B, 3
172  ret i8 %C
173}
174
175;; ~(~X & Y) --> (X | ~Y)
176define i8 @test17(i8 %X, i8 %Y) {
177; CHECK-LABEL: @test17(
178; CHECK-NEXT:    [[Y_NOT:%.*]] = xor i8 %Y, -1
179; CHECK-NEXT:    [[D:%.*]] = or i8 %X, [[Y_NOT]]
180; CHECK-NEXT:    ret i8 [[D]]
181;
182  %B = xor i8 %X, -1
183  %C = and i8 %B, %Y
184  %D = xor i8 %C, -1
185  ret i8 %D
186}
187
188define i1 @test18(i32 %A) {
189; CHECK-LABEL: @test18(
190; CHECK-NEXT:    [[C:%.*]] = icmp ugt i32 %A, 127
191; CHECK-NEXT:    ret i1 [[C]]
192;
193  %B = and i32 %A, -128
194  ;; C >= 128
195  %C = icmp ne i32 %B, 0
196  ret i1 %C
197}
198
199define i1 @test18a(i8 %A) {
200; CHECK-LABEL: @test18a(
201; CHECK-NEXT:    [[C:%.*]] = icmp ult i8 %A, 2
202; CHECK-NEXT:    ret i1 [[C]]
203;
204  %B = and i8 %A, -2
205  %C = icmp eq i8 %B, 0
206  ret i1 %C
207}
208
209define i32 @test19(i32 %A) {
210; CHECK-LABEL: @test19(
211; CHECK-NEXT:    [[B:%.*]] = shl i32 %A, 3
212; CHECK-NEXT:    ret i32 [[B]]
213;
214  %B = shl i32 %A, 3
215  ;; Clearing a zero bit
216  %C = and i32 %B, -2
217  ret i32 %C
218}
219
220define i8 @test20(i8 %A) {
221; CHECK-LABEL: @test20(
222; CHECK-NEXT:    [[C:%.*]] = lshr i8 %A, 7
223; CHECK-NEXT:    ret i8 [[C]]
224;
225  %C = lshr i8 %A, 7
226  ;; Unneeded
227  %D = and i8 %C, 1
228  ret i8 %D
229}
230
231define i1 @test23(i32 %A) {
232; CHECK-LABEL: @test23(
233; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i32 %A, 2
234; CHECK-NEXT:    ret i1 [[TMP1]]
235;
236  %B = icmp sgt i32 %A, 1
237  %C = icmp sle i32 %A, 2
238  ;; A == 2
239  %D = and i1 %B, %C
240  ret i1 %D
241}
242
243define i1 @test24(i32 %A) {
244; CHECK-LABEL: @test24(
245; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i32 %A, 2
246; CHECK-NEXT:    ret i1 [[TMP1]]
247;
248  %B = icmp sgt i32 %A, 1
249  %C = icmp ne i32 %A, 2
250  ;; A > 2
251  %D = and i1 %B, %C
252  ret i1 %D
253}
254
255define i1 @test25(i32 %A) {
256; CHECK-LABEL: @test25(
257; CHECK-NEXT:    [[A_OFF:%.*]] = add i32 %A, -50
258; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 [[A_OFF]], 50
259; CHECK-NEXT:    ret i1 [[TMP1]]
260;
261  %B = icmp sge i32 %A, 50
262  %C = icmp slt i32 %A, 100
263  ;; (A-50) <u 50
264  %D = and i1 %B, %C
265  ret i1 %D
266}
267
268define i1 @test26(i32 %A) {
269; CHECK-LABEL: @test26(
270; CHECK-NEXT:    [[A_OFF:%.*]] = add i32 %A, -49
271; CHECK-NEXT:    [[A_CMP:%.*]] = icmp ugt i32 [[A_OFF]], 1
272; CHECK-NEXT:    ret i1 [[A_CMP]]
273;
274  %B = icmp ne i32 %A, 49
275  %C = icmp ne i32 %A, 50
276  ;; (A-49) > 1
277  %D = and i1 %B, %C
278  ret i1 %D
279}
280
281define i8 @test27(i8 %A) {
282; CHECK-LABEL: @test27(
283; CHECK-NEXT:    ret i8 0
284;
285  %B = and i8 %A, 4
286  %C = sub i8 %B, 16
287  ;; 0xF0
288  %D = and i8 %C, -16
289  %E = add i8 %D, 16
290  ret i8 %E
291}
292
293;; This is juse a zero extending shr.
294define i32 @test28(i32 %X) {
295; CHECK-LABEL: @test28(
296; CHECK-NEXT:    [[Y1:%.*]] = lshr i32 %X, 24
297; CHECK-NEXT:    ret i32 [[Y1]]
298;
299  ;; Sign extend
300  %Y = ashr i32 %X, 24
301  ;; Mask out sign bits
302  %Z = and i32 %Y, 255
303  ret i32 %Z
304}
305
306define i32 @test29(i8 %X) {
307; CHECK-LABEL: @test29(
308; CHECK-NEXT:    [[Y:%.*]] = zext i8 %X to i32
309; CHECK-NEXT:    ret i32 [[Y]]
310;
311  %Y = zext i8 %X to i32
312  ;; Zero extend makes this unneeded.
313  %Z = and i32 %Y, 255
314  ret i32 %Z
315}
316
317define i32 @test30(i1 %X) {
318; CHECK-LABEL: @test30(
319; CHECK-NEXT:    [[Y:%.*]] = zext i1 %X to i32
320; CHECK-NEXT:    ret i32 [[Y]]
321;
322  %Y = zext i1 %X to i32
323  %Z = and i32 %Y, 1
324  ret i32 %Z
325}
326
327define i32 @test31(i1 %X) {
328; CHECK-LABEL: @test31(
329; CHECK-NEXT:    [[Y:%.*]] = zext i1 %X to i32
330; CHECK-NEXT:    [[Z:%.*]] = shl nuw nsw i32 [[Y]], 4
331; CHECK-NEXT:    ret i32 [[Z]]
332;
333  %Y = zext i1 %X to i32
334  %Z = shl i32 %Y, 4
335  %A = and i32 %Z, 16
336  ret i32 %A
337}
338
339define i32 @test32(i32 %In) {
340; CHECK-LABEL: @test32(
341; CHECK-NEXT:    ret i32 0
342;
343  %Y = and i32 %In, 16
344  %Z = lshr i32 %Y, 2
345  %A = and i32 %Z, 1
346  ret i32 %A
347}
348
349;; Code corresponding to one-bit bitfield ^1.
350define i32 @test33(i32 %b) {
351; CHECK-LABEL: @test33(
352; CHECK-NEXT:    [[TMP_13:%.*]] = xor i32 %b, 1
353; CHECK-NEXT:    ret i32 [[TMP_13]]
354;
355  %tmp.4.mask = and i32 %b, 1
356  %tmp.10 = xor i32 %tmp.4.mask, 1
357  %tmp.12 = and i32 %b, -2
358  %tmp.13 = or i32 %tmp.12, %tmp.10
359  ret i32 %tmp.13
360}
361
362define i32 @test34(i32 %A, i32 %B) {
363; CHECK-LABEL: @test34(
364; CHECK-NEXT:    ret i32 %B
365;
366  %tmp.2 = or i32 %B, %A
367  %tmp.4 = and i32 %tmp.2, %B
368  ret i32 %tmp.4
369}
370
371