1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -instcombine -S | FileCheck %s 3 4target datalayout = "e-p:64:64:64-p1:16:16:16-p2:32:32:32-p3:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" 5 6define i32 @test1(i32 %X) { 7; CHECK-LABEL: @test1( 8; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr i32 %X, 31 9; CHECK-NEXT: ret i32 [[X_LOBIT]] 10; 11 %a = icmp slt i32 %X, 0 12 %b = zext i1 %a to i32 13 ret i32 %b 14} 15 16define i32 @test2(i32 %X) { 17; CHECK-LABEL: @test2( 18; CHECK-NEXT: [[X_LOBIT:%.*]] = lshr i32 %X, 31 19; CHECK-NEXT: [[X_LOBIT_NOT:%.*]] = xor i32 [[X_LOBIT]], 1 20; CHECK-NEXT: ret i32 [[X_LOBIT_NOT]] 21; 22 %a = icmp ult i32 %X, -2147483648 23 %b = zext i1 %a to i32 24 ret i32 %b 25} 26 27define i32 @test3(i32 %X) { 28; CHECK-LABEL: @test3( 29; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 %X, 31 30; CHECK-NEXT: ret i32 [[X_LOBIT]] 31; 32 %a = icmp slt i32 %X, 0 33 %b = sext i1 %a to i32 34 ret i32 %b 35} 36 37define i32 @test4(i32 %X) { 38; CHECK-LABEL: @test4( 39; CHECK-NEXT: [[X_LOBIT:%.*]] = ashr i32 %X, 31 40; CHECK-NEXT: [[X_LOBIT_NOT:%.*]] = xor i32 [[X_LOBIT]], -1 41; CHECK-NEXT: ret i32 [[X_LOBIT_NOT]] 42; 43 %a = icmp ult i32 %X, -2147483648 44 %b = sext i1 %a to i32 45 ret i32 %b 46} 47 48; PR4837 49define <2 x i1> @test5(<2 x i64> %x) { 50; CHECK-LABEL: @test5( 51; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true> 52; 53 %V = icmp eq <2 x i64> %x, undef 54 ret <2 x i1> %V 55} 56 57define i32 @test6(i32 %a, i32 %b) { 58; CHECK-LABEL: @test6( 59; CHECK-NEXT: [[E:%.*]] = ashr i32 %a, 31 60; CHECK-NEXT: [[F:%.*]] = and i32 [[E]], %b 61; CHECK-NEXT: ret i32 [[F]] 62; 63 %c = icmp sle i32 %a, -1 64 %d = zext i1 %c to i32 65 %e = sub i32 0, %d 66 %f = and i32 %e, %b 67 ret i32 %f 68} 69 70 71define i1 @test7(i32 %x) { 72; CHECK-LABEL: @test7( 73; CHECK-NEXT: [[B:%.*]] = icmp ne i32 %x, 0 74; CHECK-NEXT: ret i1 [[B]] 75; 76 %a = add i32 %x, -1 77 %b = icmp ult i32 %a, %x 78 ret i1 %b 79} 80 81define i1 @test8(i32 %x){ 82; CHECK-LABEL: @test8( 83; CHECK-NEXT: ret i1 false 84; 85 %a = add i32 %x, -1 86 %b = icmp eq i32 %a, %x 87 ret i1 %b 88} 89 90define i1 @test9(i32 %x) { 91; CHECK-LABEL: @test9( 92; CHECK-NEXT: [[B:%.*]] = icmp ugt i32 %x, 1 93; CHECK-NEXT: ret i1 [[B]] 94; 95 %a = add i32 %x, -2 96 %b = icmp ugt i32 %x, %a 97 ret i1 %b 98} 99 100define i1 @test10(i32 %x){ 101; CHECK-LABEL: @test10( 102; CHECK-NEXT: [[B:%.*]] = icmp ne i32 %x, -2147483648 103; CHECK-NEXT: ret i1 [[B]] 104; 105 %a = add i32 %x, -1 106 %b = icmp slt i32 %a, %x 107 ret i1 %b 108} 109 110define i1 @test11(i32 %x) { 111; CHECK-LABEL: @test11( 112; CHECK-NEXT: ret i1 true 113; 114 %a = add nsw i32 %x, 8 115 %b = icmp slt i32 %x, %a 116 ret i1 %b 117} 118 119; PR6195 120define i1 @test12(i1 %A) { 121; CHECK-LABEL: @test12( 122; CHECK-NEXT: [[NOT_A:%.*]] = xor i1 %A, true 123; CHECK-NEXT: ret i1 [[NOT_A]] 124; 125 %S = select i1 %A, i64 -4294967295, i64 8589934591 126 %B = icmp ne i64 bitcast (<2 x i32> <i32 1, i32 -1> to i64), %S 127 ret i1 %B 128} 129 130; PR6481 131define i1 @test13(i8 %X) nounwind readnone { 132; CHECK-LABEL: @test13( 133; CHECK-NEXT: ret i1 false 134; 135 %cmp = icmp slt i8 undef, %X 136 ret i1 %cmp 137} 138 139define i1 @test14(i8 %X) nounwind readnone { 140; CHECK-LABEL: @test14( 141; CHECK-NEXT: ret i1 false 142; 143 %cmp = icmp slt i8 undef, -128 144 ret i1 %cmp 145} 146 147define i1 @test15() nounwind readnone { 148; CHECK-LABEL: @test15( 149; CHECK-NEXT: ret i1 undef 150; 151 %cmp = icmp eq i8 undef, -128 152 ret i1 %cmp 153} 154 155define i1 @test16() nounwind readnone { 156; CHECK-LABEL: @test16( 157; CHECK-NEXT: ret i1 undef 158; 159 %cmp = icmp ne i8 undef, -128 160 ret i1 %cmp 161} 162 163define i1 @test17(i32 %x) nounwind { 164; CHECK-LABEL: @test17( 165; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %x, 3 166; CHECK-NEXT: ret i1 [[CMP]] 167; 168 %shl = shl i32 1, %x 169 %and = and i32 %shl, 8 170 %cmp = icmp eq i32 %and, 0 171 ret i1 %cmp 172} 173 174define i1 @test17a(i32 %x) nounwind { 175; CHECK-LABEL: @test17a( 176; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %x, 2 177; CHECK-NEXT: ret i1 [[CMP]] 178; 179 %shl = shl i32 1, %x 180 %and = and i32 %shl, 7 181 %cmp = icmp eq i32 %and, 0 182 ret i1 %cmp 183} 184 185define i1 @test18(i32 %x) nounwind { 186; CHECK-LABEL: @test18( 187; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %x, 3 188; CHECK-NEXT: ret i1 [[CMP]] 189; 190 %sh = lshr i32 8, %x 191 %and = and i32 %sh, 1 192 %cmp = icmp eq i32 %and, 0 193 ret i1 %cmp 194} 195 196define i1 @test19(i32 %x) nounwind { 197; CHECK-LABEL: @test19( 198; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %x, 3 199; CHECK-NEXT: ret i1 [[CMP]] 200; 201 %shl = shl i32 1, %x 202 %and = and i32 %shl, 8 203 %cmp = icmp eq i32 %and, 8 204 ret i1 %cmp 205} 206 207define i1 @test20(i32 %x) nounwind { 208; CHECK-LABEL: @test20( 209; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %x, 3 210; CHECK-NEXT: ret i1 [[CMP]] 211; 212 %shl = shl i32 1, %x 213 %and = and i32 %shl, 8 214 %cmp = icmp ne i32 %and, 0 215 ret i1 %cmp 216} 217 218define i1 @test20a(i32 %x) nounwind { 219; CHECK-LABEL: @test20a( 220; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %x, 3 221; CHECK-NEXT: ret i1 [[CMP]] 222; 223 %shl = shl i32 1, %x 224 %and = and i32 %shl, 7 225 %cmp = icmp ne i32 %and, 0 226 ret i1 %cmp 227} 228 229define i1 @test21(i8 %x, i8 %y) { 230; CHECK-LABEL: @test21( 231; CHECK-NEXT: [[B:%.*]] = icmp ugt i8 %x, 3 232; CHECK-NEXT: ret i1 [[B]] 233; 234 %A = or i8 %x, 1 235 %B = icmp ugt i8 %A, 3 236 ret i1 %B 237} 238 239define i1 @test22(i8 %x, i8 %y) { 240; CHECK-LABEL: @test22( 241; CHECK-NEXT: [[B:%.*]] = icmp ult i8 %x, 4 242; CHECK-NEXT: ret i1 [[B]] 243; 244 %A = or i8 %x, 1 245 %B = icmp ult i8 %A, 4 246 ret i1 %B 247} 248 249; PR2740 250define i1 @test23(i32 %x) { 251; CHECK-LABEL: @test23( 252; CHECK-NEXT: [[I4:%.*]] = icmp sgt i32 %x, 1328634634 253; CHECK-NEXT: ret i1 [[I4]] 254; 255 %i3 = sdiv i32 %x, -1328634635 256 %i4 = icmp eq i32 %i3, -1 257 ret i1 %i4 258} 259 260@X = global [1000 x i32] zeroinitializer 261 262; PR8882 263define i1 @test24(i64 %i) { 264; CHECK-LABEL: @test24( 265; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 %i, 1000 266; CHECK-NEXT: ret i1 [[CMP]] 267; 268 %p1 = getelementptr inbounds i32, i32* getelementptr inbounds ([1000 x i32], [1000 x i32]* @X, i64 0, i64 0), i64 %i 269 %cmp = icmp eq i32* %p1, getelementptr inbounds ([1000 x i32], [1000 x i32]* @X, i64 1, i64 0) 270 ret i1 %cmp 271} 272 273@X_as1 = addrspace(1) global [1000 x i32] zeroinitializer 274 275define i1 @test24_as1(i64 %i) { 276; CHECK-LABEL: @test24_as1( 277; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 %i to i16 278; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[TMP1]], 1000 279; CHECK-NEXT: ret i1 [[CMP]] 280; 281 %p1 = getelementptr inbounds i32, i32 addrspace(1)* getelementptr inbounds ([1000 x i32], [1000 x i32] addrspace(1)* @X_as1, i64 0, i64 0), i64 %i 282 %cmp = icmp eq i32 addrspace(1)* %p1, getelementptr inbounds ([1000 x i32], [1000 x i32] addrspace(1)* @X_as1, i64 1, i64 0) 283 ret i1 %cmp 284} 285 286define i1 @test25(i32 %x, i32 %y, i32 %z) { 287; CHECK-LABEL: @test25( 288; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 %x, %y 289; CHECK-NEXT: ret i1 [[C]] 290; 291 %lhs = add nsw i32 %x, %z 292 %rhs = add nsw i32 %y, %z 293 %c = icmp sgt i32 %lhs, %rhs 294 ret i1 %c 295} 296 297; X + Z > Y + Z -> X > Y if there is no overflow. 298define i1 @test26(i32 %x, i32 %y, i32 %z) { 299; CHECK-LABEL: @test26( 300; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 %x, %y 301; CHECK-NEXT: ret i1 [[C]] 302; 303 %lhs = add nuw i32 %x, %z 304 %rhs = add nuw i32 %y, %z 305 %c = icmp ugt i32 %lhs, %rhs 306 ret i1 %c 307} 308 309; X - Z > Y - Z -> X > Y if there is no overflow. 310define i1 @test27(i32 %x, i32 %y, i32 %z) { 311; CHECK-LABEL: @test27( 312; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 %x, %y 313; CHECK-NEXT: ret i1 [[C]] 314; 315 %lhs = sub nsw i32 %x, %z 316 %rhs = sub nsw i32 %y, %z 317 %c = icmp sgt i32 %lhs, %rhs 318 ret i1 %c 319} 320 321; X - Z > Y - Z -> X > Y if there is no overflow. 322define i1 @test28(i32 %x, i32 %y, i32 %z) { 323; CHECK-LABEL: @test28( 324; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 %x, %y 325; CHECK-NEXT: ret i1 [[C]] 326; 327 %lhs = sub nuw i32 %x, %z 328 %rhs = sub nuw i32 %y, %z 329 %c = icmp ugt i32 %lhs, %rhs 330 ret i1 %c 331} 332 333; X + Y > X -> Y > 0 if there is no overflow. 334define i1 @test29(i32 %x, i32 %y) { 335; CHECK-LABEL: @test29( 336; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 %y, 0 337; CHECK-NEXT: ret i1 [[C]] 338; 339 %lhs = add nsw i32 %x, %y 340 %c = icmp sgt i32 %lhs, %x 341 ret i1 %c 342} 343 344; X + Y > X -> Y > 0 if there is no overflow. 345define i1 @test30(i32 %x, i32 %y) { 346; CHECK-LABEL: @test30( 347; CHECK-NEXT: [[C:%.*]] = icmp ne i32 %y, 0 348; CHECK-NEXT: ret i1 [[C]] 349; 350 %lhs = add nuw i32 %x, %y 351 %c = icmp ugt i32 %lhs, %x 352 ret i1 %c 353} 354 355; X > X + Y -> 0 > Y if there is no overflow. 356define i1 @test31(i32 %x, i32 %y) { 357; CHECK-LABEL: @test31( 358; CHECK-NEXT: [[C:%.*]] = icmp slt i32 %y, 0 359; CHECK-NEXT: ret i1 [[C]] 360; 361 %rhs = add nsw i32 %x, %y 362 %c = icmp sgt i32 %x, %rhs 363 ret i1 %c 364} 365 366; X > X + Y -> 0 > Y if there is no overflow. 367define i1 @test32(i32 %x, i32 %y) { 368; CHECK-LABEL: @test32( 369; CHECK-NEXT: ret i1 false 370; 371 %rhs = add nuw i32 %x, %y 372 %c = icmp ugt i32 %x, %rhs 373 ret i1 %c 374} 375 376; X - Y > X -> 0 > Y if there is no overflow. 377define i1 @test33(i32 %x, i32 %y) { 378; CHECK-LABEL: @test33( 379; CHECK-NEXT: [[C:%.*]] = icmp slt i32 %y, 0 380; CHECK-NEXT: ret i1 [[C]] 381; 382 %lhs = sub nsw i32 %x, %y 383 %c = icmp sgt i32 %lhs, %x 384 ret i1 %c 385} 386 387; X - Y > X -> 0 > Y if there is no overflow. 388define i1 @test34(i32 %x, i32 %y) { 389; CHECK-LABEL: @test34( 390; CHECK-NEXT: ret i1 false 391; 392 %lhs = sub nuw i32 %x, %y 393 %c = icmp ugt i32 %lhs, %x 394 ret i1 %c 395} 396 397; X > X - Y -> Y > 0 if there is no overflow. 398define i1 @test35(i32 %x, i32 %y) { 399; CHECK-LABEL: @test35( 400; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 %y, 0 401; CHECK-NEXT: ret i1 [[C]] 402; 403 %rhs = sub nsw i32 %x, %y 404 %c = icmp sgt i32 %x, %rhs 405 ret i1 %c 406} 407 408; X > X - Y -> Y > 0 if there is no overflow. 409define i1 @test36(i32 %x, i32 %y) { 410; CHECK-LABEL: @test36( 411; CHECK-NEXT: [[C:%.*]] = icmp ne i32 %y, 0 412; CHECK-NEXT: ret i1 [[C]] 413; 414 %rhs = sub nuw i32 %x, %y 415 %c = icmp ugt i32 %x, %rhs 416 ret i1 %c 417} 418 419; X - Y > X - Z -> Z > Y if there is no overflow. 420define i1 @test37(i32 %x, i32 %y, i32 %z) { 421; CHECK-LABEL: @test37( 422; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 %z, %y 423; CHECK-NEXT: ret i1 [[C]] 424; 425 %lhs = sub nsw i32 %x, %y 426 %rhs = sub nsw i32 %x, %z 427 %c = icmp sgt i32 %lhs, %rhs 428 ret i1 %c 429} 430 431; X - Y > X - Z -> Z > Y if there is no overflow. 432define i1 @test38(i32 %x, i32 %y, i32 %z) { 433; CHECK-LABEL: @test38( 434; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 %z, %y 435; CHECK-NEXT: ret i1 [[C]] 436; 437 %lhs = sub nuw i32 %x, %y 438 %rhs = sub nuw i32 %x, %z 439 %c = icmp ugt i32 %lhs, %rhs 440 ret i1 %c 441} 442 443; PR9343 #1 444define i1 @test39(i32 %X, i32 %Y) { 445; CHECK-LABEL: @test39( 446; CHECK-NEXT: [[B:%.*]] = icmp eq i32 %X, 0 447; CHECK-NEXT: ret i1 [[B]] 448; 449 %A = ashr exact i32 %X, %Y 450 %B = icmp eq i32 %A, 0 451 ret i1 %B 452} 453 454define i1 @test40(i32 %X, i32 %Y) { 455; CHECK-LABEL: @test40( 456; CHECK-NEXT: [[B:%.*]] = icmp ne i32 %X, 0 457; CHECK-NEXT: ret i1 [[B]] 458; 459 %A = lshr exact i32 %X, %Y 460 %B = icmp ne i32 %A, 0 461 ret i1 %B 462} 463 464; PR9343 #3 465define i1 @test41(i32 %X, i32 %Y) { 466; CHECK-LABEL: @test41( 467; CHECK-NEXT: ret i1 true 468; 469 %A = urem i32 %X, %Y 470 %B = icmp ugt i32 %Y, %A 471 ret i1 %B 472} 473 474define i1 @test42(i32 %X, i32 %Y) { 475; CHECK-LABEL: @test42( 476; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 %Y, -1 477; CHECK-NEXT: ret i1 [[B]] 478; 479 %A = srem i32 %X, %Y 480 %B = icmp slt i32 %A, %Y 481 ret i1 %B 482} 483 484define i1 @test43(i32 %X, i32 %Y) { 485; CHECK-LABEL: @test43( 486; CHECK-NEXT: [[B:%.*]] = icmp slt i32 %Y, 0 487; CHECK-NEXT: ret i1 [[B]] 488; 489 %A = srem i32 %X, %Y 490 %B = icmp slt i32 %Y, %A 491 ret i1 %B 492} 493 494define i1 @test44(i32 %X, i32 %Y) { 495; CHECK-LABEL: @test44( 496; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 %Y, -1 497; CHECK-NEXT: ret i1 [[B]] 498; 499 %A = srem i32 %X, %Y 500 %B = icmp slt i32 %A, %Y 501 ret i1 %B 502} 503 504define i1 @test45(i32 %X, i32 %Y) { 505; CHECK-LABEL: @test45( 506; CHECK-NEXT: [[B:%.*]] = icmp slt i32 %Y, 0 507; CHECK-NEXT: ret i1 [[B]] 508; 509 %A = srem i32 %X, %Y 510 %B = icmp slt i32 %Y, %A 511 ret i1 %B 512} 513 514; PR9343 #4 515define i1 @test46(i32 %X, i32 %Y, i32 %Z) { 516; CHECK-LABEL: @test46( 517; CHECK-NEXT: [[C:%.*]] = icmp ult i32 %X, %Y 518; CHECK-NEXT: ret i1 [[C]] 519; 520 %A = ashr exact i32 %X, %Z 521 %B = ashr exact i32 %Y, %Z 522 %C = icmp ult i32 %A, %B 523 ret i1 %C 524} 525 526; PR9343 #5 527define i1 @test47(i32 %X, i32 %Y, i32 %Z) { 528; CHECK-LABEL: @test47( 529; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 %X, %Y 530; CHECK-NEXT: ret i1 [[C]] 531; 532 %A = ashr exact i32 %X, %Z 533 %B = ashr exact i32 %Y, %Z 534 %C = icmp ugt i32 %A, %B 535 ret i1 %C 536} 537 538; PR9343 #8 539define i1 @test48(i32 %X, i32 %Y, i32 %Z) { 540; CHECK-LABEL: @test48( 541; CHECK-NEXT: [[C:%.*]] = icmp eq i32 %X, %Y 542; CHECK-NEXT: ret i1 [[C]] 543; 544 %A = sdiv exact i32 %X, %Z 545 %B = sdiv exact i32 %Y, %Z 546 %C = icmp eq i32 %A, %B 547 ret i1 %C 548} 549 550; PR8469 551define <2 x i1> @test49(<2 x i32> %tmp3) { 552; CHECK-LABEL: @test49( 553; CHECK-NEXT: entry: 554; CHECK-NEXT: ret <2 x i1> <i1 true, i1 true> 555; 556entry: 557 %tmp11 = and <2 x i32> %tmp3, <i32 3, i32 3> 558 %cmp = icmp ult <2 x i32> %tmp11, <i32 4, i32 4> 559 ret <2 x i1> %cmp 560} 561 562; PR9343 #7 563define i1 @test50(i16 %X, i32 %Y) { 564; CHECK-LABEL: @test50( 565; CHECK-NEXT: ret i1 true 566; 567 %A = zext i16 %X to i32 568 %B = srem i32 %A, %Y 569 %C = icmp sgt i32 %B, -1 570 ret i1 %C 571} 572 573define i1 @test51(i32 %X, i32 %Y) { 574; CHECK-LABEL: @test51( 575; CHECK-NEXT: [[A:%.*]] = and i32 %X, -2147483648 576; CHECK-NEXT: [[B:%.*]] = srem i32 [[A]], %Y 577; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[B]], -1 578; CHECK-NEXT: ret i1 [[C]] 579; 580 %A = and i32 %X, 2147483648 581 %B = srem i32 %A, %Y 582 %C = icmp sgt i32 %B, -1 583 ret i1 %C 584} 585 586define i1 @test52(i32 %x1) nounwind { 587; CHECK-LABEL: @test52( 588; CHECK-NEXT: [[TMP1:%.*]] = and i32 %x1, 16711935 589; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 4980863 590; CHECK-NEXT: ret i1 [[TMP2]] 591; 592 %conv = and i32 %x1, 255 593 %cmp = icmp eq i32 %conv, 127 594 %tmp2 = lshr i32 %x1, 16 595 %tmp3 = trunc i32 %tmp2 to i8 596 %cmp15 = icmp eq i8 %tmp3, 76 597 598 %A = and i1 %cmp, %cmp15 599 ret i1 %A 600} 601 602; PR9838 603define i1 @test53(i32 %a, i32 %b) nounwind { 604; CHECK-LABEL: @test53( 605; CHECK-NEXT: [[X:%.*]] = sdiv exact i32 %a, 30 606; CHECK-NEXT: [[Y:%.*]] = sdiv i32 %b, 30 607; CHECK-NEXT: [[Z:%.*]] = icmp eq i32 [[X]], [[Y]] 608; CHECK-NEXT: ret i1 [[Z]] 609; 610 %x = sdiv exact i32 %a, 30 611 %y = sdiv i32 %b, 30 612 %z = icmp eq i32 %x, %y 613 ret i1 %z 614} 615 616define i1 @test54(i8 %a) nounwind { 617; CHECK-LABEL: @test54( 618; CHECK-NEXT: [[AND:%.*]] = and i8 %a, -64 619; CHECK-NEXT: [[RET:%.*]] = icmp eq i8 [[AND]], -128 620; CHECK-NEXT: ret i1 [[RET]] 621; 622 %ext = zext i8 %a to i32 623 %and = and i32 %ext, 192 624 %ret = icmp eq i32 %and, 128 625 ret i1 %ret 626} 627 628define i1 @test55(i32 %a) { 629; CHECK-LABEL: @test55( 630; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %a, -123 631; CHECK-NEXT: ret i1 [[CMP]] 632; 633 %sub = sub i32 0, %a 634 %cmp = icmp eq i32 %sub, 123 635 ret i1 %cmp 636} 637 638define i1 @test56(i32 %a) { 639; CHECK-LABEL: @test56( 640; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %a, -113 641; CHECK-NEXT: ret i1 [[CMP]] 642; 643 %sub = sub i32 10, %a 644 %cmp = icmp eq i32 %sub, 123 645 ret i1 %cmp 646} 647 648; PR10267 Don't make icmps more expensive when no other inst is subsumed. 649declare void @foo(i32) 650define i1 @test57(i32 %a) { 651; CHECK-LABEL: @test57( 652; CHECK-NEXT: [[AND:%.*]] = and i32 %a, -2 653; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0 654; CHECK-NEXT: call void @foo(i32 [[AND]]) 655; CHECK-NEXT: ret i1 [[CMP]] 656; 657 %and = and i32 %a, -2 658 %cmp = icmp ne i32 %and, 0 659 call void @foo(i32 %and) 660 ret i1 %cmp 661} 662 663; rdar://problem/10482509 664define zeroext i1 @cmpabs1(i64 %val) { 665; CHECK-LABEL: @cmpabs1( 666; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i64 %val, 0 667; CHECK-NEXT: ret i1 [[TOBOOL]] 668; 669 %sub = sub nsw i64 0, %val 670 %cmp = icmp slt i64 %val, 0 671 %sub.val = select i1 %cmp, i64 %sub, i64 %val 672 %tobool = icmp ne i64 %sub.val, 0 673 ret i1 %tobool 674} 675 676define zeroext i1 @cmpabs2(i64 %val) { 677; CHECK-LABEL: @cmpabs2( 678; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i64 %val, 0 679; CHECK-NEXT: ret i1 [[TOBOOL]] 680; 681 %sub = sub nsw i64 0, %val 682 %cmp = icmp slt i64 %val, 0 683 %sub.val = select i1 %cmp, i64 %val, i64 %sub 684 %tobool = icmp ne i64 %sub.val, 0 685 ret i1 %tobool 686} 687 688define void @test58() nounwind { 689; CHECK-LABEL: @test58( 690; CHECK-NEXT: [[CALL:%.*]] = call i32 @test58_d(i64 36029346783166592) #1 691; CHECK-NEXT: ret void 692; 693 %cast = bitcast <1 x i64> <i64 36029346783166592> to i64 694 %call = call i32 @test58_d( i64 %cast) nounwind 695 ret void 696} 697declare i32 @test58_d(i64) 698 699define i1 @test59(i8* %foo) { 700; CHECK-LABEL: @test59( 701; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i8, i8* %foo, i64 8 702; CHECK-NEXT: [[USE:%.*]] = ptrtoint i8* [[GEP1]] to i64 703; CHECK-NEXT: [[CALL:%.*]] = call i32 @test58_d(i64 [[USE]]) #1 704; CHECK-NEXT: ret i1 true 705; 706 %bit = bitcast i8* %foo to i32* 707 %gep1 = getelementptr inbounds i32, i32* %bit, i64 2 708 %gep2 = getelementptr inbounds i8, i8* %foo, i64 10 709 %cast1 = bitcast i32* %gep1 to i8* 710 %cmp = icmp ult i8* %cast1, %gep2 711 %use = ptrtoint i8* %cast1 to i64 712 %call = call i32 @test58_d(i64 %use) nounwind 713 ret i1 %cmp 714} 715 716define i1 @test59_as1(i8 addrspace(1)* %foo) { 717; CHECK-LABEL: @test59_as1( 718; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i8, i8 addrspace(1)* %foo, i16 8 719; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint i8 addrspace(1)* [[GEP1]] to i16 720; CHECK-NEXT: [[USE:%.*]] = zext i16 [[TMP1]] to i64 721; CHECK-NEXT: [[CALL:%.*]] = call i32 @test58_d(i64 [[USE]]) #1 722; CHECK-NEXT: ret i1 true 723; 724 %bit = bitcast i8 addrspace(1)* %foo to i32 addrspace(1)* 725 %gep1 = getelementptr inbounds i32, i32 addrspace(1)* %bit, i64 2 726 %gep2 = getelementptr inbounds i8, i8 addrspace(1)* %foo, i64 10 727 %cast1 = bitcast i32 addrspace(1)* %gep1 to i8 addrspace(1)* 728 %cmp = icmp ult i8 addrspace(1)* %cast1, %gep2 729 %use = ptrtoint i8 addrspace(1)* %cast1 to i64 730 %call = call i32 @test58_d(i64 %use) nounwind 731 ret i1 %cmp 732} 733 734define i1 @test60(i8* %foo, i64 %i, i64 %j) { 735; CHECK-LABEL: @test60( 736; CHECK-NEXT: [[GEP1_IDX:%.*]] = shl nuw i64 %i, 2 737; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i64 [[GEP1_IDX]], %j 738; CHECK-NEXT: ret i1 [[TMP1]] 739; 740 %bit = bitcast i8* %foo to i32* 741 %gep1 = getelementptr inbounds i32, i32* %bit, i64 %i 742 %gep2 = getelementptr inbounds i8, i8* %foo, i64 %j 743 %cast1 = bitcast i32* %gep1 to i8* 744 %cmp = icmp ult i8* %cast1, %gep2 745 ret i1 %cmp 746} 747 748define i1 @test60_as1(i8 addrspace(1)* %foo, i64 %i, i64 %j) { 749; CHECK-LABEL: @test60_as1( 750; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 %i to i16 751; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 %j to i16 752; CHECK-NEXT: [[GEP1_IDX:%.*]] = shl nuw i16 [[TMP1]], 2 753; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i16 [[TMP2]], [[GEP1_IDX]] 754; CHECK-NEXT: ret i1 [[TMP3]] 755; 756 %bit = bitcast i8 addrspace(1)* %foo to i32 addrspace(1)* 757 %gep1 = getelementptr inbounds i32, i32 addrspace(1)* %bit, i64 %i 758 %gep2 = getelementptr inbounds i8, i8 addrspace(1)* %foo, i64 %j 759 %cast1 = bitcast i32 addrspace(1)* %gep1 to i8 addrspace(1)* 760 %cmp = icmp ult i8 addrspace(1)* %cast1, %gep2 761 ret i1 %cmp 762} 763 764; Same as test60, but look through an addrspacecast instead of a 765; bitcast. This uses the same sized addrspace. 766define i1 @test60_addrspacecast(i8* %foo, i64 %i, i64 %j) { 767; CHECK-LABEL: @test60_addrspacecast( 768; CHECK-NEXT: [[GEP1_IDX:%.*]] = shl nuw i64 %i, 2 769; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i64 [[GEP1_IDX]], %j 770; CHECK-NEXT: ret i1 [[TMP1]] 771; 772 %bit = addrspacecast i8* %foo to i32 addrspace(3)* 773 %gep1 = getelementptr inbounds i32, i32 addrspace(3)* %bit, i64 %i 774 %gep2 = getelementptr inbounds i8, i8* %foo, i64 %j 775 %cast1 = addrspacecast i32 addrspace(3)* %gep1 to i8* 776 %cmp = icmp ult i8* %cast1, %gep2 777 ret i1 %cmp 778} 779 780define i1 @test60_addrspacecast_smaller(i8* %foo, i16 %i, i64 %j) { 781; CHECK-LABEL: @test60_addrspacecast_smaller( 782; CHECK-NEXT: [[GEP1_IDX:%.*]] = shl nuw i16 %i, 2 783; CHECK-NEXT: [[TMP1:%.*]] = trunc i64 %j to i16 784; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i16 [[TMP1]], [[GEP1_IDX]] 785; CHECK-NEXT: ret i1 [[TMP2]] 786; 787 %bit = addrspacecast i8* %foo to i32 addrspace(1)* 788 %gep1 = getelementptr inbounds i32, i32 addrspace(1)* %bit, i16 %i 789 %gep2 = getelementptr inbounds i8, i8* %foo, i64 %j 790 %cast1 = addrspacecast i32 addrspace(1)* %gep1 to i8* 791 %cmp = icmp ult i8* %cast1, %gep2 792 ret i1 %cmp 793} 794 795define i1 @test60_addrspacecast_larger(i8 addrspace(1)* %foo, i32 %i, i16 %j) { 796; CHECK-LABEL: @test60_addrspacecast_larger( 797; CHECK-NEXT: [[GEP1_IDX:%.*]] = shl nuw i32 %i, 2 798; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[GEP1_IDX]] to i16 799; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], %j 800; CHECK-NEXT: ret i1 [[TMP2]] 801; 802 %bit = addrspacecast i8 addrspace(1)* %foo to i32 addrspace(2)* 803 %gep1 = getelementptr inbounds i32, i32 addrspace(2)* %bit, i32 %i 804 %gep2 = getelementptr inbounds i8, i8 addrspace(1)* %foo, i16 %j 805 %cast1 = addrspacecast i32 addrspace(2)* %gep1 to i8 addrspace(1)* 806 %cmp = icmp ult i8 addrspace(1)* %cast1, %gep2 807 ret i1 %cmp 808} 809 810define i1 @test61(i8* %foo, i64 %i, i64 %j) { 811; CHECK-LABEL: @test61( 812; CHECK-NEXT: [[BIT:%.*]] = bitcast i8* %foo to i32* 813; CHECK-NEXT: [[GEP1:%.*]] = getelementptr i32, i32* [[BIT]], i64 %i 814; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i8, i8* %foo, i64 %j 815; CHECK-NEXT: [[CAST1:%.*]] = bitcast i32* [[GEP1]] to i8* 816; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8* [[CAST1]], [[GEP2]] 817; CHECK-NEXT: ret i1 [[CMP]] 818; 819 %bit = bitcast i8* %foo to i32* 820 %gep1 = getelementptr i32, i32* %bit, i64 %i 821 %gep2 = getelementptr i8, i8* %foo, i64 %j 822 %cast1 = bitcast i32* %gep1 to i8* 823 %cmp = icmp ult i8* %cast1, %gep2 824 ret i1 %cmp 825; Don't transform non-inbounds GEPs. 826} 827 828define i1 @test61_as1(i8 addrspace(1)* %foo, i16 %i, i16 %j) { 829; CHECK-LABEL: @test61_as1( 830; CHECK-NEXT: [[BIT:%.*]] = bitcast i8 addrspace(1)* %foo to i32 addrspace(1)* 831; CHECK-NEXT: [[GEP1:%.*]] = getelementptr i32, i32 addrspace(1)* [[BIT]], i16 %i 832; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i8, i8 addrspace(1)* %foo, i16 %j 833; CHECK-NEXT: [[CAST1:%.*]] = bitcast i32 addrspace(1)* [[GEP1]] to i8 addrspace(1)* 834; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 addrspace(1)* [[CAST1]], [[GEP2]] 835; CHECK-NEXT: ret i1 [[CMP]] 836; 837 %bit = bitcast i8 addrspace(1)* %foo to i32 addrspace(1)* 838 %gep1 = getelementptr i32, i32 addrspace(1)* %bit, i16 %i 839 %gep2 = getelementptr i8, i8 addrspace(1)* %foo, i16 %j 840 %cast1 = bitcast i32 addrspace(1)* %gep1 to i8 addrspace(1)* 841 %cmp = icmp ult i8 addrspace(1)* %cast1, %gep2 842 ret i1 %cmp 843; Don't transform non-inbounds GEPs. 844} 845 846define i1 @test62(i8* %a) { 847; CHECK-LABEL: @test62( 848; CHECK-NEXT: ret i1 true 849; 850 %arrayidx1 = getelementptr inbounds i8, i8* %a, i64 1 851 %arrayidx2 = getelementptr inbounds i8, i8* %a, i64 10 852 %cmp = icmp slt i8* %arrayidx1, %arrayidx2 853 ret i1 %cmp 854} 855 856define i1 @test62_as1(i8 addrspace(1)* %a) { 857; CHECK-LABEL: @test62_as1( 858; CHECK-NEXT: ret i1 true 859; 860 %arrayidx1 = getelementptr inbounds i8, i8 addrspace(1)* %a, i64 1 861 %arrayidx2 = getelementptr inbounds i8, i8 addrspace(1)* %a, i64 10 862 %cmp = icmp slt i8 addrspace(1)* %arrayidx1, %arrayidx2 863 ret i1 %cmp 864} 865 866define i1 @test63(i8 %a, i32 %b) nounwind { 867; CHECK-LABEL: @test63( 868; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %b to i8 869; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[TMP1]], %a 870; CHECK-NEXT: ret i1 [[C]] 871; 872 %z = zext i8 %a to i32 873 %t = and i32 %b, 255 874 %c = icmp eq i32 %z, %t 875 ret i1 %c 876} 877 878define i1 @test64(i8 %a, i32 %b) nounwind { 879; CHECK-LABEL: @test64( 880; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %b to i8 881; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[TMP1]], %a 882; CHECK-NEXT: ret i1 [[C]] 883; 884 %t = and i32 %b, 255 885 %z = zext i8 %a to i32 886 %c = icmp eq i32 %t, %z 887 ret i1 %c 888} 889 890define i1 @test65(i64 %A, i64 %B) { 891; CHECK-LABEL: @test65( 892; CHECK-NEXT: ret i1 true 893; 894 %s1 = add i64 %A, %B 895 %s2 = add i64 %A, %B 896 %cmp = icmp eq i64 %s1, %s2 897 ret i1 %cmp 898} 899 900define i1 @test66(i64 %A, i64 %B) { 901; CHECK-LABEL: @test66( 902; CHECK-NEXT: ret i1 true 903; 904 %s1 = add i64 %A, %B 905 %s2 = add i64 %B, %A 906 %cmp = icmp eq i64 %s1, %s2 907 ret i1 %cmp 908} 909 910define i1 @test67(i32 %x) nounwind uwtable { 911; CHECK-LABEL: @test67( 912; CHECK-NEXT: [[AND:%.*]] = and i32 %x, 96 913; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[AND]], 0 914; CHECK-NEXT: ret i1 [[CMP]] 915; 916 %and = and i32 %x, 127 917 %cmp = icmp sgt i32 %and, 31 918 ret i1 %cmp 919} 920 921define i1 @test68(i32 %x) nounwind uwtable { 922; CHECK-LABEL: @test68( 923; CHECK-NEXT: [[AND:%.*]] = and i32 %x, 127 924; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[AND]], 30 925; CHECK-NEXT: ret i1 [[CMP]] 926; 927 %and = and i32 %x, 127 928 %cmp = icmp sgt i32 %and, 30 929 ret i1 %cmp 930} 931 932; PR14708 933define i1 @test69(i32 %c) nounwind uwtable { 934; CHECK-LABEL: @test69( 935; CHECK-NEXT: [[TMP1:%.*]] = or i32 %c, 32 936; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 97 937; CHECK-NEXT: ret i1 [[TMP2]] 938; 939 %1 = icmp eq i32 %c, 97 940 %2 = icmp eq i32 %c, 65 941 %3 = or i1 %1, %2 942 ret i1 %3 943} 944 945; PR15940 946define i1 @test70(i32 %X) { 947; CHECK-LABEL: @test70( 948; CHECK-NEXT: [[A:%.*]] = srem i32 5, %X 949; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[A]], 2 950; CHECK-NEXT: ret i1 [[C]] 951; 952 %A = srem i32 5, %X 953 %B = add i32 %A, 2 954 %C = icmp ne i32 %B, 4 955 ret i1 %C 956} 957 958define i1 @icmp_sext16trunc(i32 %x) { 959; CHECK-LABEL: @icmp_sext16trunc( 960; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %x to i16 961; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[TMP1]], 36 962; CHECK-NEXT: ret i1 [[CMP]] 963; 964 %trunc = trunc i32 %x to i16 965 %sext = sext i16 %trunc to i32 966 %cmp = icmp slt i32 %sext, 36 967 ret i1 %cmp 968} 969 970define i1 @icmp_sext8trunc(i32 %x) { 971; CHECK-LABEL: @icmp_sext8trunc( 972; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %x to i8 973; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TMP1]], 36 974; CHECK-NEXT: ret i1 [[CMP]] 975; 976 %trunc = trunc i32 %x to i8 977 %sext = sext i8 %trunc to i32 978 %cmp = icmp slt i32 %sext, 36 979 ret i1 %cmp 980} 981 982define i1 @icmp_shl16(i32 %x) { 983; CHECK-LABEL: @icmp_shl16( 984; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %x to i16 985; CHECK-NEXT: [[CMP:%.*]] = icmp slt i16 [[TMP1]], 36 986; CHECK-NEXT: ret i1 [[CMP]] 987; 988 %shl = shl i32 %x, 16 989 %cmp = icmp slt i32 %shl, 2359296 990 ret i1 %cmp 991} 992 993define i1 @icmp_shl24(i32 %x) { 994; CHECK-LABEL: @icmp_shl24( 995; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 %x to i8 996; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 [[TMP1]], 36 997; CHECK-NEXT: ret i1 [[CMP]] 998; 999 %shl = shl i32 %x, 24 1000 %cmp = icmp slt i32 %shl, 603979776 1001 ret i1 %cmp 1002} 1003 1004; If the (shl x, C) preserved the sign and this is a sign test, 1005; compare the LHS operand instead 1006define i1 @icmp_shl_nsw_sgt(i32 %x) { 1007; CHECK-LABEL: @icmp_shl_nsw_sgt( 1008; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %x, 0 1009; CHECK-NEXT: ret i1 [[CMP]] 1010; 1011 %shl = shl nsw i32 %x, 21 1012 %cmp = icmp sgt i32 %shl, 0 1013 ret i1 %cmp 1014} 1015 1016define i1 @icmp_shl_nsw_sge0(i32 %x) { 1017; CHECK-LABEL: @icmp_shl_nsw_sge0( 1018; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %x, -1 1019; CHECK-NEXT: ret i1 [[CMP]] 1020; 1021 %shl = shl nsw i32 %x, 21 1022 %cmp = icmp sge i32 %shl, 0 1023 ret i1 %cmp 1024} 1025 1026define i1 @icmp_shl_nsw_sge1(i32 %x) { 1027; CHECK-LABEL: @icmp_shl_nsw_sge1( 1028; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %x, 0 1029; CHECK-NEXT: ret i1 [[CMP]] 1030; 1031 %shl = shl nsw i32 %x, 21 1032 %cmp = icmp sge i32 %shl, 1 1033 ret i1 %cmp 1034} 1035 1036; Checks for icmp (eq|ne) (shl x, C), 0 1037define i1 @icmp_shl_nsw_eq(i32 %x) { 1038; CHECK-LABEL: @icmp_shl_nsw_eq( 1039; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %x, 0 1040; CHECK-NEXT: ret i1 [[CMP]] 1041; 1042 %mul = shl nsw i32 %x, 5 1043 %cmp = icmp eq i32 %mul, 0 1044 ret i1 %cmp 1045} 1046 1047define i1 @icmp_shl_eq(i32 %x) { 1048; CHECK-LABEL: @icmp_shl_eq( 1049; CHECK-NEXT: [[MUL_MASK:%.*]] = and i32 %x, 134217727 1050; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[MUL_MASK]], 0 1051; CHECK-NEXT: ret i1 [[CMP]] 1052; 1053 %mul = shl i32 %x, 5 1054 %cmp = icmp eq i32 %mul, 0 1055 ret i1 %cmp 1056} 1057 1058define i1 @icmp_shl_nsw_ne(i32 %x) { 1059; CHECK-LABEL: @icmp_shl_nsw_ne( 1060; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %x, 0 1061; CHECK-NEXT: ret i1 [[CMP]] 1062; 1063 %mul = shl nsw i32 %x, 7 1064 %cmp = icmp ne i32 %mul, 0 1065 ret i1 %cmp 1066} 1067 1068define i1 @icmp_shl_ne(i32 %x) { 1069; CHECK-LABEL: @icmp_shl_ne( 1070; CHECK-NEXT: [[MUL_MASK:%.*]] = and i32 %x, 33554431 1071; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[MUL_MASK]], 0 1072; CHECK-NEXT: ret i1 [[CMP]] 1073; 1074 %mul = shl i32 %x, 7 1075 %cmp = icmp ne i32 %mul, 0 1076 ret i1 %cmp 1077} 1078 1079; If the (mul x, C) preserved the sign and this is sign test, 1080; compare the LHS operand instead 1081define i1 @icmp_mul_nsw(i32 %x) { 1082; CHECK-LABEL: @icmp_mul_nsw( 1083; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %x, 0 1084; CHECK-NEXT: ret i1 [[CMP]] 1085; 1086 %mul = mul nsw i32 %x, 12 1087 %cmp = icmp sgt i32 %mul, 0 1088 ret i1 %cmp 1089} 1090 1091define i1 @icmp_mul_nsw1(i32 %x) { 1092; CHECK-LABEL: @icmp_mul_nsw1( 1093; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %x, 0 1094; CHECK-NEXT: ret i1 [[CMP]] 1095; 1096 %mul = mul nsw i32 %x, 12 1097 %cmp = icmp sle i32 %mul, -1 1098 ret i1 %cmp 1099} 1100 1101define i1 @icmp_mul_nsw_neg(i32 %x) { 1102; CHECK-LABEL: @icmp_mul_nsw_neg( 1103; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %x, 1 1104; CHECK-NEXT: ret i1 [[CMP]] 1105; 1106 %mul = mul nsw i32 %x, -12 1107 %cmp = icmp sge i32 %mul, 0 1108 ret i1 %cmp 1109} 1110 1111define i1 @icmp_mul_nsw_neg1(i32 %x) { 1112; CHECK-LABEL: @icmp_mul_nsw_neg1( 1113; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %x, 0 1114; CHECK-NEXT: ret i1 [[CMP]] 1115; 1116 %mul = mul nsw i32 %x, -12 1117 %cmp = icmp sge i32 %mul, 1 1118 ret i1 %cmp 1119} 1120 1121define i1 @icmp_mul_nsw_0(i32 %x) { 1122; CHECK-LABEL: @icmp_mul_nsw_0( 1123; CHECK-NEXT: ret i1 false 1124; 1125 %mul = mul nsw i32 %x, 0 1126 %cmp = icmp sgt i32 %mul, 0 1127 ret i1 %cmp 1128} 1129 1130define i1 @icmp_mul(i32 %x) { 1131; CHECK-LABEL: @icmp_mul( 1132; CHECK-NEXT: [[MUL:%.*]] = mul i32 %x, -12 1133; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[MUL]], -1 1134; CHECK-NEXT: ret i1 [[CMP]] 1135; 1136 %mul = mul i32 %x, -12 1137 %cmp = icmp sge i32 %mul, 0 1138 ret i1 %cmp 1139} 1140 1141; Checks for icmp (eq|ne) (mul x, C), 0 1142define i1 @icmp_mul_neq0(i32 %x) { 1143; CHECK-LABEL: @icmp_mul_neq0( 1144; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %x, 0 1145; CHECK-NEXT: ret i1 [[CMP]] 1146; 1147 %mul = mul nsw i32 %x, -12 1148 %cmp = icmp ne i32 %mul, 0 1149 ret i1 %cmp 1150} 1151 1152define i1 @icmp_mul_eq0(i32 %x) { 1153; CHECK-LABEL: @icmp_mul_eq0( 1154; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %x, 0 1155; CHECK-NEXT: ret i1 [[CMP]] 1156; 1157 %mul = mul nsw i32 %x, 12 1158 %cmp = icmp eq i32 %mul, 0 1159 ret i1 %cmp 1160} 1161 1162define i1 @icmp_mul0_eq0(i32 %x) { 1163; CHECK-LABEL: @icmp_mul0_eq0( 1164; CHECK-NEXT: ret i1 true 1165; 1166 %mul = mul i32 %x, 0 1167 %cmp = icmp eq i32 %mul, 0 1168 ret i1 %cmp 1169} 1170 1171define i1 @icmp_mul0_ne0(i32 %x) { 1172; CHECK-LABEL: @icmp_mul0_ne0( 1173; CHECK-NEXT: ret i1 false 1174; 1175 %mul = mul i32 %x, 0 1176 %cmp = icmp ne i32 %mul, 0 1177 ret i1 %cmp 1178} 1179 1180define i1 @icmp_sub1_sge(i32 %x, i32 %y) { 1181; CHECK-LABEL: @icmp_sub1_sge( 1182; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %x, %y 1183; CHECK-NEXT: ret i1 [[CMP]] 1184; 1185 %sub = add nsw i32 %x, -1 1186 %cmp = icmp sge i32 %sub, %y 1187 ret i1 %cmp 1188} 1189 1190define i1 @icmp_add1_sgt(i32 %x, i32 %y) { 1191; CHECK-LABEL: @icmp_add1_sgt( 1192; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 %x, %y 1193; CHECK-NEXT: ret i1 [[CMP]] 1194; 1195 %add = add nsw i32 %x, 1 1196 %cmp = icmp sgt i32 %add, %y 1197 ret i1 %cmp 1198} 1199 1200define i1 @icmp_sub1_slt(i32 %x, i32 %y) { 1201; CHECK-LABEL: @icmp_sub1_slt( 1202; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 %x, %y 1203; CHECK-NEXT: ret i1 [[CMP]] 1204; 1205 %sub = add nsw i32 %x, -1 1206 %cmp = icmp slt i32 %sub, %y 1207 ret i1 %cmp 1208} 1209 1210define i1 @icmp_add1_sle(i32 %x, i32 %y) { 1211; CHECK-LABEL: @icmp_add1_sle( 1212; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %x, %y 1213; CHECK-NEXT: ret i1 [[CMP]] 1214; 1215 %add = add nsw i32 %x, 1 1216 %cmp = icmp sle i32 %add, %y 1217 ret i1 %cmp 1218} 1219 1220define i1 @icmp_add20_sge_add57(i32 %x, i32 %y) { 1221; CHECK-LABEL: @icmp_add20_sge_add57( 1222; CHECK-NEXT: [[TMP1:%.*]] = add nsw i32 %y, 37 1223; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], %x 1224; CHECK-NEXT: ret i1 [[CMP]] 1225; 1226 %1 = add nsw i32 %x, 20 1227 %2 = add nsw i32 %y, 57 1228 %cmp = icmp sge i32 %1, %2 1229 ret i1 %cmp 1230} 1231 1232define i1 @icmp_sub57_sge_sub20(i32 %x, i32 %y) { 1233; CHECK-LABEL: @icmp_sub57_sge_sub20( 1234; CHECK-NEXT: [[TMP1:%.*]] = add nsw i32 %x, -37 1235; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[TMP1]], %y 1236; CHECK-NEXT: ret i1 [[CMP]] 1237; 1238 %1 = add nsw i32 %x, -57 1239 %2 = add nsw i32 %y, -20 1240 %cmp = icmp sge i32 %1, %2 1241 ret i1 %cmp 1242} 1243 1244define i1 @icmp_and_shl_neg_ne_0(i32 %A, i32 %B) { 1245; CHECK-LABEL: @icmp_and_shl_neg_ne_0( 1246; CHECK-NEXT: [[SHL:%.*]] = shl i32 1, %B 1247; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SHL]], %A 1248; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 0 1249; CHECK-NEXT: ret i1 [[CMP]] 1250; 1251 %neg = xor i32 %A, -1 1252 %shl = shl i32 1, %B 1253 %and = and i32 %shl, %neg 1254 %cmp = icmp ne i32 %and, 0 1255 ret i1 %cmp 1256} 1257 1258define i1 @icmp_and_shl_neg_eq_0(i32 %A, i32 %B) { 1259; CHECK-LABEL: @icmp_and_shl_neg_eq_0( 1260; CHECK-NEXT: [[SHL:%.*]] = shl i32 1, %B 1261; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SHL]], %A 1262; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP1]], 0 1263; CHECK-NEXT: ret i1 [[CMP]] 1264; 1265 %neg = xor i32 %A, -1 1266 %shl = shl i32 1, %B 1267 %and = and i32 %shl, %neg 1268 %cmp = icmp eq i32 %and, 0 1269 ret i1 %cmp 1270} 1271 1272define i1 @icmp_add_and_shr_ne_0(i32 %X) { 1273; CHECK-LABEL: @icmp_add_and_shr_ne_0( 1274; CHECK-NEXT: [[AND:%.*]] = and i32 %X, 240 1275; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 224 1276; CHECK-NEXT: ret i1 [[TOBOOL]] 1277; 1278 %shr = lshr i32 %X, 4 1279 %and = and i32 %shr, 15 1280 %add = add i32 %and, -14 1281 %tobool = icmp ne i32 %add, 0 1282 ret i1 %tobool 1283} 1284 1285; PR16244 1286define i1 @test71(i8* %x) { 1287; CHECK-LABEL: @test71( 1288; CHECK-NEXT: ret i1 false 1289; 1290 %a = getelementptr i8, i8* %x, i64 8 1291 %b = getelementptr inbounds i8, i8* %x, i64 8 1292 %c = icmp ugt i8* %a, %b 1293 ret i1 %c 1294} 1295 1296define i1 @test71_as1(i8 addrspace(1)* %x) { 1297; CHECK-LABEL: @test71_as1( 1298; CHECK-NEXT: ret i1 false 1299; 1300 %a = getelementptr i8, i8 addrspace(1)* %x, i64 8 1301 %b = getelementptr inbounds i8, i8 addrspace(1)* %x, i64 8 1302 %c = icmp ugt i8 addrspace(1)* %a, %b 1303 ret i1 %c 1304} 1305 1306define i1 @icmp_shl_1_V_ult_32(i32 %V) { 1307; CHECK-LABEL: @icmp_shl_1_V_ult_32( 1308; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %V, 5 1309; CHECK-NEXT: ret i1 [[CMP]] 1310; 1311 %shl = shl i32 1, %V 1312 %cmp = icmp ult i32 %shl, 32 1313 ret i1 %cmp 1314} 1315 1316define i1 @icmp_shl_1_V_eq_32(i32 %V) { 1317; CHECK-LABEL: @icmp_shl_1_V_eq_32( 1318; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %V, 5 1319; CHECK-NEXT: ret i1 [[CMP]] 1320; 1321 %shl = shl i32 1, %V 1322 %cmp = icmp eq i32 %shl, 32 1323 ret i1 %cmp 1324} 1325 1326define i1 @icmp_shl_1_V_ult_30(i32 %V) { 1327; CHECK-LABEL: @icmp_shl_1_V_ult_30( 1328; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %V, 5 1329; CHECK-NEXT: ret i1 [[CMP]] 1330; 1331 %shl = shl i32 1, %V 1332 %cmp = icmp ult i32 %shl, 30 1333 ret i1 %cmp 1334} 1335 1336define i1 @icmp_shl_1_V_ugt_30(i32 %V) { 1337; CHECK-LABEL: @icmp_shl_1_V_ugt_30( 1338; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %V, 4 1339; CHECK-NEXT: ret i1 [[CMP]] 1340; 1341 %shl = shl i32 1, %V 1342 %cmp = icmp ugt i32 %shl, 30 1343 ret i1 %cmp 1344} 1345 1346define i1 @icmp_shl_1_V_ule_30(i32 %V) { 1347; CHECK-LABEL: @icmp_shl_1_V_ule_30( 1348; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %V, 5 1349; CHECK-NEXT: ret i1 [[CMP]] 1350; 1351 %shl = shl i32 1, %V 1352 %cmp = icmp ule i32 %shl, 30 1353 ret i1 %cmp 1354} 1355 1356define i1 @icmp_shl_1_V_uge_30(i32 %V) { 1357; CHECK-LABEL: @icmp_shl_1_V_uge_30( 1358; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %V, 4 1359; CHECK-NEXT: ret i1 [[CMP]] 1360; 1361 %shl = shl i32 1, %V 1362 %cmp = icmp uge i32 %shl, 30 1363 ret i1 %cmp 1364} 1365 1366define i1 @icmp_shl_1_V_uge_2147483648(i32 %V) { 1367; CHECK-LABEL: @icmp_shl_1_V_uge_2147483648( 1368; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %V, 31 1369; CHECK-NEXT: ret i1 [[CMP]] 1370; 1371 %shl = shl i32 1, %V 1372 %cmp = icmp uge i32 %shl, 2147483648 1373 ret i1 %cmp 1374} 1375 1376define i1 @icmp_shl_1_V_ult_2147483648(i32 %V) { 1377; CHECK-LABEL: @icmp_shl_1_V_ult_2147483648( 1378; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 %V, 31 1379; CHECK-NEXT: ret i1 [[CMP]] 1380; 1381 %shl = shl i32 1, %V 1382 %cmp = icmp ult i32 %shl, 2147483648 1383 ret i1 %cmp 1384} 1385 1386define i1 @or_icmp_eq_B_0_icmp_ult_A_B(i64 %a, i64 %b) { 1387; CHECK-LABEL: @or_icmp_eq_B_0_icmp_ult_A_B( 1388; CHECK-NEXT: [[TMP1:%.*]] = add i64 %b, -1 1389; CHECK-NEXT: [[TMP2:%.*]] = icmp uge i64 [[TMP1]], %a 1390; CHECK-NEXT: ret i1 [[TMP2]] 1391; 1392 %1 = icmp eq i64 %b, 0 1393 %2 = icmp ult i64 %a, %b 1394 %3 = or i1 %1, %2 1395 ret i1 %3 1396} 1397 1398define i1 @icmp_add_ult_2(i32 %X) { 1399; CHECK-LABEL: @icmp_add_ult_2( 1400; CHECK-NEXT: [[TMP1:%.*]] = and i32 %X, -2 1401; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 14 1402; CHECK-NEXT: ret i1 [[CMP]] 1403; 1404 %add = add i32 %X, -14 1405 %cmp = icmp ult i32 %add, 2 1406 ret i1 %cmp 1407} 1408 1409define i1 @icmp_add_X_-14_ult_2(i32 %X) { 1410; CHECK-LABEL: @icmp_add_X_-14_ult_2( 1411; CHECK-NEXT: [[TMP1:%.*]] = and i32 %X, -2 1412; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 14 1413; CHECK-NEXT: ret i1 [[CMP]] 1414; 1415 %add = add i32 %X, -14 1416 %cmp = icmp ult i32 %add, 2 1417 ret i1 %cmp 1418} 1419 1420define i1 @icmp_sub_3_X_ult_2(i32 %X) { 1421; CHECK-LABEL: @icmp_sub_3_X_ult_2( 1422; CHECK-NEXT: [[TMP1:%.*]] = or i32 %X, 1 1423; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 3 1424; CHECK-NEXT: ret i1 [[CMP]] 1425; 1426 %add = sub i32 3, %X 1427 %cmp = icmp ult i32 %add, 2 1428 ret i1 %cmp 1429} 1430 1431define i1 @icmp_add_X_-14_uge_2(i32 %X) { 1432; CHECK-LABEL: @icmp_add_X_-14_uge_2( 1433; CHECK-NEXT: [[TMP1:%.*]] = and i32 %X, -2 1434; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP1]], 14 1435; CHECK-NEXT: ret i1 [[CMP]] 1436; 1437 %add = add i32 %X, -14 1438 %cmp = icmp uge i32 %add, 2 1439 ret i1 %cmp 1440} 1441 1442define i1 @icmp_sub_3_X_uge_2(i32 %X) { 1443; CHECK-LABEL: @icmp_sub_3_X_uge_2( 1444; CHECK-NEXT: [[TMP1:%.*]] = or i32 %X, 1 1445; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP1]], 3 1446; CHECK-NEXT: ret i1 [[CMP]] 1447; 1448 %add = sub i32 3, %X 1449 %cmp = icmp uge i32 %add, 2 1450 ret i1 %cmp 1451} 1452 1453define i1 @icmp_and_X_-16_eq-16(i32 %X) { 1454; CHECK-LABEL: @icmp_and_X_-16_eq-16( 1455; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %X, -17 1456; CHECK-NEXT: ret i1 [[CMP]] 1457; 1458 %and = and i32 %X, -16 1459 %cmp = icmp eq i32 %and, -16 1460 ret i1 %cmp 1461} 1462 1463define i1 @icmp_and_X_-16_ne-16(i32 %X) { 1464; CHECK-LABEL: @icmp_and_X_-16_ne-16( 1465; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %X, -16 1466; CHECK-NEXT: ret i1 [[CMP]] 1467; 1468 %and = and i32 %X, -16 1469 %cmp = icmp ne i32 %and, -16 1470 ret i1 %cmp 1471} 1472 1473define i1 @icmp_sub_-1_X_ult_4(i32 %X) { 1474; CHECK-LABEL: @icmp_sub_-1_X_ult_4( 1475; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %X, -5 1476; CHECK-NEXT: ret i1 [[CMP]] 1477; 1478 %sub = sub i32 -1, %X 1479 %cmp = icmp ult i32 %sub, 4 1480 ret i1 %cmp 1481} 1482 1483define i1 @icmp_sub_-1_X_uge_4(i32 %X) { 1484; CHECK-LABEL: @icmp_sub_-1_X_uge_4( 1485; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %X, -4 1486; CHECK-NEXT: ret i1 [[CMP]] 1487; 1488 %sub = sub i32 -1, %X 1489 %cmp = icmp uge i32 %sub, 4 1490 ret i1 %cmp 1491} 1492 1493define i1 @icmp_swap_operands_for_cse(i32 %X, i32 %Y) { 1494; CHECK-LABEL: @icmp_swap_operands_for_cse( 1495; CHECK-NEXT: entry: 1496; CHECK-NEXT: [[SUB:%.*]] = sub i32 %X, %Y 1497; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %X, %Y 1498; CHECK-NEXT: br i1 [[CMP]], label %true, label %false 1499; CHECK: true: 1500; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[SUB]], 1 1501; CHECK-NEXT: br label %end 1502; CHECK: false: 1503; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[SUB]], 16 1504; CHECK-NEXT: br label %end 1505; CHECK: end: 1506; CHECK-NEXT: [[RES_IN:%.*]] = phi i32 [ [[TMP0]], %true ], [ [[TMP1]], %false ] 1507; CHECK-NEXT: [[RES:%.*]] = icmp ne i32 [[RES:%.*]].in, 0 1508; CHECK-NEXT: ret i1 [[RES]] 1509; 1510entry: 1511 %sub = sub i32 %X, %Y 1512 %cmp = icmp ugt i32 %Y, %X 1513 br i1 %cmp, label %true, label %false 1514true: 1515 %restrue = trunc i32 %sub to i1 1516 br label %end 1517false: 1518 %shift = lshr i32 %sub, 4 1519 %resfalse = trunc i32 %shift to i1 1520 br label %end 1521end: 1522 %res = phi i1 [%restrue, %true], [%resfalse, %false] 1523 ret i1 %res 1524} 1525 1526define i1 @icmp_swap_operands_for_cse2(i32 %X, i32 %Y) { 1527; CHECK-LABEL: @icmp_swap_operands_for_cse2( 1528; CHECK-NEXT: entry: 1529; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 %X, %Y 1530; CHECK-NEXT: br i1 [[CMP]], label %true, label %false 1531; CHECK: true: 1532; CHECK-NEXT: [[SUB:%.*]] = sub i32 %X, %Y 1533; CHECK-NEXT: [[SUB1:%.*]] = sub i32 %X, %Y 1534; CHECK-NEXT: [[ADD:%.*]] = add i32 [[SUB]], [[SUB1]] 1535; CHECK-NEXT: br label %end 1536; CHECK: false: 1537; CHECK-NEXT: [[SUB2:%.*]] = sub i32 %Y, %X 1538; CHECK-NEXT: br label %end 1539; CHECK: end: 1540; CHECK-NEXT: [[RES_IN_IN:%.*]] = phi i32 [ [[ADD]], %true ], [ [[SUB2]], %false ] 1541; CHECK-NEXT: [[RES_IN:%.*]] = and i32 [[RES_IN:%.*]].in, 1 1542; CHECK-NEXT: [[RES:%.*]] = icmp ne i32 [[RES:%.*]].in, 0 1543; CHECK-NEXT: ret i1 [[RES]] 1544; 1545entry: 1546 %cmp = icmp ugt i32 %Y, %X 1547 br i1 %cmp, label %true, label %false 1548true: 1549 %sub = sub i32 %X, %Y 1550 %sub1 = sub i32 %X, %Y 1551 %add = add i32 %sub, %sub1 1552 %restrue = trunc i32 %add to i1 1553 br label %end 1554false: 1555 %sub2 = sub i32 %Y, %X 1556 %resfalse = trunc i32 %sub2 to i1 1557 br label %end 1558end: 1559 %res = phi i1 [%restrue, %true], [%resfalse, %false] 1560 ret i1 %res 1561} 1562 1563define i1 @icmp_do_not_swap_operands_for_cse(i32 %X, i32 %Y) { 1564; CHECK-LABEL: @icmp_do_not_swap_operands_for_cse( 1565; CHECK-NEXT: entry: 1566; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %Y, %X 1567; CHECK-NEXT: br i1 [[CMP]], label %true, label %false 1568; CHECK: true: 1569; CHECK-NEXT: [[SUB:%.*]] = sub i32 %X, %Y 1570; CHECK-NEXT: br label %end 1571; CHECK: false: 1572; CHECK-NEXT: [[SUB2:%.*]] = sub i32 %Y, %X 1573; CHECK-NEXT: br label %end 1574; CHECK: end: 1575; CHECK-NEXT: [[RES_IN_IN:%.*]] = phi i32 [ [[SUB]], %true ], [ [[SUB2]], %false ] 1576; CHECK-NEXT: [[RES_IN:%.*]] = and i32 [[RES_IN:%.*]].in, 1 1577; CHECK-NEXT: [[RES:%.*]] = icmp ne i32 [[RES:%.*]].in, 0 1578; CHECK-NEXT: ret i1 [[RES]] 1579; 1580entry: 1581 %cmp = icmp ugt i32 %Y, %X 1582 br i1 %cmp, label %true, label %false 1583true: 1584 %sub = sub i32 %X, %Y 1585 %restrue = trunc i32 %sub to i1 1586 br label %end 1587false: 1588 %sub2 = sub i32 %Y, %X 1589 %resfalse = trunc i32 %sub2 to i1 1590 br label %end 1591end: 1592 %res = phi i1 [%restrue, %true], [%resfalse, %false] 1593 ret i1 %res 1594} 1595 1596define i1 @icmp_lshr_lshr_eq(i32 %a, i32 %b) nounwind { 1597; CHECK-LABEL: @icmp_lshr_lshr_eq( 1598; CHECK-NEXT: [[Z_UNSHIFTED:%.*]] = xor i32 %a, %b 1599; CHECK-NEXT: [[Z:%.*]] = icmp ult i32 [[Z:%.*]].unshifted, 1073741824 1600; CHECK-NEXT: ret i1 [[Z]] 1601; 1602 %x = lshr i32 %a, 30 1603 %y = lshr i32 %b, 30 1604 %z = icmp eq i32 %x, %y 1605 ret i1 %z 1606} 1607 1608define i1 @icmp_ashr_ashr_ne(i32 %a, i32 %b) nounwind { 1609; CHECK-LABEL: @icmp_ashr_ashr_ne( 1610; CHECK-NEXT: [[Z_UNSHIFTED:%.*]] = xor i32 %a, %b 1611; CHECK-NEXT: [[Z:%.*]] = icmp ugt i32 [[Z:%.*]].unshifted, 255 1612; CHECK-NEXT: ret i1 [[Z]] 1613; 1614 %x = ashr i32 %a, 8 1615 %y = ashr i32 %b, 8 1616 %z = icmp ne i32 %x, %y 1617 ret i1 %z 1618} 1619 1620define i1 @icmp_neg_cst_slt(i32 %a) { 1621; CHECK-LABEL: @icmp_neg_cst_slt( 1622; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 %a, 10 1623; CHECK-NEXT: ret i1 [[TMP1]] 1624; 1625 %1 = sub nsw i32 0, %a 1626 %2 = icmp slt i32 %1, -10 1627 ret i1 %2 1628} 1629 1630define i1 @icmp_and_or_lshr(i32 %x, i32 %y) { 1631; CHECK-LABEL: @icmp_and_or_lshr( 1632; CHECK-NEXT: [[SHF1:%.*]] = shl nuw i32 1, %y 1633; CHECK-NEXT: [[OR2:%.*]] = or i32 [[SHF1]], 1 1634; CHECK-NEXT: [[AND3:%.*]] = and i32 [[OR2]], %x 1635; CHECK-NEXT: [[RET:%.*]] = icmp ne i32 [[AND3]], 0 1636; CHECK-NEXT: ret i1 [[RET]] 1637; 1638 %shf = lshr i32 %x, %y 1639 %or = or i32 %shf, %x 1640 %and = and i32 %or, 1 1641 %ret = icmp ne i32 %and, 0 1642 ret i1 %ret 1643} 1644 1645define i1 @icmp_and_or_lshr_cst(i32 %x) { 1646; CHECK-LABEL: @icmp_and_or_lshr_cst( 1647; CHECK-NEXT: [[AND1:%.*]] = and i32 %x, 3 1648; CHECK-NEXT: [[RET:%.*]] = icmp ne i32 [[AND1]], 0 1649; CHECK-NEXT: ret i1 [[RET]] 1650; 1651 %shf = lshr i32 %x, 1 1652 %or = or i32 %shf, %x 1653 %and = and i32 %or, 1 1654 %ret = icmp ne i32 %and, 0 1655 ret i1 %ret 1656} 1657 1658define i1 @shl_ap1_zero_ap2_non_zero_2(i32 %a) { 1659; CHECK-LABEL: @shl_ap1_zero_ap2_non_zero_2( 1660; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %a, 29 1661; CHECK-NEXT: ret i1 [[CMP]] 1662; 1663 %shl = shl i32 4, %a 1664 %cmp = icmp eq i32 %shl, 0 1665 ret i1 %cmp 1666} 1667 1668define i1 @shl_ap1_zero_ap2_non_zero_4(i32 %a) { 1669; CHECK-LABEL: @shl_ap1_zero_ap2_non_zero_4( 1670; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 %a, 30 1671; CHECK-NEXT: ret i1 [[CMP]] 1672; 1673 %shl = shl i32 -2, %a 1674 %cmp = icmp eq i32 %shl, 0 1675 ret i1 %cmp 1676} 1677 1678define i1 @shl_ap1_non_zero_ap2_non_zero_both_positive(i32 %a) { 1679; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_both_positive( 1680; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %a, 0 1681; CHECK-NEXT: ret i1 [[CMP]] 1682; 1683 %shl = shl i32 50, %a 1684 %cmp = icmp eq i32 %shl, 50 1685 ret i1 %cmp 1686} 1687 1688define i1 @shl_ap1_non_zero_ap2_non_zero_both_negative(i32 %a) { 1689; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_both_negative( 1690; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %a, 0 1691; CHECK-NEXT: ret i1 [[CMP]] 1692; 1693 %shl = shl i32 -50, %a 1694 %cmp = icmp eq i32 %shl, -50 1695 ret i1 %cmp 1696} 1697 1698define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_1(i32 %a) { 1699; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_ap1_1( 1700; CHECK-NEXT: ret i1 false 1701; 1702 %shl = shl i32 50, %a 1703 %cmp = icmp eq i32 %shl, 25 1704 ret i1 %cmp 1705} 1706 1707define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_2(i32 %a) { 1708; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_ap1_2( 1709; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %a, 1 1710; CHECK-NEXT: ret i1 [[CMP]] 1711; 1712 %shl = shl i32 25, %a 1713 %cmp = icmp eq i32 %shl, 50 1714 ret i1 %cmp 1715} 1716 1717define i1 @shl_ap1_non_zero_ap2_non_zero_ap1_3(i32 %a) { 1718; CHECK-LABEL: @shl_ap1_non_zero_ap2_non_zero_ap1_3( 1719; CHECK-NEXT: ret i1 false 1720; 1721 %shl = shl i32 26, %a 1722 %cmp = icmp eq i32 %shl, 50 1723 ret i1 %cmp 1724} 1725 1726define i1 @icmp_sgt_zero_add_nsw(i32 %a) { 1727; CHECK-LABEL: @icmp_sgt_zero_add_nsw( 1728; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %a, -1 1729; CHECK-NEXT: ret i1 [[CMP]] 1730; 1731 %add = add nsw i32 %a, 1 1732 %cmp = icmp sgt i32 %add, 0 1733 ret i1 %cmp 1734} 1735 1736define i1 @icmp_sge_zero_add_nsw(i32 %a) { 1737; CHECK-LABEL: @icmp_sge_zero_add_nsw( 1738; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 %a, -2 1739; CHECK-NEXT: ret i1 [[CMP]] 1740; 1741 %add = add nsw i32 %a, 1 1742 %cmp = icmp sge i32 %add, 0 1743 ret i1 %cmp 1744} 1745 1746define i1 @icmp_slt_zero_add_nsw(i32 %a) { 1747; CHECK-LABEL: @icmp_slt_zero_add_nsw( 1748; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %a, -1 1749; CHECK-NEXT: ret i1 [[CMP]] 1750; 1751 %add = add nsw i32 %a, 1 1752 %cmp = icmp slt i32 %add, 0 1753 ret i1 %cmp 1754} 1755 1756define i1 @icmp_sle_zero_add_nsw(i32 %a) { 1757; CHECK-LABEL: @icmp_sle_zero_add_nsw( 1758; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 %a, 0 1759; CHECK-NEXT: ret i1 [[CMP]] 1760; 1761 %add = add nsw i32 %a, 1 1762 %cmp = icmp sle i32 %add, 0 1763 ret i1 %cmp 1764} 1765 1766define zeroext i1 @icmp_cmpxchg_strong(i32* %sc, i32 %old_val, i32 %new_val) { 1767; CHECK-LABEL: @icmp_cmpxchg_strong( 1768; CHECK-NEXT: [[XCHG:%.*]] = cmpxchg i32* %sc, i32 %old_val, i32 %new_val seq_cst seq_cst 1769; CHECK-NEXT: [[ICMP:%.*]] = extractvalue { i32, i1 1770; 1771 %xchg = cmpxchg i32* %sc, i32 %old_val, i32 %new_val seq_cst seq_cst 1772 %xtrc = extractvalue { i32, i1 } %xchg, 0 1773 %icmp = icmp eq i32 %xtrc, %old_val 1774 ret i1 %icmp 1775} 1776 1777define i1 @f1(i64 %a, i64 %b) { 1778; CHECK-LABEL: @f1( 1779; CHECK-NEXT: [[V:%.*]] = icmp sge i64 %a, %b 1780; CHECK-NEXT: ret i1 [[V]] 1781; 1782 %t = sub nsw i64 %a, %b 1783 %v = icmp sge i64 %t, 0 1784 ret i1 %v 1785} 1786 1787define i1 @f2(i64 %a, i64 %b) { 1788; CHECK-LABEL: @f2( 1789; CHECK-NEXT: [[V:%.*]] = icmp sgt i64 %a, %b 1790; CHECK-NEXT: ret i1 [[V]] 1791; 1792 %t = sub nsw i64 %a, %b 1793 %v = icmp sgt i64 %t, 0 1794 ret i1 %v 1795} 1796 1797define i1 @f3(i64 %a, i64 %b) { 1798; CHECK-LABEL: @f3( 1799; CHECK-NEXT: [[V:%.*]] = icmp slt i64 %a, %b 1800; CHECK-NEXT: ret i1 [[V]] 1801; 1802 %t = sub nsw i64 %a, %b 1803 %v = icmp slt i64 %t, 0 1804 ret i1 %v 1805} 1806 1807define i1 @f4(i64 %a, i64 %b) { 1808; CHECK-LABEL: @f4( 1809; CHECK-NEXT: [[V:%.*]] = icmp sle i64 %a, %b 1810; CHECK-NEXT: ret i1 [[V]] 1811; 1812 %t = sub nsw i64 %a, %b 1813 %v = icmp sle i64 %t, 0 1814 ret i1 %v 1815} 1816 1817define i32 @f5(i8 %a, i8 %b) { 1818; CHECK-LABEL: @f5( 1819; CHECK-NEXT: [[CONV:%.*]] = zext i8 %a to i32 1820; CHECK-NEXT: [[CONV3:%.*]] = zext i8 %b to i32 1821; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[CONV]], [[CONV3]] 1822; CHECK-NEXT: [[CMP4:%.*]] = icmp slt i32 [[SUB]], 0 1823; CHECK-NEXT: [[SUB7:%.*]] = sub nsw i32 0, [[SUB]] 1824; CHECK-NEXT: [[SUB7_SUB:%.*]] = select i1 [[CMP4]], i32 [[SUB7]], i32 [[SUB]] 1825; CHECK-NEXT: ret i32 [[SUB7_SUB]] 1826; 1827 %conv = zext i8 %a to i32 1828 %conv3 = zext i8 %b to i32 1829 %sub = sub nsw i32 %conv, %conv3 1830 %cmp4 = icmp slt i32 %sub, 0 1831 %sub7 = sub nsw i32 0, %sub 1832 %sub7.sub = select i1 %cmp4, i32 %sub7, i32 %sub 1833 ret i32 %sub7.sub 1834} 1835 1836define i32 @f6(i32 %a, i32 %b) { 1837; CHECK-LABEL: @f6( 1838; CHECK-NEXT: [[CMP_UNSHIFTED:%.*]] = xor i32 %a, %b 1839; CHECK-NEXT: [[CMP_MASK:%.*]] = and i32 [[CMP_UNSHIFTED]], 255 1840; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[CMP:%.*]].mask, 0 1841; CHECK-NEXT: [[S:%.*]] = select i1 [[CMP]], i32 10000, i32 0 1842; CHECK-NEXT: ret i32 [[S]] 1843; 1844 %sext = shl i32 %a, 24 1845 %conv = ashr i32 %sext, 24 1846 %sext6 = shl i32 %b, 24 1847 %conv4 = ashr i32 %sext6, 24 1848 %cmp = icmp eq i32 %conv, %conv4 1849 %s = select i1 %cmp, i32 10000, i32 0 1850 ret i32 %s 1851} 1852 1853define i32 @f7(i32 %a, i32 %b) { 1854; CHECK-LABEL: @f7( 1855; CHECK-NEXT: [[CMP_UNSHIFTED:%.*]] = xor i32 %a, %b 1856; CHECK-NEXT: [[CMP_MASK:%.*]] = and i32 [[CMP_UNSHIFTED]], 511 1857; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[CMP:%.*]].mask, 0 1858; CHECK-NEXT: [[S:%.*]] = select i1 [[CMP]], i32 10000, i32 0 1859; CHECK-NEXT: ret i32 [[S]] 1860; 1861 %sext = shl i32 %a, 23 1862 %sext6 = shl i32 %b, 23 1863 %cmp = icmp ne i32 %sext, %sext6 1864 %s = select i1 %cmp, i32 10000, i32 0 1865 ret i32 %s 1866} 1867 1868define i1 @f8(i32 %val, i32 %lim) { 1869; CHECK-LABEL: @f8( 1870; CHECK-NEXT: [[R:%.*]] = icmp ne i32 %lim, 0 1871; CHECK-NEXT: ret i1 [[R]] 1872; 1873 %lim.sub = add i32 %lim, -1 1874 %val.and = and i32 %val, %lim.sub 1875 %r = icmp ult i32 %val.and, %lim 1876 ret i1 %r 1877} 1878 1879define i1 @f9(i32 %val, i32 %lim) { 1880; CHECK-LABEL: @f9( 1881; CHECK-NEXT: [[R:%.*]] = icmp ne i32 %lim, 0 1882; CHECK-NEXT: ret i1 [[R]] 1883; 1884 %lim.sub = sub i32 %lim, 1 1885 %val.and = and i32 %val, %lim.sub 1886 %r = icmp ult i32 %val.and, %lim 1887 ret i1 %r 1888} 1889 1890define i1 @f10(i16 %p) { 1891; CHECK-LABEL: @f10( 1892; CHECK-NEXT: [[CMP580:%.*]] = icmp uge i16 %p, mul (i16 zext (i8 ptrtoint (i1 (i16)* @f10 to i8) to i16), i16 zext (i8 ptrtoint (i1 (i16)* @f10 to i8) to i16)) 1893; CHECK-NEXT: ret i1 [[CMP580]] 1894; 1895 %cmp580 = icmp ule i16 mul (i16 zext (i8 ptrtoint (i1 (i16)* @f10 to i8) to i16), i16 zext (i8 ptrtoint (i1 (i16)* @f10 to i8) to i16)), %p 1896 ret i1 %cmp580 1897} 1898 1899define i1 @cmp_sgt_rhs_dec(float %x, i32 %i) { 1900; CHECK-LABEL: @cmp_sgt_rhs_dec( 1901; CHECK-NEXT: [[CONV:%.*]] = fptosi float %x to i32 1902; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[CONV]], %i 1903; CHECK-NEXT: ret i1 [[CMP]] 1904; 1905 %conv = fptosi float %x to i32 1906 %dec = sub nsw i32 %i, 1 1907 %cmp = icmp sgt i32 %conv, %dec 1908 ret i1 %cmp 1909} 1910 1911define i1 @cmp_sle_rhs_dec(float %x, i32 %i) { 1912; CHECK-LABEL: @cmp_sle_rhs_dec( 1913; CHECK-NEXT: [[CONV:%.*]] = fptosi float %x to i32 1914; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV]], %i 1915; CHECK-NEXT: ret i1 [[CMP]] 1916; 1917 %conv = fptosi float %x to i32 1918 %dec = sub nsw i32 %i, 1 1919 %cmp = icmp sle i32 %conv, %dec 1920 ret i1 %cmp 1921} 1922 1923define i1 @cmp_sge_rhs_inc(float %x, i32 %i) { 1924; CHECK-LABEL: @cmp_sge_rhs_inc( 1925; CHECK-NEXT: [[CONV:%.*]] = fptosi float %x to i32 1926; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[CONV]], %i 1927; CHECK-NEXT: ret i1 [[CMP]] 1928; 1929 %conv = fptosi float %x to i32 1930 %inc = add nsw i32 %i, 1 1931 %cmp = icmp sge i32 %conv, %inc 1932 ret i1 %cmp 1933} 1934 1935define i1 @cmp_slt_rhs_inc(float %x, i32 %i) { 1936; CHECK-LABEL: @cmp_slt_rhs_inc( 1937; CHECK-NEXT: [[CONV:%.*]] = fptosi float %x to i32 1938; CHECK-NEXT: [[CMP:%.*]] = icmp sle i32 [[CONV]], %i 1939; CHECK-NEXT: ret i1 [[CMP]] 1940; 1941 %conv = fptosi float %x to i32 1942 %inc = add nsw i32 %i, 1 1943 %cmp = icmp slt i32 %conv, %inc 1944 ret i1 %cmp 1945} 1946 1947define i1 @PR26407(i32 %x, i32 %y) { 1948; CHECK-LABEL: @PR26407( 1949; CHECK-NEXT: [[ADDX:%.*]] = add i32 %x, 2147483647 1950; CHECK-NEXT: [[ADDY:%.*]] = add i32 %y, 2147483647 1951; CHECK-NEXT: [[CMP:%.*]] = icmp uge i32 [[ADDX]], [[ADDY]] 1952; CHECK-NEXT: ret i1 [[CMP]] 1953; 1954 %addx = add i32 %x, 2147483647 1955 %addy = add i32 %y, 2147483647 1956 %cmp = icmp uge i32 %addx, %addy 1957 ret i1 %cmp 1958} 1959 1960define i1 @cmp_inverse_mask_bits_set_eq(i32 %x) { 1961; CHECK-LABEL: @cmp_inverse_mask_bits_set_eq( 1962; CHECK-NEXT: [[TMP1:%.*]] = and i32 %x, -43 1963; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], -43 1964; CHECK-NEXT: ret i1 [[CMP]] 1965; 1966 %or = or i32 %x, 42 1967 %cmp = icmp eq i32 %or, -1 1968 ret i1 %cmp 1969} 1970 1971define i1 @cmp_inverse_mask_bits_set_ne(i32 %x) { 1972; CHECK-LABEL: @cmp_inverse_mask_bits_set_ne( 1973; CHECK-NEXT: [[TMP1:%.*]] = and i32 %x, -43 1974; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[TMP1]], -43 1975; CHECK-NEXT: ret i1 [[CMP]] 1976; 1977 %or = or i32 %x, 42 1978 %cmp = icmp ne i32 %or, -1 1979 ret i1 %cmp 1980} 1981 1982; CHECK-LABEL: @idom_sign_bit_check_edge_dominates 1983define void @idom_sign_bit_check_edge_dominates(i64 %a) { 1984entry: 1985 %cmp = icmp slt i64 %a, 0 1986 br i1 %cmp, label %land.lhs.true, label %lor.rhs 1987 1988land.lhs.true: ; preds = %entry 1989 br label %lor.end 1990 1991; CHECK-LABEL: lor.rhs: 1992; CHECK-NOT: icmp sgt i64 %a, 0 1993; CHECK: icmp eq i64 %a, 0 1994lor.rhs: ; preds = %entry 1995 %cmp2 = icmp sgt i64 %a, 0 1996 br i1 %cmp2, label %land.rhs, label %lor.end 1997 1998land.rhs: ; preds = %lor.rhs 1999 br label %lor.end 2000 2001lor.end: ; preds = %land.rhs, %lor.rhs, %land.lhs.true 2002 ret void 2003} 2004 2005; CHECK-LABEL: @idom_sign_bit_check_edge_not_dominates 2006define void @idom_sign_bit_check_edge_not_dominates(i64 %a) { 2007entry: 2008 %cmp = icmp slt i64 %a, 0 2009 br i1 %cmp, label %land.lhs.true, label %lor.rhs 2010 2011land.lhs.true: ; preds = %entry 2012 br i1 undef, label %lor.end, label %lor.rhs 2013 2014; CHECK-LABEL: lor.rhs: 2015; CHECK: icmp sgt i64 %a, 0 2016; CHECK-NOT: icmp eq i64 %a, 0 2017lor.rhs: ; preds = %land.lhs.true, %entry 2018 %cmp2 = icmp sgt i64 %a, 0 2019 br i1 %cmp2, label %land.rhs, label %lor.end 2020 2021land.rhs: ; preds = %lor.rhs 2022 br label %lor.end 2023 2024lor.end: ; preds = %land.rhs, %lor.rhs, %land.lhs.true 2025 ret void 2026} 2027 2028; CHECK-LABEL: @idom_sign_bit_check_edge_dominates_select 2029define void @idom_sign_bit_check_edge_dominates_select(i64 %a, i64 %b) { 2030entry: 2031 %cmp = icmp slt i64 %a, 5 2032 br i1 %cmp, label %land.lhs.true, label %lor.rhs 2033 2034land.lhs.true: ; preds = %entry 2035 br label %lor.end 2036 2037; CHECK-LABEL: lor.rhs: 2038; CHECK-NOT: [[B:%.*]] = icmp sgt i64 %a, 5 2039; CHECK: [[C:%.*]] = icmp eq i64 %a, %b 2040; CHECK-NOT: [[D:%.*]] = select i1 [[B]], i64 %a, i64 5 2041; CHECK-NOT: icmp ne i64 [[D]], %b 2042; CHECK-NEXT: br i1 [[C]], label %lor.end, label %land.rhs 2043lor.rhs: ; preds = %entry 2044 %cmp2 = icmp sgt i64 %a, 5 2045 %select = select i1 %cmp2, i64 %a, i64 5 2046 %cmp3 = icmp ne i64 %select, %b 2047 br i1 %cmp3, label %land.rhs, label %lor.end 2048 2049land.rhs: ; preds = %lor.rhs 2050 br label %lor.end 2051 2052lor.end: ; preds = %land.rhs, %lor.rhs, %land.lhs.true 2053 ret void 2054} 2055 2056; CHECK-LABEL: @idom_zbranch 2057define void @idom_zbranch(i64 %a) { 2058entry: 2059 %cmp = icmp sgt i64 %a, 0 2060 br i1 %cmp, label %lor.end, label %lor.rhs 2061 2062; CHECK-LABEL: lor.rhs: 2063; CHECK: icmp slt i64 %a, 0 2064; CHECK-NOT: icmp eq i64 %a, 0 2065lor.rhs: ; preds = %entry 2066 %cmp2 = icmp slt i64 %a, 0 2067 br i1 %cmp2, label %land.rhs, label %lor.end 2068 2069land.rhs: ; preds = %lor.rhs 2070 br label %lor.end 2071 2072lor.end: ; preds = %land.rhs, %lor.rhs 2073 ret void 2074} 2075 2076; CHECK-LABEL: @idom_not_zbranch 2077define void @idom_not_zbranch(i32 %a, i32 %b) { 2078entry: 2079 %cmp = icmp sgt i32 %a, 0 2080 br i1 %cmp, label %return, label %if.end 2081 2082; CHECK-LABEL: if.end: 2083; CHECK-NOT: [[B:%.*]] = icmp slt i32 %a, 0 2084; CHECK: [[C:%.*]] = icmp eq i32 %a, %b 2085; CHECK-NOT: [[D:%.*]] = select i1 [[B]], i32 %a, i32 0 2086; CHECK-NOT: icmp ne i32 [[D]], %b 2087; CHECK-NEXT: br i1 [[C]], label %return, label %if.then3 2088if.end: ; preds = %entry 2089 %cmp1 = icmp slt i32 %a, 0 2090 %a. = select i1 %cmp1, i32 %a, i32 0 2091 %cmp2 = icmp ne i32 %a., %b 2092 br i1 %cmp2, label %if.then3, label %return 2093 2094if.then3: ; preds = %if.end 2095 br label %return 2096 2097return: ; preds = %if.end, %entry, %if.then3 2098 ret void 2099} 2100 2101; When canonicalizing to 'gt/lt', make sure the constant is correct. 2102 2103define i1 @PR27792(i128 %a) { 2104; CHECK-LABEL: @PR27792( 2105; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i128 %a, -1 2106; CHECK-NEXT: ret i1 [[CMP]] 2107; 2108 %cmp = icmp sge i128 %a, 0 2109 ret i1 %cmp 2110} 2111 2112define i1 @PR27792_2(i128 %a) { 2113; CHECK-LABEL: @PR27792_2( 2114; CHECK-NEXT: [[B:%.*]] = icmp ne i128 %a, 0 2115; CHECK-NEXT: ret i1 [[B]] 2116; 2117 %b = icmp uge i128 %a, 1 2118 ret i1 %b 2119} 2120 2121