1#!/usr/bin/python 2 3# This creates a CSV file from the output of the debug output of subtarget: 4# llvm-tblgen --gen-subtarget --debug-only=subtarget-emitter 5# With thanks to Dave Estes for mentioning the idea at 2014 LLVM Developers' Meeting 6 7import os; 8import sys; 9import re; 10import operator; 11 12table = {} 13models = set() 14filt = None 15 16def add(instr, model, resource=None): 17 global table, models 18 19 entry = table.setdefault(instr, dict()) 20 entry[model] = resource 21 models.add(model) 22 23def filter_model(m): 24 global filt 25 if m and filt: 26 return filt.search(m) != None 27 else: 28 return True 29 30 31def display(): 32 global table, models 33 34 ordered_table = sorted(table.items(), key=operator.itemgetter(0)) 35 ordered_models = filter(filter_model, sorted(models)) 36 37 # print header 38 sys.stdout.write("instruction") 39 for model in ordered_models: 40 if not model: model = "default" 41 sys.stdout.write(", {}".format(model)) 42 sys.stdout.write(os.linesep) 43 44 for (instr, mapping) in ordered_table: 45 sys.stdout.write(instr) 46 for model in ordered_models: 47 if model in mapping: 48 sys.stdout.write(", {}".format(mapping[model])) 49 else: 50 sys.stdout.write(", ") 51 sys.stdout.write(os.linesep) 52 53 54def machineModelCover(path): 55 # The interesting bits 56 re_sched_default = re.compile("SchedRW machine model for ([^ ]*) (.*)\n"); 57 re_sched_no_default = re.compile("No machine model for ([^ ]*)\n"); 58 re_sched_spec = re.compile("InstRW on ([^ ]*) for ([^ ]*) (.*)\n"); 59 re_sched_no_spec = re.compile("No machine model for ([^ ]*) on processor (.*)\n"); 60 61 # scan the file 62 with open(path, 'r') as f: 63 for line in f.readlines(): 64 match = re_sched_default.match(line) 65 if match: add(match.group(1), None, match.group(2)) 66 match = re_sched_no_default.match(line) 67 if match: add(match.group(1), None) 68 match = re_sched_spec.match(line) 69 if match: add(match.group(2), match.group(1), match.group(3)) 70 match = re_sched_no_default.match(line) 71 if match: add(match.group(1), None) 72 73 display() 74 75if len(sys.argv) > 2: 76 filt = re.compile(sys.argv[2], re.IGNORECASE) 77machineModelCover(sys.argv[1]) 78