1<?xml version="1.0" encoding="UTF-8"?>
2<database xmlns="http://nouveau.freedesktop.org/"
3xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
5<import file="freedreno_copyright.xml"/>
6
7<domain name="MMSS_CC" width="32">
8	<brief>
9		Multimedia sub-system clock control.. appears to be used by DSI
10		for clocks..
11	</brief>
12
13	<reg32 offset="0x0008" name="AHB"/>
14
15	<enum name="mmss_cc_clk">
16		<value name="CLK" value="0"/>
17		<value name="PCLK" value="1"/>
18	</enum>
19
20	<!--
21		possibly these sequences of registers are same, except pre_div_func
22		is shifted by 12 in pclk and 14 in clk..  I'm going to guess that
23		the register is same and they just multiply value by 4..
24	 -->
25	<array offsets="0x004c,0x0130" name="CLK" length="2" stride="0x10" index="mmss_cc_clk">
26		<reg32 offset="0x00" name="CC">
27			<bitfield name="CLK_EN" pos="0" type="boolean"/>
28			<bitfield name="ROOT_EN" pos="2" type="boolean"/>
29			<bitfield name="MND_EN" pos="5" type="boolean"/>
30			<bitfield name="MND_MODE" low="6" high="7"/>
31			<bitfield name="PMXO_SEL" low="8" high="9"/> <!-- not sure high -->
32		</reg32>
33		<reg32 offset="0x04" name="MD">
34			<bitfield name="D" low="0" high="7"/>
35			<bitfield name="M" low="8" high="15"/>
36		</reg32>
37		<reg32 offset="0x08" name="NS">
38			<bitfield name="SRC" low="0" high="3"/> <!-- not sure high, but it is >= 1 -->
39			<bitfield name="PRE_DIV_FUNC" low="12" high="23"/>
40			<bitfield name="VAL" low="24" high="31"></bitfield>
41		</reg32>
42	</array>
43	<reg32 offset="0x0094" name="DSI2_PIXEL_CC"/>
44	<reg32 offset="0x00e4" name="DSI2_PIXEL_NS"/>
45	<reg32 offset="0x0264" name="DSI2_PIXEL_CC2"/>
46</domain>
47
48</database>
49