1//==- HexagonInstrFormatsV5.td - Hexagon Instruction Formats --*- tablegen -==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file describes the Hexagon V5 instruction classes in TableGen format.
10//
11//===----------------------------------------------------------------------===//
12
13//                      Duplex Instruction Class Declaration
14//===----------------------------------------------------------------------===//
15
16class OpcodeDuplex {
17  field bits<32> Inst = ?; // Default to an invalid insn.
18  bits<4> IClass = 0; // ICLASS
19  bits<13> ISubHi = 0; // Low sub-insn
20  bits<13> ISubLo = 0; // High sub-insn
21
22  let Inst{31-29} = IClass{3-1};
23  let Inst{13}    = IClass{0};
24  let Inst{15-14} = 0;
25  let Inst{28-16} = ISubHi;
26  let Inst{12-0}  = ISubLo;
27}
28
29class InstDuplex<bits<4> iClass, list<dag> pattern = [],
30                 string cstr = "">
31  : Instruction, OpcodeDuplex {
32  let Namespace = "Hexagon";
33  IType Type = TypeDUPLEX;  // uses slot 0,1
34  let isCodeGenOnly = 1;
35  let hasSideEffects = 0;
36  dag OutOperandList = (outs);
37  dag InOperandList = (ins);
38  let IClass = iClass;
39  let Constraints = cstr;
40  let Itinerary = DUPLEX;
41  let Size = 4;
42
43  // SoftFail is a field the disassembler can use to provide a way for
44  // instructions to not match without killing the whole decode process. It is
45  // mainly used for ARM, but Tablegen expects this field to exist or it fails
46  // to build the decode table.
47  field bits<32> SoftFail = 0;
48
49  // *** Must match MCTargetDesc/HexagonBaseInfo.h ***
50
51  let TSFlags{6-0} = Type.Value;
52
53  // Predicated instructions.
54  bits<1> isPredicated = 0;
55  let TSFlags{7} = isPredicated;
56  bits<1> isPredicatedFalse = 0;
57  let TSFlags{8} = isPredicatedFalse;
58  bits<1> isPredicatedNew = 0;
59  let TSFlags{9} = isPredicatedNew;
60
61  // New-value insn helper fields.
62  bits<1> isNewValue = 0;
63  let TSFlags{10} = isNewValue; // New-value consumer insn.
64  bits<1> hasNewValue = 0;
65  let TSFlags{11} = hasNewValue; // New-value producer insn.
66  bits<3> opNewValue = 0;
67  let TSFlags{14-12} = opNewValue; // New-value produced operand.
68  bits<1> isNVStorable = 0;
69  let TSFlags{15} = isNVStorable; // Store that can become new-value store.
70  bits<1> isNVStore = 0;
71  let TSFlags{16} = isNVStore; // New-value store insn.
72
73  // Immediate extender helper fields.
74  bits<1> isExtendable = 0;
75  let TSFlags{17} = isExtendable; // Insn may be extended.
76  bits<1> isExtended = 0;
77  let TSFlags{18} = isExtended; // Insn must be extended.
78  bits<3> opExtendable = 0;
79  let TSFlags{21-19} = opExtendable; // Which operand may be extended.
80  bits<1> isExtentSigned = 0;
81  let TSFlags{22} = isExtentSigned; // Signed or unsigned range.
82  bits<5> opExtentBits = 0;
83  let TSFlags{27-23} = opExtentBits; //Number of bits of range before extending.
84  bits<2> opExtentAlign = 0;
85  let TSFlags{29-28} = opExtentAlign; // Alignment exponent before extending.
86}
87