1 //===-- PPCFrameLowering.h - Define frame lowering for PowerPC --*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // 10 //===----------------------------------------------------------------------===// 11 12 #ifndef LLVM_LIB_TARGET_POWERPC_PPCFRAMELOWERING_H 13 #define LLVM_LIB_TARGET_POWERPC_PPCFRAMELOWERING_H 14 15 #include "llvm/ADT/STLExtras.h" 16 #include "llvm/CodeGen/TargetFrameLowering.h" 17 #include "llvm/Target/TargetMachine.h" 18 19 namespace llvm { 20 class PPCSubtarget; 21 22 class PPCFrameLowering: public TargetFrameLowering { 23 const PPCSubtarget &Subtarget; 24 const unsigned ReturnSaveOffset; 25 const unsigned TOCSaveOffset; 26 const unsigned FramePointerSaveOffset; 27 const unsigned LinkageSize; 28 const unsigned BasePointerSaveOffset; 29 const unsigned CRSaveOffset; 30 31 /** 32 * Find register[s] that can be used in function prologue and epilogue 33 * 34 * Find register[s] that can be use as scratch register[s] in function 35 * prologue and epilogue to save various registers (Link Register, Base 36 * Pointer, etc.). Prefer R0/R12, if available. Otherwise choose whatever 37 * register[s] are available. 38 * 39 * This method will return true if it is able to find enough unique scratch 40 * registers (1 or 2 depending on the requirement). If it is unable to find 41 * enough available registers in the block, it will return false and set 42 * any passed output parameter that corresponds to a required unique register 43 * to PPC::NoRegister. 44 * 45 * \param[in] MBB The machine basic block to find an available register for 46 * \param[in] UseAtEnd Specify whether the scratch register will be used at 47 * the end of the basic block (i.e., will the scratch 48 * register kill a register defined in the basic block) 49 * \param[in] TwoUniqueRegsRequired Specify whether this basic block will 50 * require two unique scratch registers. 51 * \param[out] SR1 The scratch register to use 52 * \param[out] SR2 The second scratch register. If this pointer is not null 53 * the function will attempt to set it to an available 54 * register regardless of whether there is a hard requirement 55 * for two unique scratch registers. 56 * \return true if the required number of registers was found. 57 * false if the required number of scratch register weren't available. 58 * If either output parameter refers to a required scratch register 59 * that isn't available, it will be set to an invalid value. 60 */ 61 bool findScratchRegister(MachineBasicBlock *MBB, 62 bool UseAtEnd, 63 bool TwoUniqueRegsRequired = false, 64 unsigned *SR1 = nullptr, 65 unsigned *SR2 = nullptr) const; 66 bool twoUniqueScratchRegsRequired(MachineBasicBlock *MBB) const; 67 68 /** 69 * Create branch instruction for PPC::TCRETURN* (tail call return) 70 * 71 * \param[in] MBB that is terminated by PPC::TCRETURN* 72 */ 73 void createTailCallBranchInstr(MachineBasicBlock &MBB) const; 74 75 /** 76 * Check if the conditions are correct to allow for the stack update 77 * to be moved past the CSR save/restore code. 78 */ 79 bool stackUpdateCanBeMoved(MachineFunction &MF) const; 80 81 public: 82 PPCFrameLowering(const PPCSubtarget &STI); 83 84 /** 85 * Determine the frame layout and update the machine function. 86 */ 87 unsigned determineFrameLayoutAndUpdate(MachineFunction &MF, 88 bool UseEstimate = false) const; 89 90 /** 91 * Determine the frame layout but do not update the machine function. 92 * The MachineFunction object can be const in this case as it is not 93 * modified. 94 */ 95 unsigned determineFrameLayout(const MachineFunction &MF, 96 bool UseEstimate = false, 97 unsigned *NewMaxCallFrameSize = nullptr) const; 98 99 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into 100 /// the function. 101 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 102 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 103 104 bool hasFP(const MachineFunction &MF) const override; 105 bool needsFP(const MachineFunction &MF) const; 106 void replaceFPWithRealFP(MachineFunction &MF) const; 107 108 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, 109 RegScavenger *RS = nullptr) const override; 110 void processFunctionBeforeFrameFinalized(MachineFunction &MF, 111 RegScavenger *RS = nullptr) const override; 112 void addScavengingSpillSlot(MachineFunction &MF, RegScavenger *RS) const; 113 114 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, 115 MachineBasicBlock::iterator MI, 116 const std::vector<CalleeSavedInfo> &CSI, 117 const TargetRegisterInfo *TRI) const override; 118 /// This function will assign callee saved gprs to volatile vector registers 119 /// for prologue spills when applicable. It returns false if there are any 120 /// registers which were not spilled to volatile vector registers. 121 bool 122 assignCalleeSavedSpillSlots(MachineFunction &MF, 123 const TargetRegisterInfo *TRI, 124 std::vector<CalleeSavedInfo> &CSI) const override; 125 126 MachineBasicBlock::iterator 127 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 128 MachineBasicBlock::iterator I) const override; 129 130 bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 131 MachineBasicBlock::iterator MI, 132 std::vector<CalleeSavedInfo> &CSI, 133 const TargetRegisterInfo *TRI) const override; 134 135 /// targetHandlesStackFrameRounding - Returns true if the target is 136 /// responsible for rounding up the stack frame (probably at emitPrologue 137 /// time). targetHandlesStackFrameRounding()138 bool targetHandlesStackFrameRounding() const override { return true; } 139 140 /// getReturnSaveOffset - Return the previous frame offset to save the 141 /// return address. getReturnSaveOffset()142 unsigned getReturnSaveOffset() const { return ReturnSaveOffset; } 143 144 /// getTOCSaveOffset - Return the previous frame offset to save the 145 /// TOC register -- 64-bit SVR4 ABI only. 146 unsigned getTOCSaveOffset() const; 147 148 /// getFramePointerSaveOffset - Return the previous frame offset to save the 149 /// frame pointer. 150 unsigned getFramePointerSaveOffset() const; 151 152 /// getBasePointerSaveOffset - Return the previous frame offset to save the 153 /// base pointer. 154 unsigned getBasePointerSaveOffset() const; 155 156 /// getCRSaveOffset - Return the previous frame offset to save the 157 /// CR register. getCRSaveOffset()158 unsigned getCRSaveOffset() const { return CRSaveOffset; } 159 160 /// getLinkageSize - Return the size of the PowerPC ABI linkage area. 161 /// getLinkageSize()162 unsigned getLinkageSize() const { return LinkageSize; } 163 164 const SpillSlot * 165 getCalleeSavedSpillSlots(unsigned &NumEntries) const override; 166 167 bool enableShrinkWrapping(const MachineFunction &MF) const override; 168 169 /// Methods used by shrink wrapping to determine if MBB can be used for the 170 /// function prologue/epilogue. 171 bool canUseAsPrologue(const MachineBasicBlock &MBB) const override; 172 bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override; 173 }; 174 } // End llvm namespace 175 176 #endif 177