Lines Matching refs:Register
629 Register index_reg = RegisterFrom(index_, DataType::Type::kInt32); in EmitNativeCode()
654 Register free_reg = FindAvailableCallerSaveRegister(codegen); in EmitNativeCode()
736 Register FindAvailableCallerSaveRegister(CodeGenerator* codegen) { in FindAvailableCallerSaveRegister()
741 return Register(VIXLRegCodeFromART(i), kXRegSize); in FindAvailableCallerSaveRegister()
1116 Register counter = temps.AcquireX(); in MaybeIncrementHotness()
1117 Register method = is_frame_entry ? kArtMethodRegister : temps.AcquireX(); in MaybeIncrementHotness()
1136 Register temp = temps.AcquireX(); in MaybeIncrementHotness()
1137 Register counter = temps.AcquireW(); in MaybeIncrementHotness()
1180 Register temp = temps.AcquireX(); in GenerateFrameEntry()
1233 Register wzr = Register(VIXLRegCodeFromART(WZR), kWRegSize); in GenerateFrameEntry()
1305 void CodeGeneratorARM64::MarkGCCard(Register object, Register value, bool value_can_be_null) { in MarkGCCard()
1307 Register card = temps.AcquireX(); in MarkGCCard()
1308 Register temp = temps.AcquireW(); // Index within the CardTable - 32bit. in MarkGCCard()
1372 Register reg = Register(VIXLRegCodeFromART(reg_id), kXRegSize); in SaveCoreRegister()
1378 Register reg = Register(VIXLRegCodeFromART(reg_id), kXRegSize); in RestoreCoreRegister()
1411 __ Mov(Register(destination), constant->AsIntConstant()->GetValue()); in MoveConstant()
1413 __ Mov(Register(destination), constant->AsLongConstant()->GetValue()); in MoveConstant()
1415 __ Mov(Register(destination), 0); in MoveConstant()
1492 __ Mov(Register(dst), RegisterFrom(source, dst_type)); in MoveLocation()
1540 ? Register(xzr) in MoveLocation()
1541 : Register(wzr); in MoveLocation()
1591 __ Ldrb(Register(dst), src); in Load()
1594 __ Ldrsb(Register(dst), src); in Load()
1597 __ Ldrh(Register(dst), src); in Load()
1600 __ Ldrsh(Register(dst), src); in Load()
1624 Register temp_base = temps.AcquireX(); in LoadAcquire()
1640 __ ldarb(Register(dst), base); in LoadAcquire()
1646 __ Sbfx(Register(dst), Register(dst), 0, DataType::Size(type) * kBitsPerByte); in LoadAcquire()
1653 __ ldarh(Register(dst), base); in LoadAcquire()
1659 __ Sbfx(Register(dst), Register(dst), 0, DataType::Size(type) * kBitsPerByte); in LoadAcquire()
1668 __ ldar(Register(dst), base); in LoadAcquire()
1679 Register temp = dst.Is64Bits() ? temps.AcquireX() : temps.AcquireW(); in LoadAcquire()
1705 __ Strb(Register(src), dst); in Store()
1709 __ Strh(Register(src), dst); in Store()
1733 Register temp_base = temps.AcquireX(); in StoreRelease()
1749 __ stlrb(Register(src), base); in StoreRelease()
1759 __ stlrh(Register(src), base); in StoreRelease()
1771 __ stlr(Register(src), base); in StoreRelease()
1780 Register temp_src; in StoreRelease()
1783 temp_src = Register(src); in StoreRelease()
1842 Register class_reg) { in GenerateClassInitializationCheck()
1844 Register temp = temps.AcquireW(); in GenerateClassInitializationCheck()
1863 HTypeCheckInstruction* check, vixl::aarch64::Register temp) { in GenerateBitstringTypeCheckCompare()
1922 Register temp = temps.AcquireW(); in GenerateSuspendCheck()
2034 Register base = RegisterFrom(base_loc, DataType::Type::kReference); in HandleFieldGet()
2093 Register obj = InputRegisterAt(instruction, 0); in HandleFieldSet()
2111 Register temp = temps.AcquireW(); in HandleFieldSet()
2129 codegen_->MarkGCCard(obj, Register(value), value_can_be_null); in HandleFieldSet()
2143 Register dst = OutputRegister(instr); in HandleBinaryOp()
2144 Register lhs = InputRegisterAt(instr, 0); in HandleBinaryOp()
2222 Register dst = OutputRegister(instr); in HandleShift()
2223 Register lhs = InputRegisterAt(instr, 0); in HandleShift()
2236 Register rhs_reg = dst.IsX() ? rhs.GetRegister().X() : rhs.GetRegister().W(); in HandleShift()
2279 Register dst = OutputRegister(instr); in VisitBitwiseNegatedRight()
2280 Register lhs = InputRegisterAt(instr, 0); in VisitBitwiseNegatedRight()
2281 Register rhs = InputRegisterAt(instr, 1); in VisitBitwiseNegatedRight()
2318 Register out = OutputRegister(instruction); in VisitDataProcWithShifterOp()
2319 Register left; in VisitDataProcWithShifterOp()
2327 Register right_reg = RegisterFrom(instruction->GetLocations()->InAt(1), type); in VisitDataProcWithShifterOp()
2406 Register index_reg = InputRegisterAt(instruction, 0); in VisitIntermediateAddressIndex()
2413 Register offset_reg = InputRegisterAt(instruction, 1); in VisitIntermediateAddressIndex()
2436 Register res = OutputRegister(instr); in VisitMultiplyAccumulate()
2437 Register mul_left = InputRegisterAt(instr, HMultiplyAccumulate::kInputMulLeftIndex); in VisitMultiplyAccumulate()
2438 Register mul_right = InputRegisterAt(instr, HMultiplyAccumulate::kInputMulRightIndex); in VisitMultiplyAccumulate()
2456 Register accumulator = InputRegisterAt(instr, HMultiplyAccumulate::kInputAccumulatorIndex); in VisitMultiplyAccumulate()
2464 Register accumulator = InputRegisterAt(instr, HMultiplyAccumulate::kInputAccumulatorIndex); in VisitMultiplyAccumulate()
2514 Register obj = InputRegisterAt(instruction, 0); in VisitArrayGet()
2556 Register length; in VisitArrayGet()
2582 __ Ldrb(Register(OutputCPURegister(instruction)), in VisitArrayGet()
2586 __ Ldrh(Register(OutputCPURegister(instruction)), in VisitArrayGet()
2594 Register temp = temps.AcquireSameSizeAs(obj); in VisitArrayGet()
2612 __ Ldrb(Register(OutputCPURegister(instruction)), in VisitArrayGet()
2616 __ Ldrh(Register(OutputCPURegister(instruction)), in VisitArrayGet()
2652 vixl::aarch64::Register out = OutputRegister(instruction); in VisitArrayLength()
2690 Register array = InputRegisterAt(instruction, 0); in VisitArraySet()
2705 Register temp = temps.AcquireSameSizeAs(array); in VisitArraySet()
2735 __ Cbz(Register(value), &do_store); in VisitArraySet()
2748 Register temp = temps.AcquireSameSizeAs(array); in VisitArraySet()
2749 Register temp2 = temps.AcquireSameSizeAs(array); in VisitArraySet()
2771 __ Ldr(temp2, HeapOperand(Register(value), class_offset)); in VisitArraySet()
2803 Register temp_source = temps.AcquireSameSizeAs(array); in VisitArraySet()
2814 Register temp_base = temps.AcquireSameSizeAs(array); in VisitArraySet()
2995 Register result = OutputRegister(compare); in VisitCompare()
2996 Register left = InputRegisterAt(compare, 0); in VisitCompare()
3005 Register result = OutputRegister(compare); in VisitCompare()
3042 Register res = RegisterFrom(locations->Out(), instruction->GetType()); in HandleCondition()
3050 Register lhs = InputRegisterAt(instruction, 0); in HandleCondition()
3080 Register out = OutputRegister(instruction); in FOR_EACH_CONDITION_INSTRUCTION()
3081 Register dividend = InputRegisterAt(instruction, 0); in FOR_EACH_CONDITION_INSTRUCTION()
3083 Register final_dividend; in FOR_EACH_CONDITION_INSTRUCTION()
3114 Register temp = temps.AcquireSameSizeAs(out); in FOR_EACH_CONDITION_INSTRUCTION()
3147 Register out, in GenerateIncrementNegativeByOne()
3148 Register in, in GenerateIncrementNegativeByOne()
3159 Register out, in GenerateResultRemWithAnyConstant()
3160 Register dividend, in GenerateResultRemWithAnyConstant()
3161 Register quotient, in GenerateResultRemWithAnyConstant()
3164 Register temp_imm = temps_scope->AcquireSameSizeAs(out); in GenerateResultRemWithAnyConstant()
3180 Register out = OutputRegister(instruction); in GenerateInt64UnsignedDivRemWithAnyPositiveConstant()
3181 Register dividend = InputRegisterAt(instruction, 0); in GenerateInt64UnsignedDivRemWithAnyPositiveConstant()
3190 Register temp = temps.AcquireSameSizeAs(out); in GenerateInt64UnsignedDivRemWithAnyPositiveConstant()
3192 auto generate_unsigned_div_code = [this, magic, shift](Register out, in GenerateInt64UnsignedDivRemWithAnyPositiveConstant()
3193 Register dividend, in GenerateInt64UnsignedDivRemWithAnyPositiveConstant()
3194 Register temp) { in GenerateInt64UnsignedDivRemWithAnyPositiveConstant()
3231 Register out = OutputRegister(instruction); in GenerateInt64DivRemWithAnyConstant()
3232 Register dividend = InputRegisterAt(instruction, 0); in GenerateInt64DivRemWithAnyConstant()
3240 Register temp = temps.AcquireSameSizeAs(out); in GenerateInt64DivRemWithAnyConstant()
3286 Register out = OutputRegister(instruction); in GenerateInt32DivRemWithAnyConstant()
3287 Register dividend = InputRegisterAt(instruction, 0); in GenerateInt32DivRemWithAnyConstant()
3294 Register temp = temps.AcquireSameSizeAs(out); in GenerateInt32DivRemWithAnyConstant()
3379 Register out = OutputRegister(instruction); in GenerateIntDiv()
3380 Register dividend = InputRegisterAt(instruction, 0); in GenerateIntDiv()
3381 Register divisor = InputRegisterAt(instruction, 1); in GenerateIntDiv()
3586 Register lhs = InputRegisterAt(condition, 0); in GenerateTestAndBranch()
3888 Register obj = InputRegisterAt(instruction, 0); in VisitInstanceOf()
3889 Register cls = (type_check_kind == TypeCheckKind::kBitstringCheck) in VisitInstanceOf()
3890 ? Register() in VisitInstanceOf()
3893 Register out = OutputRegister(instruction); in VisitInstanceOf()
4131 Register obj = InputRegisterAt(instruction, 0); in VisitCheckCast()
4132 Register cls = (type_check_kind == TypeCheckKind::kBitstringCheck) in VisitCheckCast()
4133 ? Register() in VisitCheckCast()
4141 Register temp = WRegisterFrom(temp_loc); in VisitCheckCast()
4379 Register klass) { in MaybeGenerateInlineCacheCheck()
4408 Register temp = XRegisterFrom(locations->GetTemp(0)); in VisitInvokeInterface()
4710 Register receiver = calling_convention.GetRegisterAt(0); in GenerateVirtualCall()
4711 Register temp = XRegisterFrom(temp_in); in GenerateVirtualCall()
4759 Register trg_reg = RegisterFrom(trg, type); in MoveFromReturnRegister()
4760 Register res_reg = RegisterFrom(ARM64ReturnLocation(type), type); in MoveFromReturnRegister()
4934 vixl::aarch64::Register reg) { in EmitAdrpPlaceholder()
4942 vixl::aarch64::Register out, in EmitAddPlaceholder()
4943 vixl::aarch64::Register base) { in EmitAddPlaceholder()
4952 vixl::aarch64::Register out, in EmitLdrOffsetPlaceholder()
4953 vixl::aarch64::Register base) { in EmitLdrOffsetPlaceholder()
4960 void CodeGeneratorARM64::LoadBootImageAddress(vixl::aarch64::Register reg, in LoadBootImageAddress()
4985 void CodeGeneratorARM64::LoadTypeForBootImageIntrinsic(vixl::aarch64::Register reg, in LoadTypeForBootImageIntrinsic()
4999 void CodeGeneratorARM64::LoadIntrinsicDeclaringClass(vixl::aarch64::Register reg, HInvoke* invoke) { in LoadIntrinsicDeclaringClass()
5011 void CodeGeneratorARM64::LoadClassRootForIntrinsic(vixl::aarch64::Register reg, in LoadClassRootForIntrinsic()
5274 Register out = OutputRegister(cls); in VisitLoadClass()
5285 Register current_method = InputRegisterAt(cls, 0); in VisitLoadClass()
5325 vixl::aarch64::Register temp = XRegisterFrom(out_loc); in VisitLoadClass()
5466 Register out = OutputRegister(load); in VisitLoadString()
5500 Register temp = XRegisterFrom(out_loc); in VisitLoadString()
5847 Register out = OutputRegister(instruction); in GenerateIntRemForPower2Denom()
5848 Register dividend = InputRegisterAt(instruction, 0); in GenerateIntRemForPower2Denom()
5864 Register temp = temps.AcquireSameSizeAs(out); in GenerateIntRemForPower2Denom()
5903 Register out = OutputRegister(instruction); in GenerateIntRem()
5904 Register dividend = InputRegisterAt(instruction, 0); in GenerateIntRem()
5905 Register divisor = InputRegisterAt(instruction, 1); in GenerateIntRem()
5907 Register temp = temps.AcquireSameSizeAs(out); in GenerateIntRem()
5980 Register in_reg = InputRegisterAt(abs, 0); in VisitAbs()
5981 Register out_reg = OutputRegister(abs); in VisitAbs()
6245 Register output = OutputRegister(conversion); in VisitTypeConversion()
6246 Register source = InputRegisterAt(conversion, 0); in VisitTypeConversion()
6312 Register value_reg = InputRegisterAt(switch_instr, 0); in VisitPackedSwitch()
6328 Register temp = temps.AcquireW(); in VisitPackedSwitch()
6359 Register temp_w = temps.AcquireW(); in VisitPackedSwitch()
6360 Register index; in VisitPackedSwitch()
6376 Register table_base = temps.AcquireX(); in VisitPackedSwitch()
6379 Register jump_offset = temp_w; in VisitPackedSwitch()
6383 Register target_address = table_base; in VisitPackedSwitch()
6396 Register out_reg = RegisterFrom(out, type); in GenerateReferenceLoadOneRegister()
6414 Register temp_reg = RegisterFrom(maybe_temp, type); in GenerateReferenceLoadOneRegister()
6436 Register out_reg = RegisterFrom(out, type); in GenerateReferenceLoadTwoRegisters()
6437 Register obj_reg = RegisterFrom(obj, type); in GenerateReferenceLoadTwoRegisters()
6467 Register obj, in GenerateGcRootFieldLoad()
6472 Register root_reg = RegisterFrom(root, DataType::Type::kReference); in GenerateGcRootFieldLoad()
6538 vixl::aarch64::Register marked_old_value, in GenerateIntrinsicCasMoveWithBakerReadBarrier()
6539 vixl::aarch64::Register old_value) { in GenerateIntrinsicCasMoveWithBakerReadBarrier()
6558 vixl::aarch64::Register obj, in GenerateFieldLoadWithBakerReadBarrier()
6606 Register ref_reg = RegisterFrom(ref, DataType::Type::kReference); in GenerateFieldLoadWithBakerReadBarrier()
6628 Register obj, in GenerateFieldLoadWithBakerReadBarrier()
6634 Register base = obj; in GenerateFieldLoadWithBakerReadBarrier()
6654 Register obj, in GenerateArrayLoadWithBakerReadBarrier()
6688 Register index_reg = RegisterFrom(index, DataType::Type::kInt32); in GenerateArrayLoadWithBakerReadBarrier()
6689 Register ref_reg = RegisterFrom(ref, DataType::Type::kReference); in GenerateArrayLoadWithBakerReadBarrier()
6696 Register temp; in GenerateArrayLoadWithBakerReadBarrier()
6741 Register temp = temp_loc.IsValid() ? WRegisterFrom(temp_loc) : temps.AcquireW(); in MaybeGenerateMarkingRegisterCheck()
6874 /*out*/ Register* scratch) { in VecNEONAddress()
6876 Register base = InputRegisterAt(instruction, 0); in VecNEONAddress()
6907 /*out*/ Register* scratch) { in VecSVEAddress()
6909 Register base = InputRegisterAt(instruction, 0); in VecSVEAddress()
6933 vixl::aarch64::Register base_reg, in EmitGrayCheckAndFastPath()
6965 vixl::aarch64::Register entrypoint) { in LoadReadBarrierMarkIntrospectionEntrypoint()
6980 Register base_reg = in CompileBakerReadBarrierThunk()
6983 Register holder_reg = in CompileBakerReadBarrierThunk()
7030 Register base_reg = in CompileBakerReadBarrierThunk()
7059 Register root_reg = in CompileBakerReadBarrierThunk()