Searched refs:blocked_core_registers_ (Results 1 – 9 of 9) sorted by relevance
96 blocked_core_registers_[arm::R4] = true; in SetupBlockedRegisters()97 blocked_core_registers_[arm::R6] = false; in SetupBlockedRegisters()98 blocked_core_registers_[arm::R7] = false; in SetupBlockedRegisters()157 blocked_core_registers_[x86::EBX] = true; in SetupBlockedRegisters()160 blocked_core_registers_[x86::EDI] = false; in SetupBlockedRegisters()
167 bool* const blocked_core_registers_; variable
957 DCHECK(is_out || !blocked_core_registers_[location.reg()]); in BlockIfInRegister()958 blocked_core_registers_[location.reg()] = true; in BlockIfInRegister()968 DCHECK(is_out || !blocked_core_registers_[location.AsRegisterPairLow<int>()]); in BlockIfInRegister()969 blocked_core_registers_[location.AsRegisterPairLow<int>()] = true; in BlockIfInRegister()970 DCHECK(is_out || !blocked_core_registers_[location.AsRegisterPairHigh<int>()]); in BlockIfInRegister()971 blocked_core_registers_[location.AsRegisterPairHigh<int>()] = true; in BlockIfInRegister()1048 blocked_core_registers_(graph->GetAllocator()->AllocArray<bool>(number_of_core_registers, in CodeGenerator()
421 bool* GetBlockedCoreRegisters() const { return blocked_core_registers_; } in GetBlockedCoreRegisters()424 bool IsBlockedCoreRegister(size_t i) { return blocked_core_registers_[i]; } in IsBlockedCoreRegister()807 bool* const blocked_core_registers_; variable
65 blocked_core_registers_(codegen->GetBlockedCoreRegisters()), in RegisterAllocatorLinearScan()742 ? blocked_core_registers_[reg] in IsBlocked()
2058 blocked_core_registers_[SP] = true; in SetupBlockedRegisters()2059 blocked_core_registers_[LR] = true; in SetupBlockedRegisters()2060 blocked_core_registers_[PC] = true; in SetupBlockedRegisters()2064 blocked_core_registers_[MR] = true; in SetupBlockedRegisters()2068 blocked_core_registers_[TR] = true; in SetupBlockedRegisters()2071 blocked_core_registers_[IP] = true; in SetupBlockedRegisters()2207 if (!blocked_core_registers_[R4]) { in GenerateFrameEntry()2313 core_spills_offset <= (blocked_core_registers_[r4.GetCode()] ? 2u : 3u) * kArmWordSize) { in GenerateFrameExit()
1351 blocked_core_registers_[reserved_core_registers.PopLowestIndex().GetCode()] = true; in SetupBlockedRegisters()1353 blocked_core_registers_[X18] = true; in SetupBlockedRegisters()
1457 blocked_core_registers_[RSP] = true; in SetupBlockedRegisters()1460 blocked_core_registers_[TMP] = true; in SetupBlockedRegisters()
1084 blocked_core_registers_[ESP] = true; in SetupBlockedRegisters()