1 /*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #include "disassembler_arm.h"
18
19 #include <memory>
20 #include <string>
21
22 #include "android-base/logging.h"
23
24 #include "arch/arm/registers_arm.h"
25 #include "base/bit_utils.h"
26
27 #pragma GCC diagnostic push
28 #pragma GCC diagnostic ignored "-Wshadow"
29 #include "aarch32/disasm-aarch32.h"
30 #include "aarch32/instructions-aarch32.h"
31 #pragma GCC diagnostic pop
32
33 namespace art {
34 namespace arm {
35
36 using vixl::aarch32::MemOperand;
37 using vixl::aarch32::PrintDisassembler;
38 using vixl::aarch32::pc;
39
40 static const vixl::aarch32::Register tr(TR);
41
42 class DisassemblerArm::CustomDisassembler final : public PrintDisassembler {
43 class CustomDisassemblerStream final : public DisassemblerStream {
44 public:
CustomDisassemblerStream(std::ostream & os,const CustomDisassembler * disasm,const DisassemblerOptions * options)45 CustomDisassemblerStream(std::ostream& os,
46 const CustomDisassembler* disasm,
47 const DisassemblerOptions* options)
48 : DisassemblerStream(os), disasm_(disasm), options_(options) {}
49
operator <<(const PrintLabel & label)50 DisassemblerStream& operator<<(const PrintLabel& label) override {
51 const LocationType type = label.GetLocationType();
52
53 switch (type) {
54 case kLoadByteLocation:
55 case kLoadHalfWordLocation:
56 case kLoadWordLocation:
57 case kLoadDoubleWordLocation:
58 case kLoadSignedByteLocation:
59 case kLoadSignedHalfWordLocation:
60 case kLoadSinglePrecisionLocation:
61 case kLoadDoublePrecisionLocation:
62 case kVld1Location:
63 case kVld2Location:
64 case kVld3Location:
65 case kVld4Location: {
66 const int32_t offset = label.GetImmediate();
67 os() << "[pc, #" << offset << "]";
68 PrintLiteral(type, offset);
69 return *this;
70 }
71 case kCodeLocation:
72 DisassemblerStream::operator<<(label);
73 // Improve the disassembly of branch to thunk jumping to pointer from thread entrypoint.
74 if (disasm_->GetIsT32() && GetCurrentInstructionType() == vixl::aarch32::kBl) {
75 const uintptr_t begin = reinterpret_cast<uintptr_t>(options_->base_address_);
76 const uintptr_t end = reinterpret_cast<uintptr_t>(options_->end_address_);
77 uintptr_t address = label.GetLocation() + (options_->absolute_addresses_ ? 0u : begin);
78 if ((address >= begin && address < end && end - address >= 4u) &&
79 reinterpret_cast<const uint16_t*>(address)[0] == 0xf8d9 && // LDR Rt, [tr, #imm12]
80 (reinterpret_cast<const uint16_t*>(address)[1] >> 12) == 0xf) { // Rt == PC
81 uint32_t imm12 = reinterpret_cast<const uint16_t*>(address)[1] & 0xfffu;
82 os() << " ; ";
83 options_->thread_offset_name_function_(os(), imm12);
84 }
85 }
86 return *this;
87 default:
88 return DisassemblerStream::operator<<(label);
89 }
90 }
91
operator <<(vixl::aarch32::Register reg)92 DisassemblerStream& operator<<(vixl::aarch32::Register reg) override {
93 if (reg.Is(tr)) {
94 os() << "tr";
95 return *this;
96 } else {
97 return DisassemblerStream::operator<<(reg);
98 }
99 }
100
operator <<(const MemOperand & operand)101 DisassemblerStream& operator<<(const MemOperand& operand) override {
102 // VIXL must use a PrintLabel object whenever the base register is PC;
103 // the following check verifies this invariant, and guards against bugs.
104 DCHECK(!operand.GetBaseRegister().Is(pc));
105 DisassemblerStream::operator<<(operand);
106
107 if (operand.GetBaseRegister().Is(tr) && operand.IsImmediate()) {
108 os() << " ; ";
109 options_->thread_offset_name_function_(os(), operand.GetOffsetImmediate());
110 }
111
112 return *this;
113 }
114
operator <<(const vixl::aarch32::AlignedMemOperand & operand)115 DisassemblerStream& operator<<(const vixl::aarch32::AlignedMemOperand& operand) override {
116 // VIXL must use a PrintLabel object whenever the base register is PC;
117 // the following check verifies this invariant, and guards against bugs.
118 DCHECK(!operand.GetBaseRegister().Is(pc));
119 return DisassemblerStream::operator<<(operand);
120 }
121
122 private:
123 void PrintLiteral(LocationType type, int32_t offset);
124
125 const CustomDisassembler* disasm_;
126 const DisassemblerOptions* options_;
127 };
128
129 public:
CustomDisassembler(std::ostream & os,const DisassemblerOptions * options)130 CustomDisassembler(std::ostream& os, const DisassemblerOptions* options)
131 : PrintDisassembler(&disassembler_stream_),
132 disassembler_stream_(os, this, options),
133 is_t32_(true) {}
134
PrintCodeAddress(uint32_t prog_ctr)135 void PrintCodeAddress(uint32_t prog_ctr) override {
136 os() << "0x" << std::hex << std::setw(8) << std::setfill('0') << prog_ctr << ": ";
137 }
138
SetIsT32(bool is_t32)139 void SetIsT32(bool is_t32) {
140 is_t32_ = is_t32;
141 }
142
GetIsT32() const143 bool GetIsT32() const {
144 return is_t32_;
145 }
146
147 private:
148 CustomDisassemblerStream disassembler_stream_;
149 // Whether T32 stream is decoded.
150 bool is_t32_;
151 };
152
PrintLiteral(LocationType type,int32_t offset)153 void DisassemblerArm::CustomDisassembler::CustomDisassemblerStream::PrintLiteral(LocationType type,
154 int32_t offset) {
155 // Literal offsets are not required to be aligned, so we may need unaligned access.
156 using unaligned_int16_t __attribute__((__aligned__(1))) = const int16_t;
157 using unaligned_uint16_t __attribute__((__aligned__(1))) = const uint16_t;
158 using unaligned_int32_t __attribute__((__aligned__(1))) = const int32_t;
159 using unaligned_int64_t __attribute__((__aligned__(1))) = const int64_t;
160 using unaligned_float __attribute__((__aligned__(1))) = const float;
161 using unaligned_double __attribute__((__aligned__(1))) = const double;
162
163 // Zeros are used for the LocationType values this function does not care about.
164 const size_t literal_size[kVst4Location + 1] = {
165 0, 0, 0, 0, sizeof(uint8_t), sizeof(unaligned_uint16_t), sizeof(unaligned_int32_t),
166 sizeof(unaligned_int64_t), sizeof(int8_t), sizeof(unaligned_int16_t),
167 sizeof(unaligned_float), sizeof(unaligned_double)};
168 const uintptr_t begin = reinterpret_cast<uintptr_t>(options_->base_address_);
169 const uintptr_t end = reinterpret_cast<uintptr_t>(options_->end_address_);
170 uintptr_t literal_addr =
171 RoundDown(disasm_->GetCodeAddress(), vixl::aarch32::kRegSizeInBytes) + offset;
172 literal_addr += disasm_->GetIsT32() ? vixl::aarch32::kT32PcDelta : vixl::aarch32::kA32PcDelta;
173
174 if (!options_->absolute_addresses_) {
175 literal_addr += begin;
176 }
177
178 os() << " ; ";
179
180 // Bail out if not within expected buffer range to avoid trying to fetch invalid literals
181 // (we can encounter them when interpreting raw data as instructions).
182 if (literal_addr < begin || literal_addr > end - literal_size[type]) {
183 os() << "(?)";
184 } else {
185 switch (type) {
186 case kLoadByteLocation:
187 os() << *reinterpret_cast<const uint8_t*>(literal_addr);
188 break;
189 case kLoadHalfWordLocation:
190 os() << *reinterpret_cast<unaligned_uint16_t*>(literal_addr);
191 break;
192 case kLoadWordLocation: {
193 const int32_t value = *reinterpret_cast<unaligned_int32_t*>(literal_addr);
194 os() << "0x" << std::hex << std::setw(8) << std::setfill('0') << value;
195 break;
196 }
197 case kLoadDoubleWordLocation: {
198 const int64_t value = *reinterpret_cast<unaligned_int64_t*>(literal_addr);
199 os() << "0x" << std::hex << std::setw(16) << std::setfill('0') << value;
200 break;
201 }
202 case kLoadSignedByteLocation:
203 os() << *reinterpret_cast<const int8_t*>(literal_addr);
204 break;
205 case kLoadSignedHalfWordLocation:
206 os() << *reinterpret_cast<unaligned_int16_t*>(literal_addr);
207 break;
208 case kLoadSinglePrecisionLocation:
209 os() << *reinterpret_cast<unaligned_float*>(literal_addr);
210 break;
211 case kLoadDoublePrecisionLocation:
212 os() << *reinterpret_cast<unaligned_double*>(literal_addr);
213 break;
214 default:
215 UNIMPLEMENTED(FATAL) << "Unexpected literal type: " << type;
216 }
217 }
218 }
219
DisassemblerArm(DisassemblerOptions * options)220 DisassemblerArm::DisassemblerArm(DisassemblerOptions* options)
221 : Disassembler(options), disasm_(std::make_unique<CustomDisassembler>(output_, options)) {}
222
Dump(std::ostream & os,const uint8_t * begin)223 size_t DisassemblerArm::Dump(std::ostream& os, const uint8_t* begin) {
224 uintptr_t next;
225 // Remove the Thumb specifier bit; no effect if begin does not point to T32 code.
226 const uintptr_t instr_ptr = reinterpret_cast<uintptr_t>(begin) & ~1;
227
228 const bool is_t32 = (reinterpret_cast<uintptr_t>(begin) & 1) != 0;
229 disasm_->SetCodeAddress(GetPc(instr_ptr));
230 disasm_->SetIsT32(is_t32);
231
232 if (is_t32) {
233 const uint16_t* const ip = reinterpret_cast<const uint16_t*>(instr_ptr);
234 const uint16_t* const end_address = reinterpret_cast<const uint16_t*>(
235 GetDisassemblerOptions()->end_address_);
236 next = reinterpret_cast<uintptr_t>(disasm_->DecodeT32At(ip, end_address));
237 } else {
238 const uint32_t* const ip = reinterpret_cast<const uint32_t*>(instr_ptr);
239 next = reinterpret_cast<uintptr_t>(disasm_->DecodeA32At(ip));
240 }
241
242 os << output_.str();
243 output_.str(std::string());
244 return next - instr_ptr;
245 }
246
Dump(std::ostream & os,const uint8_t * begin,const uint8_t * end)247 void DisassemblerArm::Dump(std::ostream& os, const uint8_t* begin, const uint8_t* end) {
248 DCHECK_LE(begin, end);
249
250 // Remove the Thumb specifier bit; no effect if begin does not point to T32 code.
251 const uintptr_t base = reinterpret_cast<uintptr_t>(begin) & ~1;
252
253 const bool is_t32 = (reinterpret_cast<uintptr_t>(begin) & 1) != 0;
254 disasm_->SetCodeAddress(GetPc(base));
255 disasm_->SetIsT32(is_t32);
256
257 if (is_t32) {
258 // The Thumb specifier bits cancel each other.
259 disasm_->DisassembleT32Buffer(reinterpret_cast<const uint16_t*>(base), end - begin);
260 } else {
261 disasm_->DisassembleA32Buffer(reinterpret_cast<const uint32_t*>(base), end - begin);
262 }
263
264 os << output_.str();
265 output_.str(std::string());
266 }
267
268 } // namespace arm
269 } // namespace art
270