1 /******************************************************************************* 2 * Copyright (C) 2018 Cadence Design Systems, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining 5 * a copy of this software and associated documentation files (the 6 * "Software"), to use this Software with Cadence processor cores only and 7 * not with any other processors and platforms, subject to 8 * the following conditions: 9 * 10 * The above copyright notice and this permission notice shall be included 11 * in all copies or substantial portions of the Software. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 15 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 16 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 17 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 18 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 19 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 20 21 ******************************************************************************/ 22 23 /******************************************************************************* 24 * xf-hal.h 25 * 26 * Platform-specific HAL definitions 27 * 28 *******************************************************************************/ 29 30 #ifndef __XF_H 31 #error "xf-hal.h mustn't be included directly" 32 #endif 33 34 /******************************************************************************* 35 * Includes 36 ******************************************************************************/ 37 38 /* ...primitive types */ 39 #include "xf-types.h" 40 41 /* ...XTOS runtime */ 42 #include <xtensa/xtruntime.h> 43 44 /******************************************************************************* 45 * Auxilliary macros definitions 46 ******************************************************************************/ 47 48 /* ...use system-specific cache-line size */ 49 #define XF_PROXY_ALIGNMENT XCHAL_DCACHE_LINESIZE 50 51 /* ...properly aligned shared memory structure */ 52 #define __xf_shmem__ __attribute__((__aligned__(XF_PROXY_ALIGNMENT))) 53 54 /******************************************************************************* 55 * Interrupt control 56 ******************************************************************************/ 57 58 /* ...disable interrupts on given core */ 59 static inline u32 xf_isr_disable(u32 core) 60 { 61 /* ...no actual dependency on the core identifier */ 62 return XTOS_SET_INTLEVEL(XCHAL_EXCM_LEVEL); 63 } 64 65 /* ...enable interrupts on given core */ 66 static inline void xf_isr_restore(u32 core, u32 status) 67 { 68 /* ...no actual dependency on the core identifier */ 69 XTOS_RESTORE_INTLEVEL(status); 70 } 71 72 /******************************************************************************* 73 * Auxiliary system-specific functions 74 ******************************************************************************/ 75 76 #if XF_CFG_CORES_NUM > 1 77 /* ...current core identifier (from HW) */ 78 static inline u32 xf_core_id(void) 79 { 80 /* ...retrieve core identifier from HAL */ 81 return (u32) xthal_get_prid(); 82 } 83 #else 84 #define xf_core_id() 0 85 #endif 86 87 /******************************************************************************* 88 * Atomic operations (atomicity is assured on local core only) 89 ******************************************************************************/ 90 91 static inline int xf_atomic_test_and_set(volatile u32 *bitmap, u32 mask) 92 { 93 u32 status; 94 u32 v; 95 96 /* ...atomicity is assured by interrupts masking */ 97 status = XTOS_DISABLE_ALL_INTERRUPTS; 98 v = *bitmap, *bitmap = v | mask; 99 XTOS_RESTORE_INTLEVEL(status); 100 101 return !(v & mask); 102 } 103 104 static inline int xf_atomic_test_and_clear(volatile u32 *bitmap, u32 mask) 105 { 106 u32 status; 107 u32 v; 108 109 /* ...atomicity is assured by interrupts masking */ 110 status = XTOS_DISABLE_ALL_INTERRUPTS; 111 v = *bitmap, *bitmap = v & ~mask; 112 XTOS_RESTORE_INTLEVEL(status); 113 114 return (v & mask); 115 } 116 117 static inline u32 xf_atomic_set(volatile u32 *bitmap, u32 mask) 118 { 119 u32 status; 120 u32 v; 121 122 /* ...atomicity is assured by interrupts masking */ 123 status = XTOS_DISABLE_ALL_INTERRUPTS; 124 v = *bitmap, *bitmap = (v |= mask); 125 XTOS_RESTORE_INTLEVEL(status); 126 127 return v; 128 } 129 130 static inline u32 xf_atomic_clear(volatile u32 *bitmap, u32 mask) 131 { 132 u32 status; 133 u32 v; 134 135 /* ...atomicity is assured by interrupts masking */ 136 status = XTOS_DISABLE_ALL_INTERRUPTS; 137 v = *bitmap, *bitmap = (v &= ~mask); 138 XTOS_RESTORE_INTLEVEL(status); 139 140 return v; 141 } 142 143 /******************************************************************************* 144 * Abortion macro (debugger should be configured) 145 ******************************************************************************/ 146 147 /* ...breakpoint function */ 148 extern void breakpoint(void); 149 150 /* ...abort execution (enter into debugger) */ 151 #define __xf_abort() breakpoint() 152