1 /* 2 * Copyright (C) 2017 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 public class Main { 18 assertIntEquals(int expected, int result)19 public static void assertIntEquals(int expected, int result) { 20 if (expected != result) { 21 throw new Error("Expected: " + expected + ", found: " + result); 22 } 23 } 24 25 /// CHECK-START-ARM64: void Main.checkIntCase(int[]) instruction_simplifier_arm64 (before) 26 /// CHECK-DAG: <<Array:l\d+>> ParameterValue 27 /// CHECK-DAG: <<Const5:i\d+>> IntConstant 5 28 /// CHECK-IF: hasIsaFeature("sve") and os.environ.get('ART_FORCE_TRY_PREDICATED_SIMD') == 'true' 29 // 30 /// CHECK-DAG: <<Repl:d\d+>> VecReplicateScalar [<<Const5>>,{{j\d+}}] 31 // -------------- Loop 32 /// CHECK-DAG: <<Index:i\d+>> Phi 33 /// CHECK-DAG: <<LoopP:j\d+>> VecPredWhile 34 /// CHECK-DAG: If 35 /// CHECK-DAG: <<Load:d\d+>> VecLoad [<<Array>>,<<Index>>,<<LoopP>>] 36 /// CHECK-DAG: <<Add:d\d+>> VecAdd [<<Load>>,<<Repl>>,<<LoopP>>] 37 /// CHECK-DAG: VecStore [<<Array>>,<<Index>>,<<Add>>,<<LoopP>>] 38 // 39 /// CHECK-ELSE: 40 // 41 /// CHECK-DAG: <<Repl:d\d+>> VecReplicateScalar [<<Const5>>] 42 // -------------- Loop 43 /// CHECK-DAG: <<Index:i\d+>> Phi 44 /// CHECK-DAG: If 45 /// CHECK-DAG: <<Load:d\d+>> VecLoad [<<Array>>,<<Index>>] 46 /// CHECK-DAG: <<Add:d\d+>> VecAdd [<<Load>>,<<Repl>>] 47 /// CHECK-DAG: VecStore [<<Array>>,<<Index>>,<<Add>>] 48 // 49 /// CHECK-FI: 50 51 /// CHECK-START-ARM64: void Main.checkIntCase(int[]) instruction_simplifier_arm64 (after) 52 /// CHECK-DAG: <<Array:l\d+>> ParameterValue 53 /// CHECK-DAG: <<Const5:i\d+>> IntConstant 5 54 /// CHECK-IF: hasIsaFeature("sve") and os.environ.get('ART_FORCE_TRY_PREDICATED_SIMD') == 'true' 55 // 56 // IntermediateAddressIndex is not supported for SVE. 57 /// CHECK-DAG: <<Repl:d\d+>> VecReplicateScalar [<<Const5>>,{{j\d+}}] 58 // -------------- Loop 59 /// CHECK-DAG: <<LoopP:j\d+>> VecPredWhile 60 /// CHECK-DAG: <<Index:i\d+>> Phi 61 /// CHECK-DAG: If 62 /// CHECK-DAG: <<IntAddr1:i\d+>> IntermediateAddress [<<Array>>,{{i\d+}}] 63 /// CHECK-DAG: <<Load:d\d+>> VecLoad [<<IntAddr1>>,<<Index>>,<<LoopP>>] 64 /// CHECK-DAG: <<Add:d\d+>> VecAdd [<<Load>>,<<Repl>>,<<LoopP>>] 65 /// CHECK-DAG: <<IntAddr2:i\d+>> IntermediateAddress [<<Array>>,{{i\d+}}] 66 /// CHECK-DAG: VecStore [<<IntAddr2>>,<<Index>>,<<Add>>,<<LoopP>>] 67 // 68 /// CHECK-ELSE: 69 // 70 /// CHECK-DAG: <<Const2:i\d+>> IntConstant 2 71 /// CHECK-DAG: <<DataOffset:i\d+>> IntConstant 12 72 /// CHECK-DAG: <<Repl:d\d+>> VecReplicateScalar [<<Const5>>] 73 // -------------- Loop 74 /// CHECK-DAG: <<Index:i\d+>> Phi 75 /// CHECK-DAG: If 76 /// CHECK-DAG: <<Address1:i\d+>> IntermediateAddressIndex [<<Index>>,<<DataOffset>>,<<Const2>>] 77 /// CHECK-DAG: <<Load:d\d+>> VecLoad [<<Array>>,<<Address1>>] 78 /// CHECK-DAG: <<Add:d\d+>> VecAdd [<<Load>>,<<Repl>>] 79 /// CHECK-DAG: <<Address2:i\d+>> IntermediateAddressIndex [<<Index>>,<<DataOffset>>,<<Const2>>] 80 /// CHECK-DAG: VecStore [<<Array>>,<<Address2>>,<<Add>>] 81 // 82 /// CHECK-FI: 83 84 /// CHECK-START-ARM64: void Main.checkIntCase(int[]) GVN$after_arch (after) 85 /// CHECK-DAG: <<Array:l\d+>> ParameterValue 86 /// CHECK-DAG: <<Const5:i\d+>> IntConstant 5 87 /// CHECK-IF: hasIsaFeature("sve") and os.environ.get('ART_FORCE_TRY_PREDICATED_SIMD') == 'true' 88 // 89 // IntermediateAddressIndex is not supported for SVE. 90 /// CHECK-DAG: <<Repl:d\d+>> VecReplicateScalar [<<Const5>>,{{j\d+}}] 91 // -------------- Loop 92 /// CHECK-DAG: <<LoopP:j\d+>> VecPredWhile 93 /// CHECK-DAG: <<Index:i\d+>> Phi 94 /// CHECK-DAG: If 95 /// CHECK-DAG: <<IntAddr:i\d+>> IntermediateAddress [<<Array>>,{{i\d+}}] 96 /// CHECK-DAG: <<Load:d\d+>> VecLoad [<<IntAddr>>,<<Index>>,<<LoopP>>] 97 /// CHECK-DAG: <<Add:d\d+>> VecAdd [<<Load>>,<<Repl>>,<<LoopP>>] 98 /// CHECK-DAG: VecStore [<<IntAddr>>,<<Index>>,<<Add>>,<<LoopP>>] 99 // 100 /// CHECK-ELSE: 101 // 102 /// CHECK-DAG: <<DataOffset:i\d+>> IntConstant 12 103 /// CHECK-DAG: <<Const2:i\d+>> IntConstant 2 104 /// CHECK-DAG: <<Repl:d\d+>> VecReplicateScalar [<<Const5>>] 105 // -------------- Loop 106 /// CHECK-DAG: <<Index:i\d+>> Phi 107 /// CHECK-DAG: If 108 /// CHECK-DAG: <<Address1:i\d+>> IntermediateAddressIndex [<<Index>>,<<DataOffset>>,<<Const2>>] 109 /// CHECK-DAG: <<Load:d\d+>> VecLoad [<<Array>>,<<Address1>>] 110 /// CHECK-DAG: <<Add:d\d+>> VecAdd [<<Load>>,<<Repl>>] 111 /// CHECK-NOT: IntermediateAddress 112 /// CHECK-DAG: VecStore [<<Array>>,<<Address1>>,<<Add>>] 113 // 114 /// CHECK-FI: 115 116 /// CHECK-START-ARM64: void Main.checkIntCase(int[]) disassembly (after) 117 /// CHECK-IF: hasIsaFeature("sve") and os.environ.get('ART_FORCE_TRY_PREDICATED_SIMD') == 'true' 118 // 119 // IntermediateAddressIndex is not supported for SVE. 120 /// CHECK-NOT: IntermediateAddressIndex 121 // 122 /// CHECK-ELSE: 123 // 124 /// CHECK: IntermediateAddressIndex 125 /// CHECK-NEXT: add w{{[0-9]+}}, w{{[0-9]+}}, w{{[0-9]+}}, lsl #2 126 // 127 /// CHECK-FI: checkIntCase(int[] a)128 public static void checkIntCase(int[] a) { 129 for (int i = 0; i < 128; i++) { 130 a[i] += 5; 131 } 132 } 133 134 /// CHECK-START-ARM64: void Main.checkByteCase(byte[]) instruction_simplifier_arm64 (before) 135 /// CHECK-DAG: <<Array:l\d+>> ParameterValue 136 /// CHECK-DAG: <<Const5:i\d+>> IntConstant 5 137 /// CHECK-IF: hasIsaFeature("sve") and os.environ.get('ART_FORCE_TRY_PREDICATED_SIMD') == 'true' 138 // 139 /// CHECK-DAG: <<Repl:d\d+>> VecReplicateScalar [<<Const5>>,{{j\d+}}] 140 // -------------- Loop 141 /// CHECK-DAG: <<LoopP:j\d+>> VecPredWhile 142 /// CHECK-DAG: <<Index:i\d+>> Phi 143 /// CHECK-DAG: If 144 /// CHECK-DAG: <<Load:d\d+>> VecLoad [<<Array>>,<<Index>>,<<LoopP>>] 145 /// CHECK-DAG: <<Add:d\d+>> VecAdd [<<Load>>,<<Repl>>,<<LoopP>>] 146 /// CHECK-DAG: VecStore [<<Array>>,<<Index>>,<<Add>>,<<LoopP>>] 147 // 148 /// CHECK-ELSE: 149 // 150 /// CHECK-DAG: <<Repl:d\d+>> VecReplicateScalar [<<Const5>>] 151 // -------------- Loop 152 /// CHECK-DAG: <<Index:i\d+>> Phi 153 /// CHECK-DAG: If 154 /// CHECK-DAG: <<Load:d\d+>> VecLoad [<<Array>>,<<Index>>] 155 /// CHECK-DAG: <<Add:d\d+>> VecAdd [<<Load>>,<<Repl>>] 156 157 // 158 /// CHECK-FI: 159 160 /// CHECK-START-ARM64: void Main.checkByteCase(byte[]) instruction_simplifier_arm64 (after) 161 /// CHECK-DAG: <<Array:l\d+>> ParameterValue 162 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0 163 /// CHECK-DAG: <<Const5:i\d+>> IntConstant 5 164 /// CHECK-IF: hasIsaFeature("sve") and os.environ.get('ART_FORCE_TRY_PREDICATED_SIMD') == 'true' 165 // 166 // IntermediateAddressIndex is not supported for SVE. 167 /// CHECK-DAG: <<Repl:d\d+>> VecReplicateScalar [<<Const5>>,{{j\d+}}] 168 // -------------- Loop 169 /// CHECK-DAG: <<LoopP:j\d+>> VecPredWhile 170 /// CHECK-DAG: <<Index:i\d+>> Phi 171 /// CHECK-DAG: If 172 /// CHECK-DAG: <<IntAddr1:i\d+>> IntermediateAddress [<<Array>>,{{i\d+}}] 173 /// CHECK-DAG: <<Load:d\d+>> VecLoad [<<IntAddr1>>,<<Index>>,<<LoopP>>] 174 /// CHECK-DAG: <<Add:d\d+>> VecAdd [<<Load>>,<<Repl>>,<<LoopP>>] 175 /// CHECK-DAG: <<IntAddr2:i\d+>> IntermediateAddress [<<Array>>,{{i\d+}}] 176 /// CHECK-DAG: VecStore [<<IntAddr2>>,<<Index>>,<<Add>>,<<LoopP>>] 177 // 178 /// CHECK-ELSE: 179 // 180 /// CHECK-DAG: <<DataOffset:i\d+>> IntConstant 12 181 /// CHECK-DAG: <<Repl:d\d+>> VecReplicateScalar [<<Const5>>] 182 // -------------- Loop 183 /// CHECK-DAG: <<Index:i\d+>> Phi 184 /// CHECK-DAG: If 185 /// CHECK-DAG: <<Address1:i\d+>> IntermediateAddressIndex [<<Index>>,<<DataOffset>>,<<Const0>>] 186 /// CHECK-DAG: <<Load:d\d+>> VecLoad [<<Array>>,<<Address1>>] 187 /// CHECK-DAG: <<Add:d\d+>> VecAdd [<<Load>>,<<Repl>>] 188 /// CHECK-DAG: <<Address2:i\d+>> IntermediateAddressIndex [<<Index>>,<<DataOffset>>,<<Const0>>] 189 /// CHECK-DAG: VecStore [<<Array>>,<<Address2>>,<<Add>>] 190 // 191 /// CHECK-FI: 192 193 /// CHECK-START-ARM64: void Main.checkByteCase(byte[]) GVN$after_arch (after) 194 /// CHECK-DAG: <<Array:l\d+>> ParameterValue 195 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0 196 /// CHECK-DAG: <<Const5:i\d+>> IntConstant 5 197 /// CHECK-IF: hasIsaFeature("sve") and os.environ.get('ART_FORCE_TRY_PREDICATED_SIMD') == 'true' 198 // 199 // IntermediateAddressIndex is not supported for SVE. 200 /// CHECK-DAG: <<Repl:d\d+>> VecReplicateScalar [<<Const5>>,{{j\d+}}] 201 // -------------- Loop 202 /// CHECK-DAG: <<LoopP:j\d+>> VecPredWhile 203 /// CHECK-DAG: <<Index:i\d+>> Phi 204 /// CHECK-DAG: If 205 /// CHECK-DAG: <<IntAddr:i\d+>> IntermediateAddress [<<Array>>,{{i\d+}}] 206 /// CHECK-DAG: <<Load:d\d+>> VecLoad [<<IntAddr>>,<<Index>>,<<LoopP>>] 207 /// CHECK-DAG: <<Add:d\d+>> VecAdd [<<Load>>,<<Repl>>,<<LoopP>>] 208 /// CHECK-DAG: VecStore [<<IntAddr>>,<<Index>>,<<Add>>,<<LoopP>>] 209 // 210 /// CHECK-ELSE: 211 // 212 /// CHECK-DAG: <<DataOffset:i\d+>> IntConstant 12 213 /// CHECK-DAG: <<Repl:d\d+>> VecReplicateScalar [<<Const5>>] 214 // -------------- Loop 215 /// CHECK-DAG: <<Index:i\d+>> Phi 216 /// CHECK-DAG: If 217 /// CHECK-DAG: <<Address1:i\d+>> IntermediateAddressIndex [<<Index>>,<<DataOffset>>,<<Const0>>] 218 /// CHECK-DAG: <<Load:d\d+>> VecLoad [<<Array>>,<<Address1>>] 219 /// CHECK-DAG: <<Add:d\d+>> VecAdd [<<Load>>,<<Repl>>] 220 /// CHECK-NOT: IntermediateAddress 221 /// CHECK-DAG: VecStore [<<Array>>,<<Address1>>,<<Add>>] 222 // 223 /// CHECK-FI: 224 225 /// CHECK-START-ARM64: void Main.checkByteCase(byte[]) disassembly (after) 226 /// CHECK-IF: hasIsaFeature("sve") and os.environ.get('ART_FORCE_TRY_PREDICATED_SIMD') == 'true' 227 // 228 // IntermediateAddressIndex is not supported for SVE. 229 /// CHECK-NOT: IntermediateAddressIndex 230 // 231 /// CHECK-ELSE: 232 // 233 /// CHECK: IntermediateAddressIndex 234 /// CHECK-NEXT: add w{{[0-9]+}}, w{{[0-9]+}}, #0x{{[0-9a-fA-F]+}} 235 /// CHECK: VecLoad 236 /// CHECK-NEXT: ldr q{{[0-9]+}}, [x{{[0-9]+}}, x{{[0-9]+}}] 237 /// CHECK: VecStore 238 /// CHECK-NEXT: str q{{[0-9]+}}, [x{{[0-9]+}}, x{{[0-9]+}}] 239 // 240 /// CHECK-FI: checkByteCase(byte[] a)241 public static void checkByteCase(byte[] a) { 242 for (int i = 0; i < 128; i++) { 243 a[i] += 5; 244 } 245 } 246 247 /// CHECK-START-ARM64: void Main.checkSingleAccess(int[]) instruction_simplifier_arm64 (before) 248 /// CHECK-DAG: <<Array:l\d+>> ParameterValue 249 /// CHECK-DAG: <<Const5:i\d+>> IntConstant 5 250 /// CHECK-IF: hasIsaFeature("sve") and os.environ.get('ART_FORCE_TRY_PREDICATED_SIMD') == 'true' 251 // 252 /// CHECK-DAG: <<Repl:d\d+>> VecReplicateScalar [<<Const5>>,{{j\d+}}] 253 // -------------- Loop 254 /// CHECK-DAG: <<Index:i\d+>> Phi 255 /// CHECK-DAG: <<LoopP:j\d+>> VecPredWhile 256 /// CHECK-DAG: If 257 /// CHECK-DAG: VecStore [<<Array>>,<<Index>>,<<Repl>>,<<LoopP>>] 258 // 259 /// CHECK-ELSE: 260 // 261 /// CHECK-DAG: <<Repl:d\d+>> VecReplicateScalar [<<Const5>>] 262 // -------------- Loop 263 /// CHECK-DAG: <<Index:i\d+>> Phi 264 /// CHECK-DAG: If 265 /// CHECK-DAG: VecStore [<<Array>>,<<Index>>,<<Repl>>] 266 // 267 /// CHECK-FI: 268 269 /// CHECK-START-ARM64: void Main.checkSingleAccess(int[]) instruction_simplifier_arm64 (after) 270 /// CHECK-DAG: <<Array:l\d+>> ParameterValue 271 /// CHECK-DAG: <<Const0:i\d+>> IntConstant 0 272 /// CHECK-DAG: <<Const5:i\d+>> IntConstant 5 273 /// CHECK-IF: hasIsaFeature("sve") and os.environ.get('ART_FORCE_TRY_PREDICATED_SIMD') == 'true' 274 // 275 /// CHECK-DAG: <<Repl:d\d+>> VecReplicateScalar [<<Const5>>,{{j\d+}}] 276 // -------------- Loop 277 /// CHECK-DAG: <<LoopP:j\d+>> VecPredWhile 278 /// CHECK-DAG: <<Index:i\d+>> Phi 279 /// CHECK-DAG: If 280 /// CHECK-DAG: <<IntAddr:i\d+>> IntermediateAddress [<<Array>>,{{i\d+}}] 281 /// CHECK-DAG: VecStore [<<IntAddr>>,<<Index>>,<<Repl>>,<<LoopP>>] 282 // 283 /// CHECK-ELSE: 284 // 285 /// CHECK-DAG: <<Repl:d\d+>> VecReplicateScalar [<<Const5>>] 286 // -------------- Loop 287 /// CHECK-DAG: <<Index:i\d+>> Phi 288 /// CHECK-DAG: If 289 /// CHECK-DAG: VecStore [<<Array>>,<<Index>>,<<Repl>>] 290 // 291 /// CHECK-FI: 292 // 293 /// CHECK-NOT: IntermediateAddress checkSingleAccess(int[] a)294 public static void checkSingleAccess(int[] a) { 295 for (int i = 0; i < 128; i++) { 296 a[i] = 5; 297 } 298 } 299 300 /// CHECK-START-ARM64: void Main.checkInt2Float(int[], float[]) instruction_simplifier_arm64 (before) 301 /// CHECK-DAG: <<Array1:l\d+>> ParameterValue 302 /// CHECK-DAG: <<Array2:l\d+>> ParameterValue 303 // -------------- Loop 304 /// CHECK-IF: hasIsaFeature("sve") and os.environ.get('ART_FORCE_TRY_PREDICATED_SIMD') == 'true' 305 // 306 /// CHECK-DAG: <<LoopP:j\d+>> VecPredWhile 307 /// CHECK-DAG: <<Index:i\d+>> Phi 308 /// CHECK-DAG: If 309 /// CHECK-DAG: <<Load:d\d+>> VecLoad [<<Array1>>,<<Index>>,<<LoopP>>] 310 /// CHECK-DAG: <<Cnv:d\d+>> VecCnv [<<Load>>,<<LoopP>>] 311 /// CHECK-DAG: VecStore [<<Array2>>,<<Index>>,<<Cnv>>,<<LoopP>>] 312 // 313 /// CHECK-ELSE: 314 // 315 /// CHECK-DAG: <<Index:i\d+>> Phi 316 /// CHECK-DAG: If 317 /// CHECK-DAG: <<Load:d\d+>> VecLoad [<<Array1>>,<<Index>>] 318 /// CHECK-DAG: <<Cnv:d\d+>> VecCnv [<<Load>>] 319 /// CHECK-DAG: VecStore [<<Array2>>,<<Index>>,<<Cnv>>] 320 // 321 /// CHECK-FI: 322 323 /// CHECK-START-ARM64: void Main.checkInt2Float(int[], float[]) instruction_simplifier_arm64 (after) 324 /// CHECK-DAG: <<Array1:l\d+>> ParameterValue 325 /// CHECK-DAG: <<Array2:l\d+>> ParameterValue 326 /// CHECK-IF: hasIsaFeature("sve") and os.environ.get('ART_FORCE_TRY_PREDICATED_SIMD') == 'true' 327 // 328 // IntermediateAddressIndex is not supported for SVE. 329 // -------------- Loop 330 /// CHECK-DAG: <<LoopP:j\d+>> VecPredWhile 331 /// CHECK-DAG: <<Index:i\d+>> Phi 332 /// CHECK-DAG: If 333 /// CHECK-DAG: <<IntAddr1:i\d+>> IntermediateAddress [<<Array1>>,{{i\d+}}] 334 /// CHECK-DAG: <<Load:d\d+>> VecLoad [<<IntAddr1>>,<<Index>>,<<LoopP>>] 335 /// CHECK-DAG: <<Cnv:d\d+>> VecCnv [<<Load>>,<<LoopP>>] 336 /// CHECK-DAG: <<IntAddr2:i\d+>> IntermediateAddress [<<Array2>>,{{i\d+}}] 337 /// CHECK-DAG: VecStore [<<IntAddr2>>,<<Index>>,<<Cnv>>,<<LoopP>>] 338 // 339 /// CHECK-ELSE: 340 // 341 /// CHECK-DAG: <<DataOffset:i\d+>> IntConstant 12 342 /// CHECK-DAG: <<Const2:i\d+>> IntConstant 2 343 // -------------- Loop 344 /// CHECK-DAG: <<Index:i\d+>> Phi 345 /// CHECK-DAG: If 346 /// CHECK-DAG: <<Address1:i\d+>> IntermediateAddressIndex [<<Index>>,<<DataOffset>>,<<Const2>>] 347 /// CHECK-DAG: <<Load:d\d+>> VecLoad [<<Array1>>,<<Address1>>] 348 /// CHECK-DAG: <<Cnv:d\d+>> VecCnv [<<Load>>] 349 /// CHECK-DAG: <<Address2:i\d+>> IntermediateAddressIndex [<<Index>>,<<DataOffset>>,<<Const2>>] 350 /// CHECK-DAG: VecStore [<<Array2>>,<<Address2>>,<<Cnv>>] 351 // 352 /// CHECK-FI: 353 354 /// CHECK-START-ARM64: void Main.checkInt2Float(int[], float[]) GVN$after_arch (after) 355 /// CHECK-DAG: <<Array1:l\d+>> ParameterValue 356 /// CHECK-DAG: <<Array2:l\d+>> ParameterValue 357 /// CHECK-IF: hasIsaFeature("sve") and os.environ.get('ART_FORCE_TRY_PREDICATED_SIMD') == 'true' 358 // 359 // IntermediateAddressIndex is not supported for SVE. 360 // -------------- Loop 361 /// CHECK-DAG: <<LoopP:j\d+>> VecPredWhile 362 /// CHECK-DAG: <<Index:i\d+>> Phi 363 /// CHECK-DAG: If 364 /// CHECK-DAG: <<IntAddr1:i\d+>> IntermediateAddress [<<Array1>>,{{i\d+}}] 365 /// CHECK-DAG: <<Load:d\d+>> VecLoad [<<IntAddr1>>,<<Index>>,<<LoopP>>] 366 /// CHECK-DAG: <<Cnv:d\d+>> VecCnv [<<Load>>,<<LoopP>>] 367 /// CHECK-DAG: <<IntAddr2:i\d+>> IntermediateAddress [<<Array2>>,{{i\d+}}] 368 /// CHECK-DAG: VecStore [<<IntAddr2>>,<<Index>>,<<Cnv>>,<<LoopP>>] 369 // 370 /// CHECK-ELSE: 371 // 372 /// CHECK-DAG: <<DataOffset:i\d+>> IntConstant 12 373 /// CHECK-DAG: <<Const2:i\d+>> IntConstant 2 374 // -------------- Loop 375 /// CHECK-DAG: <<Index:i\d+>> Phi 376 /// CHECK-DAG: If 377 /// CHECK-DAG: <<Address1:i\d+>> IntermediateAddressIndex [<<Index>>,<<DataOffset>>,<<Const2>>] 378 /// CHECK-DAG: <<Load:d\d+>> VecLoad [<<Array1>>,<<Address1>>] 379 /// CHECK-DAG: <<Cnv:d\d+>> VecCnv [<<Load>>] 380 /// CHECK-NOT: IntermediateAddress 381 /// CHECK-DAG: VecStore [<<Array2>>,<<Address1>>,<<Cnv>>] 382 // 383 /// CHECK-FI: 384 385 /// CHECK-START-ARM64: void Main.checkInt2Float(int[], float[]) disassembly (after) 386 /// CHECK-IF: hasIsaFeature("sve") and os.environ.get('ART_FORCE_TRY_PREDICATED_SIMD') == 'true' 387 // 388 // IntermediateAddressIndex is not supported for SVE. 389 /// CHECK-NOT: IntermediateAddressIndex 390 // 391 /// CHECK-ELSE: 392 // 393 /// CHECK: IntermediateAddressIndex 394 /// CHECK-NEXT: add w{{[0-9]+}}, w{{[0-9]+}}, w{{[0-9]+}}, lsl #2 395 // 396 /// CHECK-FI: checkInt2Float(int[] a, float[] b)397 public static void checkInt2Float(int[] a, float[] b) { 398 for (int i = 0; i < 128; i++) { 399 b[i] = (float) a[i]; 400 } 401 } 402 403 public static final int ARRAY_SIZE = 1024; 404 calcArraySum(int[] a, byte[] b, float[] c)405 public static int calcArraySum(int[] a, byte[] b, float[] c) { 406 int sum = 0; 407 for (int i = 0; i < 128; i++) { 408 sum += a[i] + b[i] + (int) c[i]; 409 } 410 return sum; 411 } 412 main(String[] args)413 public static void main(String[] args) { 414 byte[] ba = new byte[ARRAY_SIZE]; 415 int[] ia = new int[ARRAY_SIZE]; 416 float[] fa = new float[ARRAY_SIZE]; 417 418 checkSingleAccess(ia); 419 checkIntCase(ia); 420 checkByteCase(ba); 421 checkInt2Float(ia, fa); 422 423 assertIntEquals(3200, calcArraySum(ia, ba, fa)); 424 } 425 } 426