1 /* 2 * This file is auto-generated. Modifications will be lost. 3 * 4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/ 5 * for more information. 6 */ 7 #ifndef _DRM_MODE_H 8 #define _DRM_MODE_H 9 #include "drm.h" 10 #ifdef __cplusplus 11 extern "C" { 12 #endif 13 #define DRM_CONNECTOR_NAME_LEN 32 14 #define DRM_DISPLAY_MODE_LEN 32 15 #define DRM_PROP_NAME_LEN 32 16 #define DRM_MODE_TYPE_BUILTIN (1 << 0) 17 #define DRM_MODE_TYPE_CLOCK_C ((1 << 1) | DRM_MODE_TYPE_BUILTIN) 18 #define DRM_MODE_TYPE_CRTC_C ((1 << 2) | DRM_MODE_TYPE_BUILTIN) 19 #define DRM_MODE_TYPE_PREFERRED (1 << 3) 20 #define DRM_MODE_TYPE_DEFAULT (1 << 4) 21 #define DRM_MODE_TYPE_USERDEF (1 << 5) 22 #define DRM_MODE_TYPE_DRIVER (1 << 6) 23 #define DRM_MODE_TYPE_ALL (DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_USERDEF | DRM_MODE_TYPE_DRIVER) 24 #define DRM_MODE_FLAG_PHSYNC (1 << 0) 25 #define DRM_MODE_FLAG_NHSYNC (1 << 1) 26 #define DRM_MODE_FLAG_PVSYNC (1 << 2) 27 #define DRM_MODE_FLAG_NVSYNC (1 << 3) 28 #define DRM_MODE_FLAG_INTERLACE (1 << 4) 29 #define DRM_MODE_FLAG_DBLSCAN (1 << 5) 30 #define DRM_MODE_FLAG_CSYNC (1 << 6) 31 #define DRM_MODE_FLAG_PCSYNC (1 << 7) 32 #define DRM_MODE_FLAG_NCSYNC (1 << 8) 33 #define DRM_MODE_FLAG_HSKEW (1 << 9) 34 #define DRM_MODE_FLAG_BCAST (1 << 10) 35 #define DRM_MODE_FLAG_PIXMUX (1 << 11) 36 #define DRM_MODE_FLAG_DBLCLK (1 << 12) 37 #define DRM_MODE_FLAG_CLKDIV2 (1 << 13) 38 #define DRM_MODE_FLAG_3D_MASK (0x1f << 14) 39 #define DRM_MODE_FLAG_3D_NONE (0 << 14) 40 #define DRM_MODE_FLAG_3D_FRAME_PACKING (1 << 14) 41 #define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2 << 14) 42 #define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3 << 14) 43 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4 << 14) 44 #define DRM_MODE_FLAG_3D_L_DEPTH (5 << 14) 45 #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6 << 14) 46 #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7 << 14) 47 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8 << 14) 48 #define DRM_MODE_PICTURE_ASPECT_NONE 0 49 #define DRM_MODE_PICTURE_ASPECT_4_3 1 50 #define DRM_MODE_PICTURE_ASPECT_16_9 2 51 #define DRM_MODE_PICTURE_ASPECT_64_27 3 52 #define DRM_MODE_PICTURE_ASPECT_256_135 4 53 #define DRM_MODE_CONTENT_TYPE_NO_DATA 0 54 #define DRM_MODE_CONTENT_TYPE_GRAPHICS 1 55 #define DRM_MODE_CONTENT_TYPE_PHOTO 2 56 #define DRM_MODE_CONTENT_TYPE_CINEMA 3 57 #define DRM_MODE_CONTENT_TYPE_GAME 4 58 #define DRM_MODE_FLAG_PIC_AR_MASK (0x0F << 19) 59 #define DRM_MODE_FLAG_PIC_AR_NONE (DRM_MODE_PICTURE_ASPECT_NONE << 19) 60 #define DRM_MODE_FLAG_PIC_AR_4_3 (DRM_MODE_PICTURE_ASPECT_4_3 << 19) 61 #define DRM_MODE_FLAG_PIC_AR_16_9 (DRM_MODE_PICTURE_ASPECT_16_9 << 19) 62 #define DRM_MODE_FLAG_PIC_AR_64_27 (DRM_MODE_PICTURE_ASPECT_64_27 << 19) 63 #define DRM_MODE_FLAG_PIC_AR_256_135 (DRM_MODE_PICTURE_ASPECT_256_135 << 19) 64 #define DRM_MODE_FLAG_ALL (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_PCSYNC | DRM_MODE_FLAG_NCSYNC | DRM_MODE_FLAG_HSKEW | DRM_MODE_FLAG_DBLCLK | DRM_MODE_FLAG_CLKDIV2 | DRM_MODE_FLAG_3D_MASK) 65 #define DRM_MODE_DPMS_ON 0 66 #define DRM_MODE_DPMS_STANDBY 1 67 #define DRM_MODE_DPMS_SUSPEND 2 68 #define DRM_MODE_DPMS_OFF 3 69 #define DRM_MODE_SCALE_NONE 0 70 #define DRM_MODE_SCALE_FULLSCREEN 1 71 #define DRM_MODE_SCALE_CENTER 2 72 #define DRM_MODE_SCALE_ASPECT 3 73 #define DRM_MODE_DITHERING_OFF 0 74 #define DRM_MODE_DITHERING_ON 1 75 #define DRM_MODE_DITHERING_AUTO 2 76 #define DRM_MODE_DIRTY_OFF 0 77 #define DRM_MODE_DIRTY_ON 1 78 #define DRM_MODE_DIRTY_ANNOTATE 2 79 #define DRM_MODE_LINK_STATUS_GOOD 0 80 #define DRM_MODE_LINK_STATUS_BAD 1 81 #define DRM_MODE_ROTATE_0 (1 << 0) 82 #define DRM_MODE_ROTATE_90 (1 << 1) 83 #define DRM_MODE_ROTATE_180 (1 << 2) 84 #define DRM_MODE_ROTATE_270 (1 << 3) 85 #define DRM_MODE_ROTATE_MASK (DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_180 | DRM_MODE_ROTATE_270) 86 #define DRM_MODE_REFLECT_X (1 << 4) 87 #define DRM_MODE_REFLECT_Y (1 << 5) 88 #define DRM_MODE_REFLECT_MASK (DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y) 89 #define DRM_MODE_CONTENT_PROTECTION_UNDESIRED 0 90 #define DRM_MODE_CONTENT_PROTECTION_DESIRED 1 91 #define DRM_MODE_CONTENT_PROTECTION_ENABLED 2 92 struct drm_mode_modeinfo { 93 __u32 clock; 94 __u16 hdisplay; 95 __u16 hsync_start; 96 __u16 hsync_end; 97 __u16 htotal; 98 __u16 hskew; 99 __u16 vdisplay; 100 __u16 vsync_start; 101 __u16 vsync_end; 102 __u16 vtotal; 103 __u16 vscan; 104 __u32 vrefresh; 105 __u32 flags; 106 __u32 type; 107 char name[DRM_DISPLAY_MODE_LEN]; 108 }; 109 struct drm_mode_card_res { 110 __u64 fb_id_ptr; 111 __u64 crtc_id_ptr; 112 __u64 connector_id_ptr; 113 __u64 encoder_id_ptr; 114 __u32 count_fbs; 115 __u32 count_crtcs; 116 __u32 count_connectors; 117 __u32 count_encoders; 118 __u32 min_width; 119 __u32 max_width; 120 __u32 min_height; 121 __u32 max_height; 122 }; 123 struct drm_mode_crtc { 124 __u64 set_connectors_ptr; 125 __u32 count_connectors; 126 __u32 crtc_id; 127 __u32 fb_id; 128 __u32 x; 129 __u32 y; 130 __u32 gamma_size; 131 __u32 mode_valid; 132 struct drm_mode_modeinfo mode; 133 }; 134 #define DRM_MODE_PRESENT_TOP_FIELD (1 << 0) 135 #define DRM_MODE_PRESENT_BOTTOM_FIELD (1 << 1) 136 struct drm_mode_set_plane { 137 __u32 plane_id; 138 __u32 crtc_id; 139 __u32 fb_id; 140 __u32 flags; 141 __s32 crtc_x; 142 __s32 crtc_y; 143 __u32 crtc_w; 144 __u32 crtc_h; 145 __u32 src_x; 146 __u32 src_y; 147 __u32 src_h; 148 __u32 src_w; 149 }; 150 struct drm_mode_get_plane { 151 __u32 plane_id; 152 __u32 crtc_id; 153 __u32 fb_id; 154 __u32 possible_crtcs; 155 __u32 gamma_size; 156 __u32 count_format_types; 157 __u64 format_type_ptr; 158 }; 159 struct drm_mode_get_plane_res { 160 __u64 plane_id_ptr; 161 __u32 count_planes; 162 }; 163 #define DRM_MODE_ENCODER_NONE 0 164 #define DRM_MODE_ENCODER_DAC 1 165 #define DRM_MODE_ENCODER_TMDS 2 166 #define DRM_MODE_ENCODER_LVDS 3 167 #define DRM_MODE_ENCODER_TVDAC 4 168 #define DRM_MODE_ENCODER_VIRTUAL 5 169 #define DRM_MODE_ENCODER_DSI 6 170 #define DRM_MODE_ENCODER_DPMST 7 171 #define DRM_MODE_ENCODER_DPI 8 172 struct drm_mode_get_encoder { 173 __u32 encoder_id; 174 __u32 encoder_type; 175 __u32 crtc_id; 176 __u32 possible_crtcs; 177 __u32 possible_clones; 178 }; 179 enum drm_mode_subconnector { 180 DRM_MODE_SUBCONNECTOR_Automatic = 0, 181 DRM_MODE_SUBCONNECTOR_Unknown = 0, 182 DRM_MODE_SUBCONNECTOR_VGA = 1, 183 DRM_MODE_SUBCONNECTOR_DVID = 3, 184 DRM_MODE_SUBCONNECTOR_DVIA = 4, 185 DRM_MODE_SUBCONNECTOR_Composite = 5, 186 DRM_MODE_SUBCONNECTOR_SVIDEO = 6, 187 DRM_MODE_SUBCONNECTOR_Component = 8, 188 DRM_MODE_SUBCONNECTOR_SCART = 9, 189 DRM_MODE_SUBCONNECTOR_DisplayPort = 10, 190 DRM_MODE_SUBCONNECTOR_HDMIA = 11, 191 DRM_MODE_SUBCONNECTOR_Native = 15, 192 DRM_MODE_SUBCONNECTOR_Wireless = 18, 193 }; 194 #define DRM_MODE_CONNECTOR_Unknown 0 195 #define DRM_MODE_CONNECTOR_VGA 1 196 #define DRM_MODE_CONNECTOR_DVII 2 197 #define DRM_MODE_CONNECTOR_DVID 3 198 #define DRM_MODE_CONNECTOR_DVIA 4 199 #define DRM_MODE_CONNECTOR_Composite 5 200 #define DRM_MODE_CONNECTOR_SVIDEO 6 201 #define DRM_MODE_CONNECTOR_LVDS 7 202 #define DRM_MODE_CONNECTOR_Component 8 203 #define DRM_MODE_CONNECTOR_9PinDIN 9 204 #define DRM_MODE_CONNECTOR_DisplayPort 10 205 #define DRM_MODE_CONNECTOR_HDMIA 11 206 #define DRM_MODE_CONNECTOR_HDMIB 12 207 #define DRM_MODE_CONNECTOR_TV 13 208 #define DRM_MODE_CONNECTOR_eDP 14 209 #define DRM_MODE_CONNECTOR_VIRTUAL 15 210 #define DRM_MODE_CONNECTOR_DSI 16 211 #define DRM_MODE_CONNECTOR_DPI 17 212 #define DRM_MODE_CONNECTOR_WRITEBACK 18 213 #define DRM_MODE_CONNECTOR_SPI 19 214 #define DRM_MODE_CONNECTOR_USB 20 215 struct drm_mode_get_connector { 216 __u64 encoders_ptr; 217 __u64 modes_ptr; 218 __u64 props_ptr; 219 __u64 prop_values_ptr; 220 __u32 count_modes; 221 __u32 count_props; 222 __u32 count_encoders; 223 __u32 encoder_id; 224 __u32 connector_id; 225 __u32 connector_type; 226 __u32 connector_type_id; 227 __u32 connection; 228 __u32 mm_width; 229 __u32 mm_height; 230 __u32 subpixel; 231 __u32 pad; 232 }; 233 #define DRM_MODE_PROP_PENDING (1 << 0) 234 #define DRM_MODE_PROP_RANGE (1 << 1) 235 #define DRM_MODE_PROP_IMMUTABLE (1 << 2) 236 #define DRM_MODE_PROP_ENUM (1 << 3) 237 #define DRM_MODE_PROP_BLOB (1 << 4) 238 #define DRM_MODE_PROP_BITMASK (1 << 5) 239 #define DRM_MODE_PROP_LEGACY_TYPE (DRM_MODE_PROP_RANGE | DRM_MODE_PROP_ENUM | DRM_MODE_PROP_BLOB | DRM_MODE_PROP_BITMASK) 240 #define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0 241 #define DRM_MODE_PROP_TYPE(n) ((n) << 6) 242 #define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1) 243 #define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2) 244 #define DRM_MODE_PROP_ATOMIC 0x80000000 245 struct drm_mode_property_enum { 246 __u64 value; 247 char name[DRM_PROP_NAME_LEN]; 248 }; 249 struct drm_mode_get_property { 250 __u64 values_ptr; 251 __u64 enum_blob_ptr; 252 __u32 prop_id; 253 __u32 flags; 254 char name[DRM_PROP_NAME_LEN]; 255 __u32 count_values; 256 __u32 count_enum_blobs; 257 }; 258 struct drm_mode_connector_set_property { 259 __u64 value; 260 __u32 prop_id; 261 __u32 connector_id; 262 }; 263 #define DRM_MODE_OBJECT_CRTC 0xcccccccc 264 #define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0 265 #define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0 266 #define DRM_MODE_OBJECT_MODE 0xdededede 267 #define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0 268 #define DRM_MODE_OBJECT_FB 0xfbfbfbfb 269 #define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb 270 #define DRM_MODE_OBJECT_PLANE 0xeeeeeeee 271 #define DRM_MODE_OBJECT_ANY 0 272 struct drm_mode_obj_get_properties { 273 __u64 props_ptr; 274 __u64 prop_values_ptr; 275 __u32 count_props; 276 __u32 obj_id; 277 __u32 obj_type; 278 }; 279 struct drm_mode_obj_set_property { 280 __u64 value; 281 __u32 prop_id; 282 __u32 obj_id; 283 __u32 obj_type; 284 }; 285 struct drm_mode_get_blob { 286 __u32 blob_id; 287 __u32 length; 288 __u64 data; 289 }; 290 struct drm_mode_fb_cmd { 291 __u32 fb_id; 292 __u32 width; 293 __u32 height; 294 __u32 pitch; 295 __u32 bpp; 296 __u32 depth; 297 __u32 handle; 298 }; 299 #define DRM_MODE_FB_INTERLACED (1 << 0) 300 #define DRM_MODE_FB_MODIFIERS (1 << 1) 301 struct drm_mode_fb_cmd2 { 302 __u32 fb_id; 303 __u32 width; 304 __u32 height; 305 __u32 pixel_format; 306 __u32 flags; 307 __u32 handles[4]; 308 __u32 pitches[4]; 309 __u32 offsets[4]; 310 __u64 modifier[4]; 311 }; 312 #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01 313 #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02 314 #define DRM_MODE_FB_DIRTY_FLAGS 0x03 315 #define DRM_MODE_FB_DIRTY_MAX_CLIPS 256 316 struct drm_mode_fb_dirty_cmd { 317 __u32 fb_id; 318 __u32 flags; 319 __u32 color; 320 __u32 num_clips; 321 __u64 clips_ptr; 322 }; 323 struct drm_mode_mode_cmd { 324 __u32 connector_id; 325 struct drm_mode_modeinfo mode; 326 }; 327 #define DRM_MODE_CURSOR_BO 0x01 328 #define DRM_MODE_CURSOR_MOVE 0x02 329 #define DRM_MODE_CURSOR_FLAGS 0x03 330 struct drm_mode_cursor { 331 __u32 flags; 332 __u32 crtc_id; 333 __s32 x; 334 __s32 y; 335 __u32 width; 336 __u32 height; 337 __u32 handle; 338 }; 339 struct drm_mode_cursor2 { 340 __u32 flags; 341 __u32 crtc_id; 342 __s32 x; 343 __s32 y; 344 __u32 width; 345 __u32 height; 346 __u32 handle; 347 __s32 hot_x; 348 __s32 hot_y; 349 }; 350 struct drm_mode_crtc_lut { 351 __u32 crtc_id; 352 __u32 gamma_size; 353 __u64 red; 354 __u64 green; 355 __u64 blue; 356 }; 357 struct drm_color_ctm { 358 __u64 matrix[9]; 359 }; 360 struct drm_color_ctm_3x4 { 361 __u64 matrix[12]; 362 }; 363 struct drm_color_lut { 364 __u16 red; 365 __u16 green; 366 __u16 blue; 367 __u16 reserved; 368 }; 369 struct hdr_metadata_infoframe { 370 __u8 eotf; 371 __u8 metadata_type; 372 struct { 373 __u16 x, y; 374 } display_primaries[3]; 375 struct { 376 __u16 x, y; 377 } white_point; 378 __u16 max_display_mastering_luminance; 379 __u16 min_display_mastering_luminance; 380 __u16 max_cll; 381 __u16 max_fall; 382 }; 383 struct hdr_output_metadata { 384 __u32 metadata_type; 385 union { 386 struct hdr_metadata_infoframe hdmi_metadata_type1; 387 }; 388 }; 389 #define DRM_MODE_PAGE_FLIP_EVENT 0x01 390 #define DRM_MODE_PAGE_FLIP_ASYNC 0x02 391 #define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4 392 #define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8 393 #define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | DRM_MODE_PAGE_FLIP_TARGET_RELATIVE) 394 #define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | DRM_MODE_PAGE_FLIP_ASYNC | DRM_MODE_PAGE_FLIP_TARGET) 395 struct drm_mode_crtc_page_flip { 396 __u32 crtc_id; 397 __u32 fb_id; 398 __u32 flags; 399 __u32 reserved; 400 __u64 user_data; 401 }; 402 struct drm_mode_crtc_page_flip_target { 403 __u32 crtc_id; 404 __u32 fb_id; 405 __u32 flags; 406 __u32 sequence; 407 __u64 user_data; 408 }; 409 struct drm_mode_create_dumb { 410 __u32 height; 411 __u32 width; 412 __u32 bpp; 413 __u32 flags; 414 __u32 handle; 415 __u32 pitch; 416 __u64 size; 417 }; 418 struct drm_mode_map_dumb { 419 __u32 handle; 420 __u32 pad; 421 __u64 offset; 422 }; 423 struct drm_mode_destroy_dumb { 424 __u32 handle; 425 }; 426 #define DRM_MODE_ATOMIC_TEST_ONLY 0x0100 427 #define DRM_MODE_ATOMIC_NONBLOCK 0x0200 428 #define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400 429 #define DRM_MODE_ATOMIC_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | DRM_MODE_PAGE_FLIP_ASYNC | DRM_MODE_ATOMIC_TEST_ONLY | DRM_MODE_ATOMIC_NONBLOCK | DRM_MODE_ATOMIC_ALLOW_MODESET) 430 struct drm_mode_atomic { 431 __u32 flags; 432 __u32 count_objs; 433 __u64 objs_ptr; 434 __u64 count_props_ptr; 435 __u64 props_ptr; 436 __u64 prop_values_ptr; 437 __u64 reserved; 438 __u64 user_data; 439 }; 440 struct drm_format_modifier_blob { 441 #define FORMAT_BLOB_CURRENT 1 442 __u32 version; 443 __u32 flags; 444 __u32 count_formats; 445 __u32 formats_offset; 446 __u32 count_modifiers; 447 __u32 modifiers_offset; 448 }; 449 struct drm_format_modifier { 450 __u64 formats; 451 __u32 offset; 452 __u32 pad; 453 __u64 modifier; 454 }; 455 struct drm_mode_create_blob { 456 __u64 data; 457 __u32 length; 458 __u32 blob_id; 459 }; 460 struct drm_mode_destroy_blob { 461 __u32 blob_id; 462 }; 463 struct drm_mode_create_lease { 464 __u64 object_ids; 465 __u32 object_count; 466 __u32 flags; 467 __u32 lessee_id; 468 __u32 fd; 469 }; 470 struct drm_mode_list_lessees { 471 __u32 count_lessees; 472 __u32 pad; 473 __u64 lessees_ptr; 474 }; 475 struct drm_mode_get_lease { 476 __u32 count_objects; 477 __u32 pad; 478 __u64 objects_ptr; 479 }; 480 struct drm_mode_revoke_lease { 481 __u32 lessee_id; 482 }; 483 struct drm_mode_rect { 484 __s32 x1; 485 __s32 y1; 486 __s32 x2; 487 __s32 y2; 488 }; 489 struct drm_mode_closefb { 490 __u32 fb_id; 491 __u32 pad; 492 }; 493 #ifdef __cplusplus 494 } 495 #endif 496 #endif 497