1 /* 2 * This file is auto-generated. Modifications will be lost. 3 * 4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/ 5 * for more information. 6 */ 7 #ifndef _UAPI__SOUND_ASOUND_H 8 #define _UAPI__SOUND_ASOUND_H 9 #ifdef __linux__ 10 #include <linux/types.h> 11 #include <asm/byteorder.h> 12 #else 13 #include <endian.h> 14 #include <sys/ioctl.h> 15 #endif 16 #include <stdlib.h> 17 #include <time.h> 18 #define SNDRV_PROTOCOL_VERSION(major,minor,subminor) (((major) << 16) | ((minor) << 8) | (subminor)) 19 #define SNDRV_PROTOCOL_MAJOR(version) (((version) >> 16) & 0xffff) 20 #define SNDRV_PROTOCOL_MINOR(version) (((version) >> 8) & 0xff) 21 #define SNDRV_PROTOCOL_MICRO(version) ((version) & 0xff) 22 #define SNDRV_PROTOCOL_INCOMPATIBLE(kversion,uversion) (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion))) 23 #define AES_IEC958_STATUS_SIZE 24 24 struct snd_aes_iec958 { 25 unsigned char status[AES_IEC958_STATUS_SIZE]; 26 unsigned char subcode[147]; 27 unsigned char pad; 28 unsigned char dig_subframe[4]; 29 }; 30 struct snd_cea_861_aud_if { 31 unsigned char db1_ct_cc; 32 unsigned char db2_sf_ss; 33 unsigned char db3; 34 unsigned char db4_ca; 35 unsigned char db5_dminh_lsv; 36 }; 37 #define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1) 38 enum { 39 SNDRV_HWDEP_IFACE_OPL2 = 0, 40 SNDRV_HWDEP_IFACE_OPL3, 41 SNDRV_HWDEP_IFACE_OPL4, 42 SNDRV_HWDEP_IFACE_SB16CSP, 43 SNDRV_HWDEP_IFACE_EMU10K1, 44 SNDRV_HWDEP_IFACE_YSS225, 45 SNDRV_HWDEP_IFACE_ICS2115, 46 SNDRV_HWDEP_IFACE_SSCAPE, 47 SNDRV_HWDEP_IFACE_VX, 48 SNDRV_HWDEP_IFACE_MIXART, 49 SNDRV_HWDEP_IFACE_USX2Y, 50 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, 51 SNDRV_HWDEP_IFACE_BLUETOOTH, 52 SNDRV_HWDEP_IFACE_USX2Y_PCM, 53 SNDRV_HWDEP_IFACE_PCXHR, 54 SNDRV_HWDEP_IFACE_SB_RC, 55 SNDRV_HWDEP_IFACE_HDA, 56 SNDRV_HWDEP_IFACE_USB_STREAM, 57 SNDRV_HWDEP_IFACE_FW_DICE, 58 SNDRV_HWDEP_IFACE_FW_FIREWORKS, 59 SNDRV_HWDEP_IFACE_FW_BEBOB, 60 SNDRV_HWDEP_IFACE_FW_OXFW, 61 SNDRV_HWDEP_IFACE_FW_DIGI00X, 62 SNDRV_HWDEP_IFACE_FW_TASCAM, 63 SNDRV_HWDEP_IFACE_LINE6, 64 SNDRV_HWDEP_IFACE_FW_MOTU, 65 SNDRV_HWDEP_IFACE_FW_FIREFACE, 66 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_FIREFACE 67 }; 68 struct snd_hwdep_info { 69 unsigned int device; 70 int card; 71 unsigned char id[64]; 72 unsigned char name[80]; 73 int iface; 74 unsigned char reserved[64]; 75 }; 76 struct snd_hwdep_dsp_status { 77 unsigned int version; 78 unsigned char id[32]; 79 unsigned int num_dsps; 80 unsigned int dsp_loaded; 81 unsigned int chip_ready; 82 unsigned char reserved[16]; 83 }; 84 struct snd_hwdep_dsp_image { 85 unsigned int index; 86 unsigned char name[64]; 87 unsigned char * image; 88 size_t length; 89 unsigned long driver_data; 90 }; 91 #define SNDRV_HWDEP_IOCTL_PVERSION _IOR('H', 0x00, int) 92 #define SNDRV_HWDEP_IOCTL_INFO _IOR('H', 0x01, struct snd_hwdep_info) 93 #define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status) 94 #define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image) 95 #define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 17) 96 typedef unsigned long snd_pcm_uframes_t; 97 typedef signed long snd_pcm_sframes_t; 98 enum { 99 SNDRV_PCM_CLASS_GENERIC = 0, 100 SNDRV_PCM_CLASS_MULTI, 101 SNDRV_PCM_CLASS_MODEM, 102 SNDRV_PCM_CLASS_DIGITIZER, 103 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER, 104 }; 105 enum { 106 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, 107 SNDRV_PCM_SUBCLASS_MULTI_MIX, 108 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX, 109 }; 110 enum { 111 SNDRV_PCM_STREAM_PLAYBACK = 0, 112 SNDRV_PCM_STREAM_CAPTURE, 113 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE, 114 }; 115 typedef int __bitwise snd_pcm_access_t; 116 #define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED (( snd_pcm_access_t) 0) 117 #define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED (( snd_pcm_access_t) 1) 118 #define SNDRV_PCM_ACCESS_MMAP_COMPLEX (( snd_pcm_access_t) 2) 119 #define SNDRV_PCM_ACCESS_RW_INTERLEAVED (( snd_pcm_access_t) 3) 120 #define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED (( snd_pcm_access_t) 4) 121 #define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED 122 typedef int __bitwise snd_pcm_format_t; 123 #define SNDRV_PCM_FORMAT_S8 (( snd_pcm_format_t) 0) 124 #define SNDRV_PCM_FORMAT_U8 (( snd_pcm_format_t) 1) 125 #define SNDRV_PCM_FORMAT_S16_LE (( snd_pcm_format_t) 2) 126 #define SNDRV_PCM_FORMAT_S16_BE (( snd_pcm_format_t) 3) 127 #define SNDRV_PCM_FORMAT_U16_LE (( snd_pcm_format_t) 4) 128 #define SNDRV_PCM_FORMAT_U16_BE (( snd_pcm_format_t) 5) 129 #define SNDRV_PCM_FORMAT_S24_LE (( snd_pcm_format_t) 6) 130 #define SNDRV_PCM_FORMAT_S24_BE (( snd_pcm_format_t) 7) 131 #define SNDRV_PCM_FORMAT_U24_LE (( snd_pcm_format_t) 8) 132 #define SNDRV_PCM_FORMAT_U24_BE (( snd_pcm_format_t) 9) 133 #define SNDRV_PCM_FORMAT_S32_LE (( snd_pcm_format_t) 10) 134 #define SNDRV_PCM_FORMAT_S32_BE (( snd_pcm_format_t) 11) 135 #define SNDRV_PCM_FORMAT_U32_LE (( snd_pcm_format_t) 12) 136 #define SNDRV_PCM_FORMAT_U32_BE (( snd_pcm_format_t) 13) 137 #define SNDRV_PCM_FORMAT_FLOAT_LE (( snd_pcm_format_t) 14) 138 #define SNDRV_PCM_FORMAT_FLOAT_BE (( snd_pcm_format_t) 15) 139 #define SNDRV_PCM_FORMAT_FLOAT64_LE (( snd_pcm_format_t) 16) 140 #define SNDRV_PCM_FORMAT_FLOAT64_BE (( snd_pcm_format_t) 17) 141 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE (( snd_pcm_format_t) 18) 142 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE (( snd_pcm_format_t) 19) 143 #define SNDRV_PCM_FORMAT_MU_LAW (( snd_pcm_format_t) 20) 144 #define SNDRV_PCM_FORMAT_A_LAW (( snd_pcm_format_t) 21) 145 #define SNDRV_PCM_FORMAT_IMA_ADPCM (( snd_pcm_format_t) 22) 146 #define SNDRV_PCM_FORMAT_MPEG (( snd_pcm_format_t) 23) 147 #define SNDRV_PCM_FORMAT_GSM (( snd_pcm_format_t) 24) 148 #define SNDRV_PCM_FORMAT_S20_LE (( snd_pcm_format_t) 25) 149 #define SNDRV_PCM_FORMAT_S20_BE (( snd_pcm_format_t) 26) 150 #define SNDRV_PCM_FORMAT_U20_LE (( snd_pcm_format_t) 27) 151 #define SNDRV_PCM_FORMAT_U20_BE (( snd_pcm_format_t) 28) 152 #define SNDRV_PCM_FORMAT_SPECIAL (( snd_pcm_format_t) 31) 153 #define SNDRV_PCM_FORMAT_S24_3LE (( snd_pcm_format_t) 32) 154 #define SNDRV_PCM_FORMAT_S24_3BE (( snd_pcm_format_t) 33) 155 #define SNDRV_PCM_FORMAT_U24_3LE (( snd_pcm_format_t) 34) 156 #define SNDRV_PCM_FORMAT_U24_3BE (( snd_pcm_format_t) 35) 157 #define SNDRV_PCM_FORMAT_S20_3LE (( snd_pcm_format_t) 36) 158 #define SNDRV_PCM_FORMAT_S20_3BE (( snd_pcm_format_t) 37) 159 #define SNDRV_PCM_FORMAT_U20_3LE (( snd_pcm_format_t) 38) 160 #define SNDRV_PCM_FORMAT_U20_3BE (( snd_pcm_format_t) 39) 161 #define SNDRV_PCM_FORMAT_S18_3LE (( snd_pcm_format_t) 40) 162 #define SNDRV_PCM_FORMAT_S18_3BE (( snd_pcm_format_t) 41) 163 #define SNDRV_PCM_FORMAT_U18_3LE (( snd_pcm_format_t) 42) 164 #define SNDRV_PCM_FORMAT_U18_3BE (( snd_pcm_format_t) 43) 165 #define SNDRV_PCM_FORMAT_G723_24 (( snd_pcm_format_t) 44) 166 #define SNDRV_PCM_FORMAT_G723_24_1B (( snd_pcm_format_t) 45) 167 #define SNDRV_PCM_FORMAT_G723_40 (( snd_pcm_format_t) 46) 168 #define SNDRV_PCM_FORMAT_G723_40_1B (( snd_pcm_format_t) 47) 169 #define SNDRV_PCM_FORMAT_DSD_U8 (( snd_pcm_format_t) 48) 170 #define SNDRV_PCM_FORMAT_DSD_U16_LE (( snd_pcm_format_t) 49) 171 #define SNDRV_PCM_FORMAT_DSD_U32_LE (( snd_pcm_format_t) 50) 172 #define SNDRV_PCM_FORMAT_DSD_U16_BE (( snd_pcm_format_t) 51) 173 #define SNDRV_PCM_FORMAT_DSD_U32_BE (( snd_pcm_format_t) 52) 174 #define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U32_BE 175 #define SNDRV_PCM_FORMAT_FIRST SNDRV_PCM_FORMAT_S8 176 #ifdef SNDRV_LITTLE_ENDIAN 177 #define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE 178 #define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE 179 #define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE 180 #define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE 181 #define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE 182 #define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE 183 #define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE 184 #define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE 185 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE 186 #define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_LE 187 #define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_LE 188 #endif 189 #ifdef SNDRV_BIG_ENDIAN 190 #define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE 191 #define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE 192 #define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE 193 #define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE 194 #define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE 195 #define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE 196 #define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE 197 #define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE 198 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE 199 #define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_BE 200 #define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_BE 201 #endif 202 typedef int __bitwise snd_pcm_subformat_t; 203 #define SNDRV_PCM_SUBFORMAT_STD (( snd_pcm_subformat_t) 0) 204 #define SNDRV_PCM_SUBFORMAT_MSBITS_MAX (( snd_pcm_subformat_t) 1) 205 #define SNDRV_PCM_SUBFORMAT_MSBITS_20 (( snd_pcm_subformat_t) 2) 206 #define SNDRV_PCM_SUBFORMAT_MSBITS_24 (( snd_pcm_subformat_t) 3) 207 #define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_MSBITS_24 208 #define SNDRV_PCM_INFO_MMAP 0x00000001 209 #define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 210 #define SNDRV_PCM_INFO_DOUBLE 0x00000004 211 #define SNDRV_PCM_INFO_BATCH 0x00000010 212 #define SNDRV_PCM_INFO_SYNC_APPLPTR 0x00000020 213 #define SNDRV_PCM_INFO_PERFECT_DRAIN 0x00000040 214 #define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 215 #define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 216 #define SNDRV_PCM_INFO_COMPLEX 0x00000400 217 #define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 218 #define SNDRV_PCM_INFO_OVERRANGE 0x00020000 219 #define SNDRV_PCM_INFO_RESUME 0x00040000 220 #define SNDRV_PCM_INFO_PAUSE 0x00080000 221 #define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 222 #define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 223 #define SNDRV_PCM_INFO_SYNC_START 0x00400000 224 #define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000 225 #define SNDRV_PCM_INFO_HAS_WALL_CLOCK 0x01000000 226 #define SNDRV_PCM_INFO_HAS_LINK_ATIME 0x01000000 227 #define SNDRV_PCM_INFO_HAS_LINK_ABSOLUTE_ATIME 0x02000000 228 #define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME 0x04000000 229 #define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000 230 #define SNDRV_PCM_INFO_EXPLICIT_SYNC 0x10000000 231 #define SNDRV_PCM_INFO_NO_REWINDS 0x20000000 232 #define SNDRV_PCM_INFO_DRAIN_TRIGGER 0x40000000 233 #define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000 234 #if __BITS_PER_LONG == 32 && defined(__USE_TIME_BITS64) 235 #define __SND_STRUCT_TIME64 236 #endif 237 typedef int __bitwise snd_pcm_state_t; 238 #define SNDRV_PCM_STATE_OPEN (( snd_pcm_state_t) 0) 239 #define SNDRV_PCM_STATE_SETUP (( snd_pcm_state_t) 1) 240 #define SNDRV_PCM_STATE_PREPARED (( snd_pcm_state_t) 2) 241 #define SNDRV_PCM_STATE_RUNNING (( snd_pcm_state_t) 3) 242 #define SNDRV_PCM_STATE_XRUN (( snd_pcm_state_t) 4) 243 #define SNDRV_PCM_STATE_DRAINING (( snd_pcm_state_t) 5) 244 #define SNDRV_PCM_STATE_PAUSED (( snd_pcm_state_t) 6) 245 #define SNDRV_PCM_STATE_SUSPENDED (( snd_pcm_state_t) 7) 246 #define SNDRV_PCM_STATE_DISCONNECTED (( snd_pcm_state_t) 8) 247 #define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED 248 enum { 249 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000, 250 SNDRV_PCM_MMAP_OFFSET_STATUS_OLD = 0x80000000, 251 SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD = 0x81000000, 252 SNDRV_PCM_MMAP_OFFSET_STATUS_NEW = 0x82000000, 253 SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW = 0x83000000, 254 #ifdef __SND_STRUCT_TIME64 255 SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_NEW, 256 SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW, 257 #else 258 SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_OLD, 259 SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD, 260 #endif 261 }; 262 union snd_pcm_sync_id { 263 unsigned char id[16]; 264 unsigned short id16[8]; 265 unsigned int id32[4]; 266 }; 267 struct snd_pcm_info { 268 unsigned int device; 269 unsigned int subdevice; 270 int stream; 271 int card; 272 unsigned char id[64]; 273 unsigned char name[80]; 274 unsigned char subname[32]; 275 int dev_class; 276 int dev_subclass; 277 unsigned int subdevices_count; 278 unsigned int subdevices_avail; 279 union snd_pcm_sync_id sync; 280 unsigned char reserved[64]; 281 }; 282 typedef int snd_pcm_hw_param_t; 283 #define SNDRV_PCM_HW_PARAM_ACCESS 0 284 #define SNDRV_PCM_HW_PARAM_FORMAT 1 285 #define SNDRV_PCM_HW_PARAM_SUBFORMAT 2 286 #define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS 287 #define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT 288 #define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8 289 #define SNDRV_PCM_HW_PARAM_FRAME_BITS 9 290 #define SNDRV_PCM_HW_PARAM_CHANNELS 10 291 #define SNDRV_PCM_HW_PARAM_RATE 11 292 #define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12 293 #define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13 294 #define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14 295 #define SNDRV_PCM_HW_PARAM_PERIODS 15 296 #define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16 297 #define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17 298 #define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18 299 #define SNDRV_PCM_HW_PARAM_TICK_TIME 19 300 #define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS 301 #define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME 302 #define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1 << 0) 303 #define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1 << 1) 304 #define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1 << 2) 305 #define SNDRV_PCM_HW_PARAMS_NO_DRAIN_SILENCE (1 << 3) 306 struct snd_interval { 307 unsigned int min, max; 308 unsigned int openmin : 1, openmax : 1, integer : 1, empty : 1; 309 }; 310 #define SNDRV_MASK_MAX 256 311 struct snd_mask { 312 __u32 bits[(SNDRV_MASK_MAX + 31) / 32]; 313 }; 314 struct snd_pcm_hw_params { 315 unsigned int flags; 316 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK - SNDRV_PCM_HW_PARAM_FIRST_MASK + 1]; 317 struct snd_mask mres[5]; 318 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL - SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1]; 319 struct snd_interval ires[9]; 320 unsigned int rmask; 321 unsigned int cmask; 322 unsigned int info; 323 unsigned int msbits; 324 unsigned int rate_num; 325 unsigned int rate_den; 326 snd_pcm_uframes_t fifo_size; 327 unsigned char reserved[64]; 328 }; 329 enum { 330 SNDRV_PCM_TSTAMP_NONE = 0, 331 SNDRV_PCM_TSTAMP_ENABLE, 332 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE, 333 }; 334 struct snd_pcm_sw_params { 335 int tstamp_mode; 336 unsigned int period_step; 337 unsigned int sleep_min; 338 snd_pcm_uframes_t avail_min; 339 snd_pcm_uframes_t xfer_align; 340 snd_pcm_uframes_t start_threshold; 341 snd_pcm_uframes_t stop_threshold; 342 snd_pcm_uframes_t silence_threshold; 343 snd_pcm_uframes_t silence_size; 344 snd_pcm_uframes_t boundary; 345 unsigned int proto; 346 unsigned int tstamp_type; 347 unsigned char reserved[56]; 348 }; 349 struct snd_pcm_channel_info { 350 unsigned int channel; 351 __kernel_off_t offset; 352 unsigned int first; 353 unsigned int step; 354 }; 355 enum { 356 SNDRV_PCM_AUDIO_TSTAMP_TYPE_COMPAT = 0, 357 SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT = 1, 358 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK = 2, 359 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ABSOLUTE = 3, 360 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ESTIMATED = 4, 361 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED = 5, 362 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LAST = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED 363 }; 364 typedef struct { 365 unsigned char pad[sizeof(time_t) - sizeof(int)]; 366 } __time_pad; 367 struct snd_pcm_status { 368 snd_pcm_state_t state; 369 __time_pad pad1; 370 struct timespec trigger_tstamp; 371 struct timespec tstamp; 372 snd_pcm_uframes_t appl_ptr; 373 snd_pcm_uframes_t hw_ptr; 374 snd_pcm_sframes_t delay; 375 snd_pcm_uframes_t avail; 376 snd_pcm_uframes_t avail_max; 377 snd_pcm_uframes_t overrange; 378 snd_pcm_state_t suspended_state; 379 __u32 audio_tstamp_data; 380 struct timespec audio_tstamp; 381 struct timespec driver_tstamp; 382 __u32 audio_tstamp_accuracy; 383 unsigned char reserved[52 - 2 * sizeof(struct timespec)]; 384 }; 385 #ifdef __SND_STRUCT_TIME64 386 #define __snd_pcm_mmap_status64 snd_pcm_mmap_status 387 #define __snd_pcm_mmap_control64 snd_pcm_mmap_control 388 #define __snd_pcm_sync_ptr64 snd_pcm_sync_ptr 389 #define __snd_timespec64 timespec 390 struct __snd_timespec { 391 __s32 tv_sec; 392 __s32 tv_nsec; 393 }; 394 #else 395 #define __snd_pcm_mmap_status snd_pcm_mmap_status 396 #define __snd_pcm_mmap_control snd_pcm_mmap_control 397 #define __snd_pcm_sync_ptr snd_pcm_sync_ptr 398 #define __snd_timespec timespec 399 struct __snd_timespec64 { 400 __s64 tv_sec; 401 __s64 tv_nsec; 402 }; 403 #endif 404 struct __snd_pcm_mmap_status { 405 snd_pcm_state_t state; 406 int pad1; 407 snd_pcm_uframes_t hw_ptr; 408 struct __snd_timespec tstamp; 409 snd_pcm_state_t suspended_state; 410 struct __snd_timespec audio_tstamp; 411 }; 412 struct __snd_pcm_mmap_control { 413 snd_pcm_uframes_t appl_ptr; 414 snd_pcm_uframes_t avail_min; 415 }; 416 #define SNDRV_PCM_SYNC_PTR_HWSYNC (1 << 0) 417 #define SNDRV_PCM_SYNC_PTR_APPL (1 << 1) 418 #define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1 << 2) 419 struct __snd_pcm_sync_ptr { 420 unsigned int flags; 421 union { 422 struct __snd_pcm_mmap_status status; 423 unsigned char reserved[64]; 424 } s; 425 union { 426 struct __snd_pcm_mmap_control control; 427 unsigned char reserved[64]; 428 } c; 429 }; 430 #if defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN) 431 typedef char __pad_before_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)]; 432 typedef char __pad_after_uframe[0]; 433 #endif 434 #if defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN) 435 typedef char __pad_before_uframe[0]; 436 typedef char __pad_after_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)]; 437 #endif 438 struct __snd_pcm_mmap_status64 { 439 snd_pcm_state_t state; 440 __u32 pad1; 441 __pad_before_uframe __pad1; 442 snd_pcm_uframes_t hw_ptr; 443 __pad_after_uframe __pad2; 444 struct __snd_timespec64 tstamp; 445 snd_pcm_state_t suspended_state; 446 __u32 pad3; 447 struct __snd_timespec64 audio_tstamp; 448 }; 449 struct __snd_pcm_mmap_control64 { 450 __pad_before_uframe __pad1; 451 snd_pcm_uframes_t appl_ptr; 452 __pad_before_uframe __pad2; 453 __pad_before_uframe __pad3; 454 snd_pcm_uframes_t avail_min; 455 __pad_after_uframe __pad4; 456 }; 457 struct __snd_pcm_sync_ptr64 { 458 __u32 flags; 459 __u32 pad1; 460 union { 461 struct __snd_pcm_mmap_status64 status; 462 unsigned char reserved[64]; 463 } s; 464 union { 465 struct __snd_pcm_mmap_control64 control; 466 unsigned char reserved[64]; 467 } c; 468 }; 469 struct snd_xferi { 470 snd_pcm_sframes_t result; 471 void * buf; 472 snd_pcm_uframes_t frames; 473 }; 474 struct snd_xfern { 475 snd_pcm_sframes_t result; 476 void * * bufs; 477 snd_pcm_uframes_t frames; 478 }; 479 enum { 480 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0, 481 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC, 482 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW, 483 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW, 484 }; 485 enum { 486 SNDRV_CHMAP_UNKNOWN = 0, 487 SNDRV_CHMAP_NA, 488 SNDRV_CHMAP_MONO, 489 SNDRV_CHMAP_FL, 490 SNDRV_CHMAP_FR, 491 SNDRV_CHMAP_RL, 492 SNDRV_CHMAP_RR, 493 SNDRV_CHMAP_FC, 494 SNDRV_CHMAP_LFE, 495 SNDRV_CHMAP_SL, 496 SNDRV_CHMAP_SR, 497 SNDRV_CHMAP_RC, 498 SNDRV_CHMAP_FLC, 499 SNDRV_CHMAP_FRC, 500 SNDRV_CHMAP_RLC, 501 SNDRV_CHMAP_RRC, 502 SNDRV_CHMAP_FLW, 503 SNDRV_CHMAP_FRW, 504 SNDRV_CHMAP_FLH, 505 SNDRV_CHMAP_FCH, 506 SNDRV_CHMAP_FRH, 507 SNDRV_CHMAP_TC, 508 SNDRV_CHMAP_TFL, 509 SNDRV_CHMAP_TFR, 510 SNDRV_CHMAP_TFC, 511 SNDRV_CHMAP_TRL, 512 SNDRV_CHMAP_TRR, 513 SNDRV_CHMAP_TRC, 514 SNDRV_CHMAP_TFLC, 515 SNDRV_CHMAP_TFRC, 516 SNDRV_CHMAP_TSL, 517 SNDRV_CHMAP_TSR, 518 SNDRV_CHMAP_LLFE, 519 SNDRV_CHMAP_RLFE, 520 SNDRV_CHMAP_BC, 521 SNDRV_CHMAP_BLC, 522 SNDRV_CHMAP_BRC, 523 SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC, 524 }; 525 #define SNDRV_CHMAP_POSITION_MASK 0xffff 526 #define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16) 527 #define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16) 528 #define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int) 529 #define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info) 530 #define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int) 531 #define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int) 532 #define SNDRV_PCM_IOCTL_USER_PVERSION _IOW('A', 0x04, int) 533 #define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params) 534 #define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params) 535 #define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12) 536 #define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params) 537 #define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status) 538 #define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t) 539 #define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22) 540 #define __SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct __snd_pcm_sync_ptr) 541 #define __SNDRV_PCM_IOCTL_SYNC_PTR64 _IOWR('A', 0x23, struct __snd_pcm_sync_ptr64) 542 #define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr) 543 #define SNDRV_PCM_IOCTL_STATUS_EXT _IOWR('A', 0x24, struct snd_pcm_status) 544 #define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info) 545 #define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40) 546 #define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41) 547 #define SNDRV_PCM_IOCTL_START _IO('A', 0x42) 548 #define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43) 549 #define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44) 550 #define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int) 551 #define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t) 552 #define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47) 553 #define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48) 554 #define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t) 555 #define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi) 556 #define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi) 557 #define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern) 558 #define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern) 559 #define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int) 560 #define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61) 561 #define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 4) 562 enum { 563 SNDRV_RAWMIDI_STREAM_OUTPUT = 0, 564 SNDRV_RAWMIDI_STREAM_INPUT, 565 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT, 566 }; 567 #define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001 568 #define SNDRV_RAWMIDI_INFO_INPUT 0x00000002 569 #define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004 570 #define SNDRV_RAWMIDI_INFO_UMP 0x00000008 571 struct snd_rawmidi_info { 572 unsigned int device; 573 unsigned int subdevice; 574 int stream; 575 int card; 576 unsigned int flags; 577 unsigned char id[64]; 578 unsigned char name[80]; 579 unsigned char subname[32]; 580 unsigned int subdevices_count; 581 unsigned int subdevices_avail; 582 unsigned char reserved[64]; 583 }; 584 #define SNDRV_RAWMIDI_MODE_FRAMING_MASK (7 << 0) 585 #define SNDRV_RAWMIDI_MODE_FRAMING_SHIFT 0 586 #define SNDRV_RAWMIDI_MODE_FRAMING_NONE (0 << 0) 587 #define SNDRV_RAWMIDI_MODE_FRAMING_TSTAMP (1 << 0) 588 #define SNDRV_RAWMIDI_MODE_CLOCK_MASK (7 << 3) 589 #define SNDRV_RAWMIDI_MODE_CLOCK_SHIFT 3 590 #define SNDRV_RAWMIDI_MODE_CLOCK_NONE (0 << 3) 591 #define SNDRV_RAWMIDI_MODE_CLOCK_REALTIME (1 << 3) 592 #define SNDRV_RAWMIDI_MODE_CLOCK_MONOTONIC (2 << 3) 593 #define SNDRV_RAWMIDI_MODE_CLOCK_MONOTONIC_RAW (3 << 3) 594 #define SNDRV_RAWMIDI_FRAMING_DATA_LENGTH 16 595 struct snd_rawmidi_framing_tstamp { 596 __u8 frame_type; 597 __u8 length; 598 __u8 reserved[2]; 599 __u32 tv_nsec; 600 __u64 tv_sec; 601 __u8 data[SNDRV_RAWMIDI_FRAMING_DATA_LENGTH]; 602 } __attribute__((__packed__)); 603 struct snd_rawmidi_params { 604 int stream; 605 size_t buffer_size; 606 size_t avail_min; 607 unsigned int no_active_sensing : 1; 608 unsigned int mode; 609 unsigned char reserved[12]; 610 }; 611 struct snd_rawmidi_status { 612 int stream; 613 __time_pad pad1; 614 struct timespec tstamp; 615 size_t avail; 616 size_t xruns; 617 unsigned char reserved[16]; 618 }; 619 #define SNDRV_UMP_EP_INFO_STATIC_BLOCKS 0x01 620 #define SNDRV_UMP_EP_INFO_PROTO_MIDI_MASK 0x0300 621 #define SNDRV_UMP_EP_INFO_PROTO_MIDI1 0x0100 622 #define SNDRV_UMP_EP_INFO_PROTO_MIDI2 0x0200 623 #define SNDRV_UMP_EP_INFO_PROTO_JRTS_MASK 0x0003 624 #define SNDRV_UMP_EP_INFO_PROTO_JRTS_TX 0x0001 625 #define SNDRV_UMP_EP_INFO_PROTO_JRTS_RX 0x0002 626 struct snd_ump_endpoint_info { 627 int card; 628 int device; 629 unsigned int flags; 630 unsigned int protocol_caps; 631 unsigned int protocol; 632 unsigned int num_blocks; 633 unsigned short version; 634 unsigned short family_id; 635 unsigned short model_id; 636 unsigned int manufacturer_id; 637 unsigned char sw_revision[4]; 638 unsigned short padding; 639 unsigned char name[128]; 640 unsigned char product_id[128]; 641 unsigned char reserved[32]; 642 } __attribute__((__packed__)); 643 #define SNDRV_UMP_DIR_INPUT 0x01 644 #define SNDRV_UMP_DIR_OUTPUT 0x02 645 #define SNDRV_UMP_DIR_BIDIRECTION 0x03 646 #define SNDRV_UMP_BLOCK_IS_MIDI1 (1U << 0) 647 #define SNDRV_UMP_BLOCK_IS_LOWSPEED (1U << 1) 648 #define SNDRV_UMP_BLOCK_UI_HINT_UNKNOWN 0x00 649 #define SNDRV_UMP_BLOCK_UI_HINT_RECEIVER 0x01 650 #define SNDRV_UMP_BLOCK_UI_HINT_SENDER 0x02 651 #define SNDRV_UMP_BLOCK_UI_HINT_BOTH 0x03 652 #define SNDRV_UMP_MAX_GROUPS 16 653 #define SNDRV_UMP_MAX_BLOCKS 32 654 struct snd_ump_block_info { 655 int card; 656 int device; 657 unsigned char block_id; 658 unsigned char direction; 659 unsigned char active; 660 unsigned char first_group; 661 unsigned char num_groups; 662 unsigned char midi_ci_version; 663 unsigned char sysex8_streams; 664 unsigned char ui_hint; 665 unsigned int flags; 666 unsigned char name[128]; 667 unsigned char reserved[32]; 668 } __attribute__((__packed__)); 669 #define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int) 670 #define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info) 671 #define SNDRV_RAWMIDI_IOCTL_USER_PVERSION _IOW('W', 0x02, int) 672 #define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params) 673 #define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status) 674 #define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int) 675 #define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int) 676 #define SNDRV_UMP_IOCTL_ENDPOINT_INFO _IOR('W', 0x40, struct snd_ump_endpoint_info) 677 #define SNDRV_UMP_IOCTL_BLOCK_INFO _IOR('W', 0x41, struct snd_ump_block_info) 678 #define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7) 679 enum { 680 SNDRV_TIMER_CLASS_NONE = - 1, 681 SNDRV_TIMER_CLASS_SLAVE = 0, 682 SNDRV_TIMER_CLASS_GLOBAL, 683 SNDRV_TIMER_CLASS_CARD, 684 SNDRV_TIMER_CLASS_PCM, 685 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM, 686 }; 687 enum { 688 SNDRV_TIMER_SCLASS_NONE = 0, 689 SNDRV_TIMER_SCLASS_APPLICATION, 690 SNDRV_TIMER_SCLASS_SEQUENCER, 691 SNDRV_TIMER_SCLASS_OSS_SEQUENCER, 692 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER, 693 }; 694 #define SNDRV_TIMER_GLOBAL_SYSTEM 0 695 #define SNDRV_TIMER_GLOBAL_RTC 1 696 #define SNDRV_TIMER_GLOBAL_HPET 2 697 #define SNDRV_TIMER_GLOBAL_HRTIMER 3 698 #define SNDRV_TIMER_FLG_SLAVE (1 << 0) 699 struct snd_timer_id { 700 int dev_class; 701 int dev_sclass; 702 int card; 703 int device; 704 int subdevice; 705 }; 706 struct snd_timer_ginfo { 707 struct snd_timer_id tid; 708 unsigned int flags; 709 int card; 710 unsigned char id[64]; 711 unsigned char name[80]; 712 unsigned long reserved0; 713 unsigned long resolution; 714 unsigned long resolution_min; 715 unsigned long resolution_max; 716 unsigned int clients; 717 unsigned char reserved[32]; 718 }; 719 struct snd_timer_gparams { 720 struct snd_timer_id tid; 721 unsigned long period_num; 722 unsigned long period_den; 723 unsigned char reserved[32]; 724 }; 725 struct snd_timer_gstatus { 726 struct snd_timer_id tid; 727 unsigned long resolution; 728 unsigned long resolution_num; 729 unsigned long resolution_den; 730 unsigned char reserved[32]; 731 }; 732 struct snd_timer_select { 733 struct snd_timer_id id; 734 unsigned char reserved[32]; 735 }; 736 struct snd_timer_info { 737 unsigned int flags; 738 int card; 739 unsigned char id[64]; 740 unsigned char name[80]; 741 unsigned long reserved0; 742 unsigned long resolution; 743 unsigned char reserved[64]; 744 }; 745 #define SNDRV_TIMER_PSFLG_AUTO (1 << 0) 746 #define SNDRV_TIMER_PSFLG_EXCLUSIVE (1 << 1) 747 #define SNDRV_TIMER_PSFLG_EARLY_EVENT (1 << 2) 748 struct snd_timer_params { 749 unsigned int flags; 750 unsigned int ticks; 751 unsigned int queue_size; 752 unsigned int reserved0; 753 unsigned int filter; 754 unsigned char reserved[60]; 755 }; 756 struct snd_timer_status { 757 struct timespec tstamp; 758 unsigned int resolution; 759 unsigned int lost; 760 unsigned int overrun; 761 unsigned int queue; 762 unsigned char reserved[64]; 763 }; 764 #define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int) 765 #define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id) 766 #define SNDRV_TIMER_IOCTL_TREAD_OLD _IOW('T', 0x02, int) 767 #define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo) 768 #define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams) 769 #define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus) 770 #define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select) 771 #define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info) 772 #define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params) 773 #define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status) 774 #define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0) 775 #define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1) 776 #define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2) 777 #define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3) 778 #define SNDRV_TIMER_IOCTL_TREAD64 _IOW('T', 0xa4, int) 779 #if __BITS_PER_LONG == 64 780 #define SNDRV_TIMER_IOCTL_TREAD SNDRV_TIMER_IOCTL_TREAD_OLD 781 #else 782 #define SNDRV_TIMER_IOCTL_TREAD ((sizeof(__kernel_long_t) >= sizeof(time_t)) ? SNDRV_TIMER_IOCTL_TREAD_OLD : SNDRV_TIMER_IOCTL_TREAD64) 783 #endif 784 struct snd_timer_read { 785 unsigned int resolution; 786 unsigned int ticks; 787 }; 788 enum { 789 SNDRV_TIMER_EVENT_RESOLUTION = 0, 790 SNDRV_TIMER_EVENT_TICK, 791 SNDRV_TIMER_EVENT_START, 792 SNDRV_TIMER_EVENT_STOP, 793 SNDRV_TIMER_EVENT_CONTINUE, 794 SNDRV_TIMER_EVENT_PAUSE, 795 SNDRV_TIMER_EVENT_EARLY, 796 SNDRV_TIMER_EVENT_SUSPEND, 797 SNDRV_TIMER_EVENT_RESUME, 798 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10, 799 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10, 800 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10, 801 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10, 802 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10, 803 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10, 804 }; 805 struct snd_timer_tread { 806 int event; 807 __time_pad pad1; 808 struct timespec tstamp; 809 unsigned int val; 810 __time_pad pad2; 811 }; 812 #define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 9) 813 struct snd_ctl_card_info { 814 int card; 815 int pad; 816 unsigned char id[16]; 817 unsigned char driver[16]; 818 unsigned char name[32]; 819 unsigned char longname[80]; 820 unsigned char reserved_[16]; 821 unsigned char mixername[80]; 822 unsigned char components[128]; 823 }; 824 typedef int __bitwise snd_ctl_elem_type_t; 825 #define SNDRV_CTL_ELEM_TYPE_NONE (( snd_ctl_elem_type_t) 0) 826 #define SNDRV_CTL_ELEM_TYPE_BOOLEAN (( snd_ctl_elem_type_t) 1) 827 #define SNDRV_CTL_ELEM_TYPE_INTEGER (( snd_ctl_elem_type_t) 2) 828 #define SNDRV_CTL_ELEM_TYPE_ENUMERATED (( snd_ctl_elem_type_t) 3) 829 #define SNDRV_CTL_ELEM_TYPE_BYTES (( snd_ctl_elem_type_t) 4) 830 #define SNDRV_CTL_ELEM_TYPE_IEC958 (( snd_ctl_elem_type_t) 5) 831 #define SNDRV_CTL_ELEM_TYPE_INTEGER64 (( snd_ctl_elem_type_t) 6) 832 #define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64 833 typedef int __bitwise snd_ctl_elem_iface_t; 834 #define SNDRV_CTL_ELEM_IFACE_CARD (( snd_ctl_elem_iface_t) 0) 835 #define SNDRV_CTL_ELEM_IFACE_HWDEP (( snd_ctl_elem_iface_t) 1) 836 #define SNDRV_CTL_ELEM_IFACE_MIXER (( snd_ctl_elem_iface_t) 2) 837 #define SNDRV_CTL_ELEM_IFACE_PCM (( snd_ctl_elem_iface_t) 3) 838 #define SNDRV_CTL_ELEM_IFACE_RAWMIDI (( snd_ctl_elem_iface_t) 4) 839 #define SNDRV_CTL_ELEM_IFACE_TIMER (( snd_ctl_elem_iface_t) 5) 840 #define SNDRV_CTL_ELEM_IFACE_SEQUENCER (( snd_ctl_elem_iface_t) 6) 841 #define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER 842 #define SNDRV_CTL_ELEM_ACCESS_READ (1 << 0) 843 #define SNDRV_CTL_ELEM_ACCESS_WRITE (1 << 1) 844 #define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE) 845 #define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1 << 2) 846 #define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1 << 4) 847 #define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1 << 5) 848 #define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ | SNDRV_CTL_ELEM_ACCESS_TLV_WRITE) 849 #define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1 << 6) 850 #define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1 << 8) 851 #define SNDRV_CTL_ELEM_ACCESS_LOCK (1 << 9) 852 #define SNDRV_CTL_ELEM_ACCESS_OWNER (1 << 10) 853 #define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1 << 28) 854 #define SNDRV_CTL_ELEM_ACCESS_USER (1 << 29) 855 #define SNDRV_CTL_POWER_D0 0x0000 856 #define SNDRV_CTL_POWER_D1 0x0100 857 #define SNDRV_CTL_POWER_D2 0x0200 858 #define SNDRV_CTL_POWER_D3 0x0300 859 #define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3 | 0x0000) 860 #define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3 | 0x0001) 861 #define SNDRV_CTL_ELEM_ID_NAME_MAXLEN 44 862 struct snd_ctl_elem_id { 863 unsigned int numid; 864 snd_ctl_elem_iface_t iface; 865 unsigned int device; 866 unsigned int subdevice; 867 unsigned char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; 868 unsigned int index; 869 }; 870 struct snd_ctl_elem_list { 871 unsigned int offset; 872 unsigned int space; 873 unsigned int used; 874 unsigned int count; 875 struct snd_ctl_elem_id * pids; 876 unsigned char reserved[50]; 877 }; 878 struct snd_ctl_elem_info { 879 struct snd_ctl_elem_id id; 880 snd_ctl_elem_type_t type; 881 unsigned int access; 882 unsigned int count; 883 __kernel_pid_t owner; 884 union { 885 struct { 886 long min; 887 long max; 888 long step; 889 } integer; 890 struct { 891 long long min; 892 long long max; 893 long long step; 894 } integer64; 895 struct { 896 unsigned int items; 897 unsigned int item; 898 char name[64]; 899 __u64 names_ptr; 900 unsigned int names_length; 901 } enumerated; 902 unsigned char reserved[128]; 903 } value; 904 unsigned char reserved[64]; 905 }; 906 struct snd_ctl_elem_value { 907 struct snd_ctl_elem_id id; 908 unsigned int indirect : 1; 909 union { 910 union { 911 long value[128]; 912 long * value_ptr; 913 } integer; 914 union { 915 long long value[64]; 916 long long * value_ptr; 917 } integer64; 918 union { 919 unsigned int item[128]; 920 unsigned int * item_ptr; 921 } enumerated; 922 union { 923 unsigned char data[512]; 924 unsigned char * data_ptr; 925 } bytes; 926 struct snd_aes_iec958 iec958; 927 } value; 928 unsigned char reserved[128]; 929 }; 930 struct snd_ctl_tlv { 931 unsigned int numid; 932 unsigned int length; 933 unsigned int tlv[]; 934 }; 935 #define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int) 936 #define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info) 937 #define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list) 938 #define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info) 939 #define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value) 940 #define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value) 941 #define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id) 942 #define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id) 943 #define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int) 944 #define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info) 945 #define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info) 946 #define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id) 947 #define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv) 948 #define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv) 949 #define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv) 950 #define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int) 951 #define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info) 952 #define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int) 953 #define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info) 954 #define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int) 955 #define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int) 956 #define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info) 957 #define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int) 958 #define SNDRV_CTL_IOCTL_UMP_NEXT_DEVICE _IOWR('U', 0x43, int) 959 #define SNDRV_CTL_IOCTL_UMP_ENDPOINT_INFO _IOWR('U', 0x44, struct snd_ump_endpoint_info) 960 #define SNDRV_CTL_IOCTL_UMP_BLOCK_INFO _IOWR('U', 0x45, struct snd_ump_block_info) 961 #define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int) 962 #define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int) 963 enum sndrv_ctl_event_type { 964 SNDRV_CTL_EVENT_ELEM = 0, 965 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM, 966 }; 967 #define SNDRV_CTL_EVENT_MASK_VALUE (1 << 0) 968 #define SNDRV_CTL_EVENT_MASK_INFO (1 << 1) 969 #define SNDRV_CTL_EVENT_MASK_ADD (1 << 2) 970 #define SNDRV_CTL_EVENT_MASK_TLV (1 << 3) 971 #define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) 972 struct snd_ctl_event { 973 int type; 974 union { 975 struct { 976 unsigned int mask; 977 struct snd_ctl_elem_id id; 978 } elem; 979 unsigned char data8[60]; 980 } data; 981 }; 982 #define SNDRV_CTL_NAME_NONE "" 983 #define SNDRV_CTL_NAME_PLAYBACK "Playback " 984 #define SNDRV_CTL_NAME_CAPTURE "Capture " 985 #define SNDRV_CTL_NAME_IEC958_NONE "" 986 #define SNDRV_CTL_NAME_IEC958_SWITCH "Switch" 987 #define SNDRV_CTL_NAME_IEC958_VOLUME "Volume" 988 #define SNDRV_CTL_NAME_IEC958_DEFAULT "Default" 989 #define SNDRV_CTL_NAME_IEC958_MASK "Mask" 990 #define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask" 991 #define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask" 992 #define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream" 993 #define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_ ##direction SNDRV_CTL_NAME_IEC958_ ##what 994 #endif 995