1/*
2 * Copyright (C) 2023 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 *     http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #include <arch.h>
18
19.global disable_cache_mmu_and_jump
20
21/* ---------------------------------------------------------------
22 * Disable cache, MMU and jump to the given address with arguments
23 *
24 * x0 - x3: Arguments for the target jump address.
25 * x4: The jump address.
26 * ---------------------------------------------------------------
27 */
28disable_cache_mmu_and_jump:
29    // Query current EL
30    mrs     x5, CurrentEL
31    cmp     x5, #(1 << 3)
32    beq     asm_disable_cache_mmu_el2
33
34    /*
35     * Invalidate instruction cache before disabling it.
36     */
37    ic  iallu
38    isb
39
40asm_disable_cache_mmu_el1:
41    mrs x5, sctlr_el1
42    bic x5, x5, #SCTLR_M_BIT
43    bic x5, x5, #SCTLR_C_BIT
44    bic x5, x5, #SCTLR_I_BIT
45    msr sctlr_el1, x5
46    b asm_finish
47
48asm_disable_cache_mmu_el2:
49    mrs x5, sctlr_el2
50    bic x5, x5, #SCTLR_M_BIT
51    bic x5, x5, #SCTLR_C_BIT
52    bic x5, x5, #SCTLR_I_BIT
53    msr sctlr_el2, x5
54
55asm_finish:
56    ic  iallu
57    isb
58    /*
59     * Invalidate TLB.
60     */
61    tlbi vmalle1
62
63    br x4
64    /*
65     * Prevent speculative execution.
66     */
67    dsb nsh
68    isb
69