1 /* 2 * This file is auto-generated. Modifications will be lost. 3 * 4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/ 5 * for more information. 6 */ 7 #ifndef __SOUND_ASOUND_H 8 #define __SOUND_ASOUND_H 9 #ifdef __linux__ 10 #include <linux/types.h> 11 #include <asm/byteorder.h> 12 #else 13 #include <endian.h> 14 #include <sys/ioctl.h> 15 #endif 16 #include <stdlib.h> 17 #include <time.h> 18 #define SNDRV_PROTOCOL_VERSION(major,minor,subminor) (((major) << 16) | ((minor) << 8) | (subminor)) 19 #define SNDRV_PROTOCOL_MAJOR(version) (((version) >> 16) & 0xffff) 20 #define SNDRV_PROTOCOL_MINOR(version) (((version) >> 8) & 0xff) 21 #define SNDRV_PROTOCOL_MICRO(version) ((version) & 0xff) 22 #define SNDRV_PROTOCOL_INCOMPATIBLE(kversion,uversion) (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion))) 23 #define AES_IEC958_STATUS_SIZE 24 24 struct snd_aes_iec958 { 25 unsigned char status[AES_IEC958_STATUS_SIZE]; 26 unsigned char subcode[147]; 27 unsigned char pad; 28 unsigned char dig_subframe[4]; 29 }; 30 struct snd_cea_861_aud_if { 31 unsigned char db1_ct_cc; 32 unsigned char db2_sf_ss; 33 unsigned char db3; 34 unsigned char db4_ca; 35 unsigned char db5_dminh_lsv; 36 }; 37 #define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1) 38 enum { 39 SNDRV_HWDEP_IFACE_OPL2 = 0, 40 SNDRV_HWDEP_IFACE_OPL3, 41 SNDRV_HWDEP_IFACE_OPL4, 42 SNDRV_HWDEP_IFACE_SB16CSP, 43 SNDRV_HWDEP_IFACE_EMU10K1, 44 SNDRV_HWDEP_IFACE_YSS225, 45 SNDRV_HWDEP_IFACE_ICS2115, 46 SNDRV_HWDEP_IFACE_SSCAPE, 47 SNDRV_HWDEP_IFACE_VX, 48 SNDRV_HWDEP_IFACE_MIXART, 49 SNDRV_HWDEP_IFACE_USX2Y, 50 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, 51 SNDRV_HWDEP_IFACE_BLUETOOTH, 52 SNDRV_HWDEP_IFACE_USX2Y_PCM, 53 SNDRV_HWDEP_IFACE_PCXHR, 54 SNDRV_HWDEP_IFACE_SB_RC, 55 SNDRV_HWDEP_IFACE_HDA, 56 SNDRV_HWDEP_IFACE_USB_STREAM, 57 SNDRV_HWDEP_IFACE_FW_DICE, 58 SNDRV_HWDEP_IFACE_FW_FIREWORKS, 59 SNDRV_HWDEP_IFACE_FW_BEBOB, 60 SNDRV_HWDEP_IFACE_FW_OXFW, 61 SNDRV_HWDEP_IFACE_FW_DIGI00X, 62 SNDRV_HWDEP_IFACE_FW_TASCAM, 63 SNDRV_HWDEP_IFACE_LINE6, 64 SNDRV_HWDEP_IFACE_FW_MOTU, 65 SNDRV_HWDEP_IFACE_FW_FIREFACE, 66 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_FIREFACE 67 }; 68 struct snd_hwdep_info { 69 unsigned int device; 70 int card; 71 unsigned char id[64]; 72 unsigned char name[80]; 73 int iface; 74 unsigned char reserved[64]; 75 }; 76 struct snd_hwdep_dsp_status { 77 unsigned int version; 78 unsigned char id[32]; 79 unsigned int num_dsps; 80 unsigned int dsp_loaded; 81 unsigned int chip_ready; 82 unsigned char reserved[16]; 83 }; 84 struct snd_hwdep_dsp_image { 85 unsigned int index; 86 unsigned char name[64]; 87 unsigned char * image; 88 size_t length; 89 unsigned long driver_data; 90 }; 91 #define SNDRV_HWDEP_IOCTL_PVERSION _IOR('H', 0x00, int) 92 #define SNDRV_HWDEP_IOCTL_INFO _IOR('H', 0x01, struct snd_hwdep_info) 93 #define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status) 94 #define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image) 95 #define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 15) 96 typedef unsigned long snd_pcm_uframes_t; 97 typedef signed long snd_pcm_sframes_t; 98 enum { 99 SNDRV_PCM_CLASS_GENERIC = 0, 100 SNDRV_PCM_CLASS_MULTI, 101 SNDRV_PCM_CLASS_MODEM, 102 SNDRV_PCM_CLASS_DIGITIZER, 103 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER, 104 }; 105 enum { 106 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, 107 SNDRV_PCM_SUBCLASS_MULTI_MIX, 108 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX, 109 }; 110 enum { 111 SNDRV_PCM_STREAM_PLAYBACK = 0, 112 SNDRV_PCM_STREAM_CAPTURE, 113 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE, 114 }; 115 typedef int __bitwise snd_pcm_access_t; 116 #define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((snd_pcm_access_t) 0) 117 #define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((snd_pcm_access_t) 1) 118 #define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((snd_pcm_access_t) 2) 119 #define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((snd_pcm_access_t) 3) 120 #define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((snd_pcm_access_t) 4) 121 #define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED 122 typedef int __bitwise snd_pcm_format_t; 123 #define SNDRV_PCM_FORMAT_S8 ((snd_pcm_format_t) 0) 124 #define SNDRV_PCM_FORMAT_U8 ((snd_pcm_format_t) 1) 125 #define SNDRV_PCM_FORMAT_S16_LE ((snd_pcm_format_t) 2) 126 #define SNDRV_PCM_FORMAT_S16_BE ((snd_pcm_format_t) 3) 127 #define SNDRV_PCM_FORMAT_U16_LE ((snd_pcm_format_t) 4) 128 #define SNDRV_PCM_FORMAT_U16_BE ((snd_pcm_format_t) 5) 129 #define SNDRV_PCM_FORMAT_S24_LE ((snd_pcm_format_t) 6) 130 #define SNDRV_PCM_FORMAT_S24_BE ((snd_pcm_format_t) 7) 131 #define SNDRV_PCM_FORMAT_U24_LE ((snd_pcm_format_t) 8) 132 #define SNDRV_PCM_FORMAT_U24_BE ((snd_pcm_format_t) 9) 133 #define SNDRV_PCM_FORMAT_S32_LE ((snd_pcm_format_t) 10) 134 #define SNDRV_PCM_FORMAT_S32_BE ((snd_pcm_format_t) 11) 135 #define SNDRV_PCM_FORMAT_U32_LE ((snd_pcm_format_t) 12) 136 #define SNDRV_PCM_FORMAT_U32_BE ((snd_pcm_format_t) 13) 137 #define SNDRV_PCM_FORMAT_FLOAT_LE ((snd_pcm_format_t) 14) 138 #define SNDRV_PCM_FORMAT_FLOAT_BE ((snd_pcm_format_t) 15) 139 #define SNDRV_PCM_FORMAT_FLOAT64_LE ((snd_pcm_format_t) 16) 140 #define SNDRV_PCM_FORMAT_FLOAT64_BE ((snd_pcm_format_t) 17) 141 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((snd_pcm_format_t) 18) 142 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((snd_pcm_format_t) 19) 143 #define SNDRV_PCM_FORMAT_MU_LAW ((snd_pcm_format_t) 20) 144 #define SNDRV_PCM_FORMAT_A_LAW ((snd_pcm_format_t) 21) 145 #define SNDRV_PCM_FORMAT_IMA_ADPCM ((snd_pcm_format_t) 22) 146 #define SNDRV_PCM_FORMAT_MPEG ((snd_pcm_format_t) 23) 147 #define SNDRV_PCM_FORMAT_GSM ((snd_pcm_format_t) 24) 148 #define SNDRV_PCM_FORMAT_S20_LE ((snd_pcm_format_t) 25) 149 #define SNDRV_PCM_FORMAT_S20_BE ((snd_pcm_format_t) 26) 150 #define SNDRV_PCM_FORMAT_U20_LE ((snd_pcm_format_t) 27) 151 #define SNDRV_PCM_FORMAT_U20_BE ((snd_pcm_format_t) 28) 152 #define SNDRV_PCM_FORMAT_SPECIAL ((snd_pcm_format_t) 31) 153 #define SNDRV_PCM_FORMAT_S24_3LE ((snd_pcm_format_t) 32) 154 #define SNDRV_PCM_FORMAT_S24_3BE ((snd_pcm_format_t) 33) 155 #define SNDRV_PCM_FORMAT_U24_3LE ((snd_pcm_format_t) 34) 156 #define SNDRV_PCM_FORMAT_U24_3BE ((snd_pcm_format_t) 35) 157 #define SNDRV_PCM_FORMAT_S20_3LE ((snd_pcm_format_t) 36) 158 #define SNDRV_PCM_FORMAT_S20_3BE ((snd_pcm_format_t) 37) 159 #define SNDRV_PCM_FORMAT_U20_3LE ((snd_pcm_format_t) 38) 160 #define SNDRV_PCM_FORMAT_U20_3BE ((snd_pcm_format_t) 39) 161 #define SNDRV_PCM_FORMAT_S18_3LE ((snd_pcm_format_t) 40) 162 #define SNDRV_PCM_FORMAT_S18_3BE ((snd_pcm_format_t) 41) 163 #define SNDRV_PCM_FORMAT_U18_3LE ((snd_pcm_format_t) 42) 164 #define SNDRV_PCM_FORMAT_U18_3BE ((snd_pcm_format_t) 43) 165 #define SNDRV_PCM_FORMAT_G723_24 ((snd_pcm_format_t) 44) 166 #define SNDRV_PCM_FORMAT_G723_24_1B ((snd_pcm_format_t) 45) 167 #define SNDRV_PCM_FORMAT_G723_40 ((snd_pcm_format_t) 46) 168 #define SNDRV_PCM_FORMAT_G723_40_1B ((snd_pcm_format_t) 47) 169 #define SNDRV_PCM_FORMAT_DSD_U8 ((snd_pcm_format_t) 48) 170 #define SNDRV_PCM_FORMAT_DSD_U16_LE ((snd_pcm_format_t) 49) 171 #define SNDRV_PCM_FORMAT_DSD_U32_LE ((snd_pcm_format_t) 50) 172 #define SNDRV_PCM_FORMAT_DSD_U16_BE ((snd_pcm_format_t) 51) 173 #define SNDRV_PCM_FORMAT_DSD_U32_BE ((snd_pcm_format_t) 52) 174 #define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U32_BE 175 #define SNDRV_PCM_FORMAT_FIRST SNDRV_PCM_FORMAT_S8 176 #ifdef SNDRV_LITTLE_ENDIAN 177 #define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE 178 #define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE 179 #define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE 180 #define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE 181 #define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE 182 #define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE 183 #define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE 184 #define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE 185 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE 186 #define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_LE 187 #define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_LE 188 #endif 189 #ifdef SNDRV_BIG_ENDIAN 190 #define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE 191 #define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE 192 #define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE 193 #define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE 194 #define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE 195 #define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE 196 #define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE 197 #define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE 198 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE 199 #define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_BE 200 #define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_BE 201 #endif 202 typedef int __bitwise snd_pcm_subformat_t; 203 #define SNDRV_PCM_SUBFORMAT_STD ((snd_pcm_subformat_t) 0) 204 #define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD 205 #define SNDRV_PCM_INFO_MMAP 0x00000001 206 #define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 207 #define SNDRV_PCM_INFO_DOUBLE 0x00000004 208 #define SNDRV_PCM_INFO_BATCH 0x00000010 209 #define SNDRV_PCM_INFO_SYNC_APPLPTR 0x00000020 210 #define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 211 #define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 212 #define SNDRV_PCM_INFO_COMPLEX 0x00000400 213 #define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 214 #define SNDRV_PCM_INFO_OVERRANGE 0x00020000 215 #define SNDRV_PCM_INFO_RESUME 0x00040000 216 #define SNDRV_PCM_INFO_PAUSE 0x00080000 217 #define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 218 #define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 219 #define SNDRV_PCM_INFO_SYNC_START 0x00400000 220 #define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000 221 #define SNDRV_PCM_INFO_HAS_WALL_CLOCK 0x01000000 222 #define SNDRV_PCM_INFO_HAS_LINK_ATIME 0x01000000 223 #define SNDRV_PCM_INFO_HAS_LINK_ABSOLUTE_ATIME 0x02000000 224 #define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME 0x04000000 225 #define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000 226 #define SNDRV_PCM_INFO_EXPLICIT_SYNC 0x10000000 227 #define SNDRV_PCM_INFO_DRAIN_TRIGGER 0x40000000 228 #define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000 229 #if __BITS_PER_LONG == 32 && defined(__USE_TIME_BITS64) 230 #define __SND_STRUCT_TIME64 231 #endif 232 typedef int __bitwise snd_pcm_state_t; 233 #define SNDRV_PCM_STATE_OPEN ((snd_pcm_state_t) 0) 234 #define SNDRV_PCM_STATE_SETUP ((snd_pcm_state_t) 1) 235 #define SNDRV_PCM_STATE_PREPARED ((snd_pcm_state_t) 2) 236 #define SNDRV_PCM_STATE_RUNNING ((snd_pcm_state_t) 3) 237 #define SNDRV_PCM_STATE_XRUN ((snd_pcm_state_t) 4) 238 #define SNDRV_PCM_STATE_DRAINING ((snd_pcm_state_t) 5) 239 #define SNDRV_PCM_STATE_PAUSED ((snd_pcm_state_t) 6) 240 #define SNDRV_PCM_STATE_SUSPENDED ((snd_pcm_state_t) 7) 241 #define SNDRV_PCM_STATE_DISCONNECTED ((snd_pcm_state_t) 8) 242 #define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED 243 enum { 244 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000, 245 SNDRV_PCM_MMAP_OFFSET_STATUS_OLD = 0x80000000, 246 SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD = 0x81000000, 247 SNDRV_PCM_MMAP_OFFSET_STATUS_NEW = 0x82000000, 248 SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW = 0x83000000, 249 #ifdef __SND_STRUCT_TIME64 250 SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_NEW, 251 SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW, 252 #else 253 SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_OLD, 254 SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD, 255 #endif 256 }; 257 union snd_pcm_sync_id { 258 unsigned char id[16]; 259 unsigned short id16[8]; 260 unsigned int id32[4]; 261 }; 262 struct snd_pcm_info { 263 unsigned int device; 264 unsigned int subdevice; 265 int stream; 266 int card; 267 unsigned char id[64]; 268 unsigned char name[80]; 269 unsigned char subname[32]; 270 int dev_class; 271 int dev_subclass; 272 unsigned int subdevices_count; 273 unsigned int subdevices_avail; 274 union snd_pcm_sync_id sync; 275 unsigned char reserved[64]; 276 }; 277 typedef int snd_pcm_hw_param_t; 278 #define SNDRV_PCM_HW_PARAM_ACCESS 0 279 #define SNDRV_PCM_HW_PARAM_FORMAT 1 280 #define SNDRV_PCM_HW_PARAM_SUBFORMAT 2 281 #define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS 282 #define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT 283 #define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8 284 #define SNDRV_PCM_HW_PARAM_FRAME_BITS 9 285 #define SNDRV_PCM_HW_PARAM_CHANNELS 10 286 #define SNDRV_PCM_HW_PARAM_RATE 11 287 #define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12 288 #define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13 289 #define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14 290 #define SNDRV_PCM_HW_PARAM_PERIODS 15 291 #define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16 292 #define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17 293 #define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18 294 #define SNDRV_PCM_HW_PARAM_TICK_TIME 19 295 #define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS 296 #define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME 297 #define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1 << 0) 298 #define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1 << 1) 299 #define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1 << 2) 300 struct snd_interval { 301 unsigned int min, max; 302 unsigned int openmin : 1, openmax : 1, integer : 1, empty : 1; 303 }; 304 #define SNDRV_MASK_MAX 256 305 struct snd_mask { 306 __u32 bits[(SNDRV_MASK_MAX + 31) / 32]; 307 }; 308 struct snd_pcm_hw_params { 309 unsigned int flags; 310 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK - SNDRV_PCM_HW_PARAM_FIRST_MASK + 1]; 311 struct snd_mask mres[5]; 312 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL - SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1]; 313 struct snd_interval ires[9]; 314 unsigned int rmask; 315 unsigned int cmask; 316 unsigned int info; 317 unsigned int msbits; 318 unsigned int rate_num; 319 unsigned int rate_den; 320 snd_pcm_uframes_t fifo_size; 321 unsigned char reserved[64]; 322 }; 323 enum { 324 SNDRV_PCM_TSTAMP_NONE = 0, 325 SNDRV_PCM_TSTAMP_ENABLE, 326 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE, 327 }; 328 struct snd_pcm_sw_params { 329 int tstamp_mode; 330 unsigned int period_step; 331 unsigned int sleep_min; 332 snd_pcm_uframes_t avail_min; 333 snd_pcm_uframes_t xfer_align; 334 snd_pcm_uframes_t start_threshold; 335 snd_pcm_uframes_t stop_threshold; 336 snd_pcm_uframes_t silence_threshold; 337 snd_pcm_uframes_t silence_size; 338 snd_pcm_uframes_t boundary; 339 unsigned int proto; 340 unsigned int tstamp_type; 341 unsigned char reserved[56]; 342 }; 343 struct snd_pcm_channel_info { 344 unsigned int channel; 345 __kernel_off_t offset; 346 unsigned int first; 347 unsigned int step; 348 }; 349 enum { 350 SNDRV_PCM_AUDIO_TSTAMP_TYPE_COMPAT = 0, 351 SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT = 1, 352 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK = 2, 353 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ABSOLUTE = 3, 354 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ESTIMATED = 4, 355 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED = 5, 356 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LAST = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED 357 }; 358 typedef struct { 359 unsigned char pad[sizeof(time_t) - sizeof(int)]; 360 } __time_pad; 361 struct snd_pcm_status { 362 snd_pcm_state_t state; 363 __time_pad pad1; 364 struct timespec trigger_tstamp; 365 struct timespec tstamp; 366 snd_pcm_uframes_t appl_ptr; 367 snd_pcm_uframes_t hw_ptr; 368 snd_pcm_sframes_t delay; 369 snd_pcm_uframes_t avail; 370 snd_pcm_uframes_t avail_max; 371 snd_pcm_uframes_t overrange; 372 snd_pcm_state_t suspended_state; 373 __u32 audio_tstamp_data; 374 struct timespec audio_tstamp; 375 struct timespec driver_tstamp; 376 __u32 audio_tstamp_accuracy; 377 unsigned char reserved[52 - 2 * sizeof(struct timespec)]; 378 }; 379 #ifdef __SND_STRUCT_TIME64 380 #define __snd_pcm_mmap_status64 snd_pcm_mmap_status 381 #define __snd_pcm_mmap_control64 snd_pcm_mmap_control 382 #define __snd_pcm_sync_ptr64 snd_pcm_sync_ptr 383 #define __snd_timespec64 timespec 384 struct __snd_timespec { 385 __s32 tv_sec; 386 __s32 tv_nsec; 387 }; 388 #else 389 #define __snd_pcm_mmap_status snd_pcm_mmap_status 390 #define __snd_pcm_mmap_control snd_pcm_mmap_control 391 #define __snd_pcm_sync_ptr snd_pcm_sync_ptr 392 #define __snd_timespec timespec 393 struct __snd_timespec64 { 394 __s64 tv_sec; 395 __s64 tv_nsec; 396 }; 397 #endif 398 struct __snd_pcm_mmap_status { 399 snd_pcm_state_t state; 400 int pad1; 401 snd_pcm_uframes_t hw_ptr; 402 struct __snd_timespec tstamp; 403 snd_pcm_state_t suspended_state; 404 struct __snd_timespec audio_tstamp; 405 }; 406 struct __snd_pcm_mmap_control { 407 snd_pcm_uframes_t appl_ptr; 408 snd_pcm_uframes_t avail_min; 409 }; 410 #define SNDRV_PCM_SYNC_PTR_HWSYNC (1 << 0) 411 #define SNDRV_PCM_SYNC_PTR_APPL (1 << 1) 412 #define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1 << 2) 413 struct __snd_pcm_sync_ptr { 414 unsigned int flags; 415 union { 416 struct __snd_pcm_mmap_status status; 417 unsigned char reserved[64]; 418 } s; 419 union { 420 struct __snd_pcm_mmap_control control; 421 unsigned char reserved[64]; 422 } c; 423 }; 424 #if defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN) 425 typedef char __pad_before_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)]; 426 typedef char __pad_after_uframe[0]; 427 #endif 428 #if defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN) 429 typedef char __pad_before_uframe[0]; 430 typedef char __pad_after_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)]; 431 #endif 432 struct __snd_pcm_mmap_status64 { 433 snd_pcm_state_t state; 434 __u32 pad1; 435 __pad_before_uframe __pad1; 436 snd_pcm_uframes_t hw_ptr; 437 __pad_after_uframe __pad2; 438 struct __snd_timespec64 tstamp; 439 snd_pcm_state_t suspended_state; 440 __u32 pad3; 441 struct __snd_timespec64 audio_tstamp; 442 }; 443 struct __snd_pcm_mmap_control64 { 444 __pad_before_uframe __pad1; 445 snd_pcm_uframes_t appl_ptr; 446 __pad_before_uframe __pad2; 447 __pad_before_uframe __pad3; 448 snd_pcm_uframes_t avail_min; 449 __pad_after_uframe __pad4; 450 }; 451 struct __snd_pcm_sync_ptr64 { 452 __u32 flags; 453 __u32 pad1; 454 union { 455 struct __snd_pcm_mmap_status64 status; 456 unsigned char reserved[64]; 457 } s; 458 union { 459 struct __snd_pcm_mmap_control64 control; 460 unsigned char reserved[64]; 461 } c; 462 }; 463 struct snd_xferi { 464 snd_pcm_sframes_t result; 465 void * buf; 466 snd_pcm_uframes_t frames; 467 }; 468 struct snd_xfern { 469 snd_pcm_sframes_t result; 470 void * * bufs; 471 snd_pcm_uframes_t frames; 472 }; 473 enum { 474 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0, 475 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC, 476 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW, 477 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW, 478 }; 479 enum { 480 SNDRV_CHMAP_UNKNOWN = 0, 481 SNDRV_CHMAP_NA, 482 SNDRV_CHMAP_MONO, 483 SNDRV_CHMAP_FL, 484 SNDRV_CHMAP_FR, 485 SNDRV_CHMAP_RL, 486 SNDRV_CHMAP_RR, 487 SNDRV_CHMAP_FC, 488 SNDRV_CHMAP_LFE, 489 SNDRV_CHMAP_SL, 490 SNDRV_CHMAP_SR, 491 SNDRV_CHMAP_RC, 492 SNDRV_CHMAP_FLC, 493 SNDRV_CHMAP_FRC, 494 SNDRV_CHMAP_RLC, 495 SNDRV_CHMAP_RRC, 496 SNDRV_CHMAP_FLW, 497 SNDRV_CHMAP_FRW, 498 SNDRV_CHMAP_FLH, 499 SNDRV_CHMAP_FCH, 500 SNDRV_CHMAP_FRH, 501 SNDRV_CHMAP_TC, 502 SNDRV_CHMAP_TFL, 503 SNDRV_CHMAP_TFR, 504 SNDRV_CHMAP_TFC, 505 SNDRV_CHMAP_TRL, 506 SNDRV_CHMAP_TRR, 507 SNDRV_CHMAP_TRC, 508 SNDRV_CHMAP_TFLC, 509 SNDRV_CHMAP_TFRC, 510 SNDRV_CHMAP_TSL, 511 SNDRV_CHMAP_TSR, 512 SNDRV_CHMAP_LLFE, 513 SNDRV_CHMAP_RLFE, 514 SNDRV_CHMAP_BC, 515 SNDRV_CHMAP_BLC, 516 SNDRV_CHMAP_BRC, 517 SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC, 518 }; 519 #define SNDRV_CHMAP_POSITION_MASK 0xffff 520 #define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16) 521 #define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16) 522 #define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int) 523 #define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info) 524 #define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int) 525 #define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int) 526 #define SNDRV_PCM_IOCTL_USER_PVERSION _IOW('A', 0x04, int) 527 #define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params) 528 #define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params) 529 #define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12) 530 #define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params) 531 #define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status) 532 #define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t) 533 #define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22) 534 #define __SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct __snd_pcm_sync_ptr) 535 #define __SNDRV_PCM_IOCTL_SYNC_PTR64 _IOWR('A', 0x23, struct __snd_pcm_sync_ptr64) 536 #define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr) 537 #define SNDRV_PCM_IOCTL_STATUS_EXT _IOWR('A', 0x24, struct snd_pcm_status) 538 #define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info) 539 #define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40) 540 #define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41) 541 #define SNDRV_PCM_IOCTL_START _IO('A', 0x42) 542 #define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43) 543 #define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44) 544 #define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int) 545 #define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t) 546 #define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47) 547 #define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48) 548 #define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t) 549 #define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi) 550 #define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi) 551 #define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern) 552 #define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern) 553 #define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int) 554 #define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61) 555 #define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 2) 556 enum { 557 SNDRV_RAWMIDI_STREAM_OUTPUT = 0, 558 SNDRV_RAWMIDI_STREAM_INPUT, 559 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT, 560 }; 561 #define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001 562 #define SNDRV_RAWMIDI_INFO_INPUT 0x00000002 563 #define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004 564 struct snd_rawmidi_info { 565 unsigned int device; 566 unsigned int subdevice; 567 int stream; 568 int card; 569 unsigned int flags; 570 unsigned char id[64]; 571 unsigned char name[80]; 572 unsigned char subname[32]; 573 unsigned int subdevices_count; 574 unsigned int subdevices_avail; 575 unsigned char reserved[64]; 576 }; 577 #define SNDRV_RAWMIDI_MODE_FRAMING_MASK (7 << 0) 578 #define SNDRV_RAWMIDI_MODE_FRAMING_SHIFT 0 579 #define SNDRV_RAWMIDI_MODE_FRAMING_NONE (0 << 0) 580 #define SNDRV_RAWMIDI_MODE_FRAMING_TSTAMP (1 << 0) 581 #define SNDRV_RAWMIDI_MODE_CLOCK_MASK (7 << 3) 582 #define SNDRV_RAWMIDI_MODE_CLOCK_SHIFT 3 583 #define SNDRV_RAWMIDI_MODE_CLOCK_NONE (0 << 3) 584 #define SNDRV_RAWMIDI_MODE_CLOCK_REALTIME (1 << 3) 585 #define SNDRV_RAWMIDI_MODE_CLOCK_MONOTONIC (2 << 3) 586 #define SNDRV_RAWMIDI_MODE_CLOCK_MONOTONIC_RAW (3 << 3) 587 #define SNDRV_RAWMIDI_FRAMING_DATA_LENGTH 16 588 struct snd_rawmidi_framing_tstamp { 589 __u8 frame_type; 590 __u8 length; 591 __u8 reserved[2]; 592 __u32 tv_nsec; 593 __u64 tv_sec; 594 __u8 data[SNDRV_RAWMIDI_FRAMING_DATA_LENGTH]; 595 } __attribute__((packed)); 596 struct snd_rawmidi_params { 597 int stream; 598 size_t buffer_size; 599 size_t avail_min; 600 unsigned int no_active_sensing : 1; 601 unsigned int mode; 602 unsigned char reserved[12]; 603 }; 604 struct snd_rawmidi_status { 605 int stream; 606 __time_pad pad1; 607 struct timespec tstamp; 608 size_t avail; 609 size_t xruns; 610 unsigned char reserved[16]; 611 }; 612 #define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int) 613 #define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info) 614 #define SNDRV_RAWMIDI_IOCTL_USER_PVERSION _IOW('W', 0x02, int) 615 #define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params) 616 #define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status) 617 #define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int) 618 #define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int) 619 #define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7) 620 enum { 621 SNDRV_TIMER_CLASS_NONE = - 1, 622 SNDRV_TIMER_CLASS_SLAVE = 0, 623 SNDRV_TIMER_CLASS_GLOBAL, 624 SNDRV_TIMER_CLASS_CARD, 625 SNDRV_TIMER_CLASS_PCM, 626 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM, 627 }; 628 enum { 629 SNDRV_TIMER_SCLASS_NONE = 0, 630 SNDRV_TIMER_SCLASS_APPLICATION, 631 SNDRV_TIMER_SCLASS_SEQUENCER, 632 SNDRV_TIMER_SCLASS_OSS_SEQUENCER, 633 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER, 634 }; 635 #define SNDRV_TIMER_GLOBAL_SYSTEM 0 636 #define SNDRV_TIMER_GLOBAL_RTC 1 637 #define SNDRV_TIMER_GLOBAL_HPET 2 638 #define SNDRV_TIMER_GLOBAL_HRTIMER 3 639 #define SNDRV_TIMER_FLG_SLAVE (1 << 0) 640 struct snd_timer_id { 641 int dev_class; 642 int dev_sclass; 643 int card; 644 int device; 645 int subdevice; 646 }; 647 struct snd_timer_ginfo { 648 struct snd_timer_id tid; 649 unsigned int flags; 650 int card; 651 unsigned char id[64]; 652 unsigned char name[80]; 653 unsigned long reserved0; 654 unsigned long resolution; 655 unsigned long resolution_min; 656 unsigned long resolution_max; 657 unsigned int clients; 658 unsigned char reserved[32]; 659 }; 660 struct snd_timer_gparams { 661 struct snd_timer_id tid; 662 unsigned long period_num; 663 unsigned long period_den; 664 unsigned char reserved[32]; 665 }; 666 struct snd_timer_gstatus { 667 struct snd_timer_id tid; 668 unsigned long resolution; 669 unsigned long resolution_num; 670 unsigned long resolution_den; 671 unsigned char reserved[32]; 672 }; 673 struct snd_timer_select { 674 struct snd_timer_id id; 675 unsigned char reserved[32]; 676 }; 677 struct snd_timer_info { 678 unsigned int flags; 679 int card; 680 unsigned char id[64]; 681 unsigned char name[80]; 682 unsigned long reserved0; 683 unsigned long resolution; 684 unsigned char reserved[64]; 685 }; 686 #define SNDRV_TIMER_PSFLG_AUTO (1 << 0) 687 #define SNDRV_TIMER_PSFLG_EXCLUSIVE (1 << 1) 688 #define SNDRV_TIMER_PSFLG_EARLY_EVENT (1 << 2) 689 struct snd_timer_params { 690 unsigned int flags; 691 unsigned int ticks; 692 unsigned int queue_size; 693 unsigned int reserved0; 694 unsigned int filter; 695 unsigned char reserved[60]; 696 }; 697 struct snd_timer_status { 698 struct timespec tstamp; 699 unsigned int resolution; 700 unsigned int lost; 701 unsigned int overrun; 702 unsigned int queue; 703 unsigned char reserved[64]; 704 }; 705 #define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int) 706 #define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id) 707 #define SNDRV_TIMER_IOCTL_TREAD_OLD _IOW('T', 0x02, int) 708 #define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo) 709 #define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams) 710 #define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus) 711 #define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select) 712 #define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info) 713 #define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params) 714 #define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status) 715 #define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0) 716 #define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1) 717 #define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2) 718 #define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3) 719 #define SNDRV_TIMER_IOCTL_TREAD64 _IOW('T', 0xa4, int) 720 #if __BITS_PER_LONG == 64 721 #define SNDRV_TIMER_IOCTL_TREAD SNDRV_TIMER_IOCTL_TREAD_OLD 722 #else 723 #define SNDRV_TIMER_IOCTL_TREAD ((sizeof(__kernel_long_t) >= sizeof(time_t)) ? SNDRV_TIMER_IOCTL_TREAD_OLD : SNDRV_TIMER_IOCTL_TREAD64) 724 #endif 725 struct snd_timer_read { 726 unsigned int resolution; 727 unsigned int ticks; 728 }; 729 enum { 730 SNDRV_TIMER_EVENT_RESOLUTION = 0, 731 SNDRV_TIMER_EVENT_TICK, 732 SNDRV_TIMER_EVENT_START, 733 SNDRV_TIMER_EVENT_STOP, 734 SNDRV_TIMER_EVENT_CONTINUE, 735 SNDRV_TIMER_EVENT_PAUSE, 736 SNDRV_TIMER_EVENT_EARLY, 737 SNDRV_TIMER_EVENT_SUSPEND, 738 SNDRV_TIMER_EVENT_RESUME, 739 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10, 740 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10, 741 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10, 742 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10, 743 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10, 744 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10, 745 }; 746 struct snd_timer_tread { 747 int event; 748 __time_pad pad1; 749 struct timespec tstamp; 750 unsigned int val; 751 __time_pad pad2; 752 }; 753 #define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 8) 754 struct snd_ctl_card_info { 755 int card; 756 int pad; 757 unsigned char id[16]; 758 unsigned char driver[16]; 759 unsigned char name[32]; 760 unsigned char longname[80]; 761 unsigned char reserved_[16]; 762 unsigned char mixername[80]; 763 unsigned char components[128]; 764 }; 765 typedef int __bitwise snd_ctl_elem_type_t; 766 #define SNDRV_CTL_ELEM_TYPE_NONE ((snd_ctl_elem_type_t) 0) 767 #define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((snd_ctl_elem_type_t) 1) 768 #define SNDRV_CTL_ELEM_TYPE_INTEGER ((snd_ctl_elem_type_t) 2) 769 #define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((snd_ctl_elem_type_t) 3) 770 #define SNDRV_CTL_ELEM_TYPE_BYTES ((snd_ctl_elem_type_t) 4) 771 #define SNDRV_CTL_ELEM_TYPE_IEC958 ((snd_ctl_elem_type_t) 5) 772 #define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((snd_ctl_elem_type_t) 6) 773 #define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64 774 typedef int __bitwise snd_ctl_elem_iface_t; 775 #define SNDRV_CTL_ELEM_IFACE_CARD ((snd_ctl_elem_iface_t) 0) 776 #define SNDRV_CTL_ELEM_IFACE_HWDEP ((snd_ctl_elem_iface_t) 1) 777 #define SNDRV_CTL_ELEM_IFACE_MIXER ((snd_ctl_elem_iface_t) 2) 778 #define SNDRV_CTL_ELEM_IFACE_PCM ((snd_ctl_elem_iface_t) 3) 779 #define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((snd_ctl_elem_iface_t) 4) 780 #define SNDRV_CTL_ELEM_IFACE_TIMER ((snd_ctl_elem_iface_t) 5) 781 #define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((snd_ctl_elem_iface_t) 6) 782 #define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER 783 #define SNDRV_CTL_ELEM_ACCESS_READ (1 << 0) 784 #define SNDRV_CTL_ELEM_ACCESS_WRITE (1 << 1) 785 #define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE) 786 #define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1 << 2) 787 #define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1 << 4) 788 #define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1 << 5) 789 #define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ | SNDRV_CTL_ELEM_ACCESS_TLV_WRITE) 790 #define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1 << 6) 791 #define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1 << 8) 792 #define SNDRV_CTL_ELEM_ACCESS_LOCK (1 << 9) 793 #define SNDRV_CTL_ELEM_ACCESS_OWNER (1 << 10) 794 #define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1 << 28) 795 #define SNDRV_CTL_ELEM_ACCESS_USER (1 << 29) 796 #define SNDRV_CTL_POWER_D0 0x0000 797 #define SNDRV_CTL_POWER_D1 0x0100 798 #define SNDRV_CTL_POWER_D2 0x0200 799 #define SNDRV_CTL_POWER_D3 0x0300 800 #define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3 | 0x0000) 801 #define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3 | 0x0001) 802 #define SNDRV_CTL_ELEM_ID_NAME_MAXLEN 44 803 struct snd_ctl_elem_id { 804 unsigned int numid; 805 snd_ctl_elem_iface_t iface; 806 unsigned int device; 807 unsigned int subdevice; 808 unsigned char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; 809 unsigned int index; 810 }; 811 struct snd_ctl_elem_list { 812 unsigned int offset; 813 unsigned int space; 814 unsigned int used; 815 unsigned int count; 816 struct snd_ctl_elem_id * pids; 817 unsigned char reserved[50]; 818 }; 819 struct snd_ctl_elem_info { 820 struct snd_ctl_elem_id id; 821 snd_ctl_elem_type_t type; 822 unsigned int access; 823 unsigned int count; 824 __kernel_pid_t owner; 825 union { 826 struct { 827 long min; 828 long max; 829 long step; 830 } integer; 831 struct { 832 long long min; 833 long long max; 834 long long step; 835 } integer64; 836 struct { 837 unsigned int items; 838 unsigned int item; 839 char name[64]; 840 __u64 names_ptr; 841 unsigned int names_length; 842 } enumerated; 843 unsigned char reserved[128]; 844 } value; 845 unsigned char reserved[64]; 846 }; 847 struct snd_ctl_elem_value { 848 struct snd_ctl_elem_id id; 849 unsigned int indirect : 1; 850 union { 851 union { 852 long value[128]; 853 long * value_ptr; 854 } integer; 855 union { 856 long long value[64]; 857 long long * value_ptr; 858 } integer64; 859 union { 860 unsigned int item[128]; 861 unsigned int * item_ptr; 862 } enumerated; 863 union { 864 unsigned char data[512]; 865 unsigned char * data_ptr; 866 } bytes; 867 struct snd_aes_iec958 iec958; 868 } value; 869 unsigned char reserved[128]; 870 }; 871 struct snd_ctl_tlv { 872 unsigned int numid; 873 unsigned int length; 874 unsigned int tlv[0]; 875 }; 876 #define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int) 877 #define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info) 878 #define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list) 879 #define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info) 880 #define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value) 881 #define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value) 882 #define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id) 883 #define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id) 884 #define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int) 885 #define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info) 886 #define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info) 887 #define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id) 888 #define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv) 889 #define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv) 890 #define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv) 891 #define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int) 892 #define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info) 893 #define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int) 894 #define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info) 895 #define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int) 896 #define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int) 897 #define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info) 898 #define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int) 899 #define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int) 900 #define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int) 901 enum sndrv_ctl_event_type { 902 SNDRV_CTL_EVENT_ELEM = 0, 903 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM, 904 }; 905 #define SNDRV_CTL_EVENT_MASK_VALUE (1 << 0) 906 #define SNDRV_CTL_EVENT_MASK_INFO (1 << 1) 907 #define SNDRV_CTL_EVENT_MASK_ADD (1 << 2) 908 #define SNDRV_CTL_EVENT_MASK_TLV (1 << 3) 909 #define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) 910 struct snd_ctl_event { 911 int type; 912 union { 913 struct { 914 unsigned int mask; 915 struct snd_ctl_elem_id id; 916 } elem; 917 unsigned char data8[60]; 918 } data; 919 }; 920 #define SNDRV_CTL_NAME_NONE "" 921 #define SNDRV_CTL_NAME_PLAYBACK "Playback " 922 #define SNDRV_CTL_NAME_CAPTURE "Capture " 923 #define SNDRV_CTL_NAME_IEC958_NONE "" 924 #define SNDRV_CTL_NAME_IEC958_SWITCH "Switch" 925 #define SNDRV_CTL_NAME_IEC958_VOLUME "Volume" 926 #define SNDRV_CTL_NAME_IEC958_DEFAULT "Default" 927 #define SNDRV_CTL_NAME_IEC958_MASK "Mask" 928 #define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask" 929 #define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask" 930 #define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream" 931 #define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_ ##direction SNDRV_CTL_NAME_IEC958_ ##what 932 #endif 933