1 /* 2 * This file is auto-generated. Modifications will be lost. 3 * 4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/ 5 * for more information. 6 */ 7 #ifndef __SOUND_ASOUND_H 8 #define __SOUND_ASOUND_H 9 #ifdef __linux__ 10 #include <linux/types.h> 11 #include <asm/byteorder.h> 12 #else 13 #include <endian.h> 14 #include <sys/ioctl.h> 15 #endif 16 #include <stdlib.h> 17 #include <time.h> 18 #define SNDRV_PROTOCOL_VERSION(major,minor,subminor) (((major) << 16) | ((minor) << 8) | (subminor)) 19 #define SNDRV_PROTOCOL_MAJOR(version) (((version) >> 16) & 0xffff) 20 #define SNDRV_PROTOCOL_MINOR(version) (((version) >> 8) & 0xff) 21 #define SNDRV_PROTOCOL_MICRO(version) ((version) & 0xff) 22 #define SNDRV_PROTOCOL_INCOMPATIBLE(kversion,uversion) (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion))) 23 #define AES_IEC958_STATUS_SIZE 24 24 struct snd_aes_iec958 { 25 unsigned char status[AES_IEC958_STATUS_SIZE]; 26 unsigned char subcode[147]; 27 unsigned char pad; 28 unsigned char dig_subframe[4]; 29 }; 30 struct snd_cea_861_aud_if { 31 unsigned char db1_ct_cc; 32 unsigned char db2_sf_ss; 33 unsigned char db3; 34 unsigned char db4_ca; 35 unsigned char db5_dminh_lsv; 36 }; 37 #define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1) 38 enum { 39 SNDRV_HWDEP_IFACE_OPL2 = 0, 40 SNDRV_HWDEP_IFACE_OPL3, 41 SNDRV_HWDEP_IFACE_OPL4, 42 SNDRV_HWDEP_IFACE_SB16CSP, 43 SNDRV_HWDEP_IFACE_EMU10K1, 44 SNDRV_HWDEP_IFACE_YSS225, 45 SNDRV_HWDEP_IFACE_ICS2115, 46 SNDRV_HWDEP_IFACE_SSCAPE, 47 SNDRV_HWDEP_IFACE_VX, 48 SNDRV_HWDEP_IFACE_MIXART, 49 SNDRV_HWDEP_IFACE_USX2Y, 50 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, 51 SNDRV_HWDEP_IFACE_BLUETOOTH, 52 SNDRV_HWDEP_IFACE_USX2Y_PCM, 53 SNDRV_HWDEP_IFACE_PCXHR, 54 SNDRV_HWDEP_IFACE_SB_RC, 55 SNDRV_HWDEP_IFACE_HDA, 56 SNDRV_HWDEP_IFACE_USB_STREAM, 57 SNDRV_HWDEP_IFACE_FW_DICE, 58 SNDRV_HWDEP_IFACE_FW_FIREWORKS, 59 SNDRV_HWDEP_IFACE_FW_BEBOB, 60 SNDRV_HWDEP_IFACE_FW_OXFW, 61 SNDRV_HWDEP_IFACE_FW_DIGI00X, 62 SNDRV_HWDEP_IFACE_FW_TASCAM, 63 SNDRV_HWDEP_IFACE_LINE6, 64 SNDRV_HWDEP_IFACE_FW_MOTU, 65 SNDRV_HWDEP_IFACE_FW_FIREFACE, 66 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_FIREFACE 67 }; 68 struct snd_hwdep_info { 69 unsigned int device; 70 int card; 71 unsigned char id[64]; 72 unsigned char name[80]; 73 int iface; 74 unsigned char reserved[64]; 75 }; 76 struct snd_hwdep_dsp_status { 77 unsigned int version; 78 unsigned char id[32]; 79 unsigned int num_dsps; 80 unsigned int dsp_loaded; 81 unsigned int chip_ready; 82 unsigned char reserved[16]; 83 }; 84 struct snd_hwdep_dsp_image { 85 unsigned int index; 86 unsigned char name[64]; 87 unsigned char * image; 88 size_t length; 89 unsigned long driver_data; 90 }; 91 #define SNDRV_HWDEP_IOCTL_PVERSION _IOR('H', 0x00, int) 92 #define SNDRV_HWDEP_IOCTL_INFO _IOR('H', 0x01, struct snd_hwdep_info) 93 #define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status) 94 #define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image) 95 #define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 15) 96 typedef unsigned long snd_pcm_uframes_t; 97 typedef signed long snd_pcm_sframes_t; 98 enum { 99 SNDRV_PCM_CLASS_GENERIC = 0, 100 SNDRV_PCM_CLASS_MULTI, 101 SNDRV_PCM_CLASS_MODEM, 102 SNDRV_PCM_CLASS_DIGITIZER, 103 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER, 104 }; 105 enum { 106 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, 107 SNDRV_PCM_SUBCLASS_MULTI_MIX, 108 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX, 109 }; 110 enum { 111 SNDRV_PCM_STREAM_PLAYBACK = 0, 112 SNDRV_PCM_STREAM_CAPTURE, 113 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE, 114 }; 115 typedef int __bitwise snd_pcm_access_t; 116 #define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((snd_pcm_access_t) 0) 117 #define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((snd_pcm_access_t) 1) 118 #define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((snd_pcm_access_t) 2) 119 #define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((snd_pcm_access_t) 3) 120 #define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((snd_pcm_access_t) 4) 121 #define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED 122 typedef int __bitwise snd_pcm_format_t; 123 #define SNDRV_PCM_FORMAT_S8 ((snd_pcm_format_t) 0) 124 #define SNDRV_PCM_FORMAT_U8 ((snd_pcm_format_t) 1) 125 #define SNDRV_PCM_FORMAT_S16_LE ((snd_pcm_format_t) 2) 126 #define SNDRV_PCM_FORMAT_S16_BE ((snd_pcm_format_t) 3) 127 #define SNDRV_PCM_FORMAT_U16_LE ((snd_pcm_format_t) 4) 128 #define SNDRV_PCM_FORMAT_U16_BE ((snd_pcm_format_t) 5) 129 #define SNDRV_PCM_FORMAT_S24_LE ((snd_pcm_format_t) 6) 130 #define SNDRV_PCM_FORMAT_S24_BE ((snd_pcm_format_t) 7) 131 #define SNDRV_PCM_FORMAT_U24_LE ((snd_pcm_format_t) 8) 132 #define SNDRV_PCM_FORMAT_U24_BE ((snd_pcm_format_t) 9) 133 #define SNDRV_PCM_FORMAT_S32_LE ((snd_pcm_format_t) 10) 134 #define SNDRV_PCM_FORMAT_S32_BE ((snd_pcm_format_t) 11) 135 #define SNDRV_PCM_FORMAT_U32_LE ((snd_pcm_format_t) 12) 136 #define SNDRV_PCM_FORMAT_U32_BE ((snd_pcm_format_t) 13) 137 #define SNDRV_PCM_FORMAT_FLOAT_LE ((snd_pcm_format_t) 14) 138 #define SNDRV_PCM_FORMAT_FLOAT_BE ((snd_pcm_format_t) 15) 139 #define SNDRV_PCM_FORMAT_FLOAT64_LE ((snd_pcm_format_t) 16) 140 #define SNDRV_PCM_FORMAT_FLOAT64_BE ((snd_pcm_format_t) 17) 141 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((snd_pcm_format_t) 18) 142 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((snd_pcm_format_t) 19) 143 #define SNDRV_PCM_FORMAT_MU_LAW ((snd_pcm_format_t) 20) 144 #define SNDRV_PCM_FORMAT_A_LAW ((snd_pcm_format_t) 21) 145 #define SNDRV_PCM_FORMAT_IMA_ADPCM ((snd_pcm_format_t) 22) 146 #define SNDRV_PCM_FORMAT_MPEG ((snd_pcm_format_t) 23) 147 #define SNDRV_PCM_FORMAT_GSM ((snd_pcm_format_t) 24) 148 #define SNDRV_PCM_FORMAT_S20_LE ((snd_pcm_format_t) 25) 149 #define SNDRV_PCM_FORMAT_S20_BE ((snd_pcm_format_t) 26) 150 #define SNDRV_PCM_FORMAT_U20_LE ((snd_pcm_format_t) 27) 151 #define SNDRV_PCM_FORMAT_U20_BE ((snd_pcm_format_t) 28) 152 #define SNDRV_PCM_FORMAT_SPECIAL ((snd_pcm_format_t) 31) 153 #define SNDRV_PCM_FORMAT_S24_3LE ((snd_pcm_format_t) 32) 154 #define SNDRV_PCM_FORMAT_S24_3BE ((snd_pcm_format_t) 33) 155 #define SNDRV_PCM_FORMAT_U24_3LE ((snd_pcm_format_t) 34) 156 #define SNDRV_PCM_FORMAT_U24_3BE ((snd_pcm_format_t) 35) 157 #define SNDRV_PCM_FORMAT_S20_3LE ((snd_pcm_format_t) 36) 158 #define SNDRV_PCM_FORMAT_S20_3BE ((snd_pcm_format_t) 37) 159 #define SNDRV_PCM_FORMAT_U20_3LE ((snd_pcm_format_t) 38) 160 #define SNDRV_PCM_FORMAT_U20_3BE ((snd_pcm_format_t) 39) 161 #define SNDRV_PCM_FORMAT_S18_3LE ((snd_pcm_format_t) 40) 162 #define SNDRV_PCM_FORMAT_S18_3BE ((snd_pcm_format_t) 41) 163 #define SNDRV_PCM_FORMAT_U18_3LE ((snd_pcm_format_t) 42) 164 #define SNDRV_PCM_FORMAT_U18_3BE ((snd_pcm_format_t) 43) 165 #define SNDRV_PCM_FORMAT_G723_24 ((snd_pcm_format_t) 44) 166 #define SNDRV_PCM_FORMAT_G723_24_1B ((snd_pcm_format_t) 45) 167 #define SNDRV_PCM_FORMAT_G723_40 ((snd_pcm_format_t) 46) 168 #define SNDRV_PCM_FORMAT_G723_40_1B ((snd_pcm_format_t) 47) 169 #define SNDRV_PCM_FORMAT_DSD_U8 ((snd_pcm_format_t) 48) 170 #define SNDRV_PCM_FORMAT_DSD_U16_LE ((snd_pcm_format_t) 49) 171 #define SNDRV_PCM_FORMAT_DSD_U32_LE ((snd_pcm_format_t) 50) 172 #define SNDRV_PCM_FORMAT_DSD_U16_BE ((snd_pcm_format_t) 51) 173 #define SNDRV_PCM_FORMAT_DSD_U32_BE ((snd_pcm_format_t) 52) 174 #define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U32_BE 175 #define SNDRV_PCM_FORMAT_FIRST SNDRV_PCM_FORMAT_S8 176 #ifdef SNDRV_LITTLE_ENDIAN 177 #define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE 178 #define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE 179 #define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE 180 #define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE 181 #define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE 182 #define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE 183 #define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE 184 #define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE 185 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE 186 #define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_LE 187 #define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_LE 188 #endif 189 #ifdef SNDRV_BIG_ENDIAN 190 #define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE 191 #define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE 192 #define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE 193 #define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE 194 #define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE 195 #define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE 196 #define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE 197 #define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE 198 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE 199 #define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_BE 200 #define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_BE 201 #endif 202 typedef int __bitwise snd_pcm_subformat_t; 203 #define SNDRV_PCM_SUBFORMAT_STD ((snd_pcm_subformat_t) 0) 204 #define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD 205 #define SNDRV_PCM_INFO_MMAP 0x00000001 206 #define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 207 #define SNDRV_PCM_INFO_DOUBLE 0x00000004 208 #define SNDRV_PCM_INFO_BATCH 0x00000010 209 #define SNDRV_PCM_INFO_SYNC_APPLPTR 0x00000020 210 #define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 211 #define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 212 #define SNDRV_PCM_INFO_COMPLEX 0x00000400 213 #define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 214 #define SNDRV_PCM_INFO_OVERRANGE 0x00020000 215 #define SNDRV_PCM_INFO_RESUME 0x00040000 216 #define SNDRV_PCM_INFO_PAUSE 0x00080000 217 #define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 218 #define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 219 #define SNDRV_PCM_INFO_SYNC_START 0x00400000 220 #define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000 221 #define SNDRV_PCM_INFO_HAS_WALL_CLOCK 0x01000000 222 #define SNDRV_PCM_INFO_HAS_LINK_ATIME 0x01000000 223 #define SNDRV_PCM_INFO_HAS_LINK_ABSOLUTE_ATIME 0x02000000 224 #define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME 0x04000000 225 #define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000 226 #define SNDRV_PCM_INFO_EXPLICIT_SYNC 0x10000000 227 #define SNDRV_PCM_INFO_NO_REWINDS 0x20000000 228 #define SNDRV_PCM_INFO_DRAIN_TRIGGER 0x40000000 229 #define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000 230 #if __BITS_PER_LONG == 32 && defined(__USE_TIME_BITS64) 231 #define __SND_STRUCT_TIME64 232 #endif 233 typedef int __bitwise snd_pcm_state_t; 234 #define SNDRV_PCM_STATE_OPEN ((snd_pcm_state_t) 0) 235 #define SNDRV_PCM_STATE_SETUP ((snd_pcm_state_t) 1) 236 #define SNDRV_PCM_STATE_PREPARED ((snd_pcm_state_t) 2) 237 #define SNDRV_PCM_STATE_RUNNING ((snd_pcm_state_t) 3) 238 #define SNDRV_PCM_STATE_XRUN ((snd_pcm_state_t) 4) 239 #define SNDRV_PCM_STATE_DRAINING ((snd_pcm_state_t) 5) 240 #define SNDRV_PCM_STATE_PAUSED ((snd_pcm_state_t) 6) 241 #define SNDRV_PCM_STATE_SUSPENDED ((snd_pcm_state_t) 7) 242 #define SNDRV_PCM_STATE_DISCONNECTED ((snd_pcm_state_t) 8) 243 #define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED 244 enum { 245 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000, 246 SNDRV_PCM_MMAP_OFFSET_STATUS_OLD = 0x80000000, 247 SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD = 0x81000000, 248 SNDRV_PCM_MMAP_OFFSET_STATUS_NEW = 0x82000000, 249 SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW = 0x83000000, 250 #ifdef __SND_STRUCT_TIME64 251 SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_NEW, 252 SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW, 253 #else 254 SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_OLD, 255 SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD, 256 #endif 257 }; 258 union snd_pcm_sync_id { 259 unsigned char id[16]; 260 unsigned short id16[8]; 261 unsigned int id32[4]; 262 }; 263 struct snd_pcm_info { 264 unsigned int device; 265 unsigned int subdevice; 266 int stream; 267 int card; 268 unsigned char id[64]; 269 unsigned char name[80]; 270 unsigned char subname[32]; 271 int dev_class; 272 int dev_subclass; 273 unsigned int subdevices_count; 274 unsigned int subdevices_avail; 275 union snd_pcm_sync_id sync; 276 unsigned char reserved[64]; 277 }; 278 typedef int snd_pcm_hw_param_t; 279 #define SNDRV_PCM_HW_PARAM_ACCESS 0 280 #define SNDRV_PCM_HW_PARAM_FORMAT 1 281 #define SNDRV_PCM_HW_PARAM_SUBFORMAT 2 282 #define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS 283 #define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT 284 #define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8 285 #define SNDRV_PCM_HW_PARAM_FRAME_BITS 9 286 #define SNDRV_PCM_HW_PARAM_CHANNELS 10 287 #define SNDRV_PCM_HW_PARAM_RATE 11 288 #define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12 289 #define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13 290 #define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14 291 #define SNDRV_PCM_HW_PARAM_PERIODS 15 292 #define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16 293 #define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17 294 #define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18 295 #define SNDRV_PCM_HW_PARAM_TICK_TIME 19 296 #define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS 297 #define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME 298 #define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1 << 0) 299 #define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1 << 1) 300 #define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1 << 2) 301 struct snd_interval { 302 unsigned int min, max; 303 unsigned int openmin : 1, openmax : 1, integer : 1, empty : 1; 304 }; 305 #define SNDRV_MASK_MAX 256 306 struct snd_mask { 307 __u32 bits[(SNDRV_MASK_MAX + 31) / 32]; 308 }; 309 struct snd_pcm_hw_params { 310 unsigned int flags; 311 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK - SNDRV_PCM_HW_PARAM_FIRST_MASK + 1]; 312 struct snd_mask mres[5]; 313 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL - SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1]; 314 struct snd_interval ires[9]; 315 unsigned int rmask; 316 unsigned int cmask; 317 unsigned int info; 318 unsigned int msbits; 319 unsigned int rate_num; 320 unsigned int rate_den; 321 snd_pcm_uframes_t fifo_size; 322 unsigned char reserved[64]; 323 }; 324 enum { 325 SNDRV_PCM_TSTAMP_NONE = 0, 326 SNDRV_PCM_TSTAMP_ENABLE, 327 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE, 328 }; 329 struct snd_pcm_sw_params { 330 int tstamp_mode; 331 unsigned int period_step; 332 unsigned int sleep_min; 333 snd_pcm_uframes_t avail_min; 334 snd_pcm_uframes_t xfer_align; 335 snd_pcm_uframes_t start_threshold; 336 snd_pcm_uframes_t stop_threshold; 337 snd_pcm_uframes_t silence_threshold; 338 snd_pcm_uframes_t silence_size; 339 snd_pcm_uframes_t boundary; 340 unsigned int proto; 341 unsigned int tstamp_type; 342 unsigned char reserved[56]; 343 }; 344 struct snd_pcm_channel_info { 345 unsigned int channel; 346 __kernel_off_t offset; 347 unsigned int first; 348 unsigned int step; 349 }; 350 enum { 351 SNDRV_PCM_AUDIO_TSTAMP_TYPE_COMPAT = 0, 352 SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT = 1, 353 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK = 2, 354 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ABSOLUTE = 3, 355 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ESTIMATED = 4, 356 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED = 5, 357 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LAST = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED 358 }; 359 typedef struct { 360 unsigned char pad[sizeof(time_t) - sizeof(int)]; 361 } __time_pad; 362 struct snd_pcm_status { 363 snd_pcm_state_t state; 364 __time_pad pad1; 365 struct timespec trigger_tstamp; 366 struct timespec tstamp; 367 snd_pcm_uframes_t appl_ptr; 368 snd_pcm_uframes_t hw_ptr; 369 snd_pcm_sframes_t delay; 370 snd_pcm_uframes_t avail; 371 snd_pcm_uframes_t avail_max; 372 snd_pcm_uframes_t overrange; 373 snd_pcm_state_t suspended_state; 374 __u32 audio_tstamp_data; 375 struct timespec audio_tstamp; 376 struct timespec driver_tstamp; 377 __u32 audio_tstamp_accuracy; 378 unsigned char reserved[52 - 2 * sizeof(struct timespec)]; 379 }; 380 #ifdef __SND_STRUCT_TIME64 381 #define __snd_pcm_mmap_status64 snd_pcm_mmap_status 382 #define __snd_pcm_mmap_control64 snd_pcm_mmap_control 383 #define __snd_pcm_sync_ptr64 snd_pcm_sync_ptr 384 #define __snd_timespec64 timespec 385 struct __snd_timespec { 386 __s32 tv_sec; 387 __s32 tv_nsec; 388 }; 389 #else 390 #define __snd_pcm_mmap_status snd_pcm_mmap_status 391 #define __snd_pcm_mmap_control snd_pcm_mmap_control 392 #define __snd_pcm_sync_ptr snd_pcm_sync_ptr 393 #define __snd_timespec timespec 394 struct __snd_timespec64 { 395 __s64 tv_sec; 396 __s64 tv_nsec; 397 }; 398 #endif 399 struct __snd_pcm_mmap_status { 400 snd_pcm_state_t state; 401 int pad1; 402 snd_pcm_uframes_t hw_ptr; 403 struct __snd_timespec tstamp; 404 snd_pcm_state_t suspended_state; 405 struct __snd_timespec audio_tstamp; 406 }; 407 struct __snd_pcm_mmap_control { 408 snd_pcm_uframes_t appl_ptr; 409 snd_pcm_uframes_t avail_min; 410 }; 411 #define SNDRV_PCM_SYNC_PTR_HWSYNC (1 << 0) 412 #define SNDRV_PCM_SYNC_PTR_APPL (1 << 1) 413 #define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1 << 2) 414 struct __snd_pcm_sync_ptr { 415 unsigned int flags; 416 union { 417 struct __snd_pcm_mmap_status status; 418 unsigned char reserved[64]; 419 } s; 420 union { 421 struct __snd_pcm_mmap_control control; 422 unsigned char reserved[64]; 423 } c; 424 }; 425 #if defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN) 426 typedef char __pad_before_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)]; 427 typedef char __pad_after_uframe[0]; 428 #endif 429 #if defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN) 430 typedef char __pad_before_uframe[0]; 431 typedef char __pad_after_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)]; 432 #endif 433 struct __snd_pcm_mmap_status64 { 434 snd_pcm_state_t state; 435 __u32 pad1; 436 __pad_before_uframe __pad1; 437 snd_pcm_uframes_t hw_ptr; 438 __pad_after_uframe __pad2; 439 struct __snd_timespec64 tstamp; 440 snd_pcm_state_t suspended_state; 441 __u32 pad3; 442 struct __snd_timespec64 audio_tstamp; 443 }; 444 struct __snd_pcm_mmap_control64 { 445 __pad_before_uframe __pad1; 446 snd_pcm_uframes_t appl_ptr; 447 __pad_before_uframe __pad2; 448 __pad_before_uframe __pad3; 449 snd_pcm_uframes_t avail_min; 450 __pad_after_uframe __pad4; 451 }; 452 struct __snd_pcm_sync_ptr64 { 453 __u32 flags; 454 __u32 pad1; 455 union { 456 struct __snd_pcm_mmap_status64 status; 457 unsigned char reserved[64]; 458 } s; 459 union { 460 struct __snd_pcm_mmap_control64 control; 461 unsigned char reserved[64]; 462 } c; 463 }; 464 struct snd_xferi { 465 snd_pcm_sframes_t result; 466 void * buf; 467 snd_pcm_uframes_t frames; 468 }; 469 struct snd_xfern { 470 snd_pcm_sframes_t result; 471 void * * bufs; 472 snd_pcm_uframes_t frames; 473 }; 474 enum { 475 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0, 476 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC, 477 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW, 478 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW, 479 }; 480 enum { 481 SNDRV_CHMAP_UNKNOWN = 0, 482 SNDRV_CHMAP_NA, 483 SNDRV_CHMAP_MONO, 484 SNDRV_CHMAP_FL, 485 SNDRV_CHMAP_FR, 486 SNDRV_CHMAP_RL, 487 SNDRV_CHMAP_RR, 488 SNDRV_CHMAP_FC, 489 SNDRV_CHMAP_LFE, 490 SNDRV_CHMAP_SL, 491 SNDRV_CHMAP_SR, 492 SNDRV_CHMAP_RC, 493 SNDRV_CHMAP_FLC, 494 SNDRV_CHMAP_FRC, 495 SNDRV_CHMAP_RLC, 496 SNDRV_CHMAP_RRC, 497 SNDRV_CHMAP_FLW, 498 SNDRV_CHMAP_FRW, 499 SNDRV_CHMAP_FLH, 500 SNDRV_CHMAP_FCH, 501 SNDRV_CHMAP_FRH, 502 SNDRV_CHMAP_TC, 503 SNDRV_CHMAP_TFL, 504 SNDRV_CHMAP_TFR, 505 SNDRV_CHMAP_TFC, 506 SNDRV_CHMAP_TRL, 507 SNDRV_CHMAP_TRR, 508 SNDRV_CHMAP_TRC, 509 SNDRV_CHMAP_TFLC, 510 SNDRV_CHMAP_TFRC, 511 SNDRV_CHMAP_TSL, 512 SNDRV_CHMAP_TSR, 513 SNDRV_CHMAP_LLFE, 514 SNDRV_CHMAP_RLFE, 515 SNDRV_CHMAP_BC, 516 SNDRV_CHMAP_BLC, 517 SNDRV_CHMAP_BRC, 518 SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC, 519 }; 520 #define SNDRV_CHMAP_POSITION_MASK 0xffff 521 #define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16) 522 #define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16) 523 #define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int) 524 #define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info) 525 #define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int) 526 #define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int) 527 #define SNDRV_PCM_IOCTL_USER_PVERSION _IOW('A', 0x04, int) 528 #define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params) 529 #define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params) 530 #define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12) 531 #define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params) 532 #define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status) 533 #define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t) 534 #define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22) 535 #define __SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct __snd_pcm_sync_ptr) 536 #define __SNDRV_PCM_IOCTL_SYNC_PTR64 _IOWR('A', 0x23, struct __snd_pcm_sync_ptr64) 537 #define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr) 538 #define SNDRV_PCM_IOCTL_STATUS_EXT _IOWR('A', 0x24, struct snd_pcm_status) 539 #define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info) 540 #define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40) 541 #define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41) 542 #define SNDRV_PCM_IOCTL_START _IO('A', 0x42) 543 #define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43) 544 #define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44) 545 #define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int) 546 #define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t) 547 #define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47) 548 #define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48) 549 #define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t) 550 #define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi) 551 #define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi) 552 #define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern) 553 #define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern) 554 #define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int) 555 #define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61) 556 #define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 2) 557 enum { 558 SNDRV_RAWMIDI_STREAM_OUTPUT = 0, 559 SNDRV_RAWMIDI_STREAM_INPUT, 560 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT, 561 }; 562 #define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001 563 #define SNDRV_RAWMIDI_INFO_INPUT 0x00000002 564 #define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004 565 struct snd_rawmidi_info { 566 unsigned int device; 567 unsigned int subdevice; 568 int stream; 569 int card; 570 unsigned int flags; 571 unsigned char id[64]; 572 unsigned char name[80]; 573 unsigned char subname[32]; 574 unsigned int subdevices_count; 575 unsigned int subdevices_avail; 576 unsigned char reserved[64]; 577 }; 578 #define SNDRV_RAWMIDI_MODE_FRAMING_MASK (7 << 0) 579 #define SNDRV_RAWMIDI_MODE_FRAMING_SHIFT 0 580 #define SNDRV_RAWMIDI_MODE_FRAMING_NONE (0 << 0) 581 #define SNDRV_RAWMIDI_MODE_FRAMING_TSTAMP (1 << 0) 582 #define SNDRV_RAWMIDI_MODE_CLOCK_MASK (7 << 3) 583 #define SNDRV_RAWMIDI_MODE_CLOCK_SHIFT 3 584 #define SNDRV_RAWMIDI_MODE_CLOCK_NONE (0 << 3) 585 #define SNDRV_RAWMIDI_MODE_CLOCK_REALTIME (1 << 3) 586 #define SNDRV_RAWMIDI_MODE_CLOCK_MONOTONIC (2 << 3) 587 #define SNDRV_RAWMIDI_MODE_CLOCK_MONOTONIC_RAW (3 << 3) 588 #define SNDRV_RAWMIDI_FRAMING_DATA_LENGTH 16 589 struct snd_rawmidi_framing_tstamp { 590 __u8 frame_type; 591 __u8 length; 592 __u8 reserved[2]; 593 __u32 tv_nsec; 594 __u64 tv_sec; 595 __u8 data[SNDRV_RAWMIDI_FRAMING_DATA_LENGTH]; 596 } __attribute__((packed)); 597 struct snd_rawmidi_params { 598 int stream; 599 size_t buffer_size; 600 size_t avail_min; 601 unsigned int no_active_sensing : 1; 602 unsigned int mode; 603 unsigned char reserved[12]; 604 }; 605 struct snd_rawmidi_status { 606 int stream; 607 __time_pad pad1; 608 struct timespec tstamp; 609 size_t avail; 610 size_t xruns; 611 unsigned char reserved[16]; 612 }; 613 #define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int) 614 #define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info) 615 #define SNDRV_RAWMIDI_IOCTL_USER_PVERSION _IOW('W', 0x02, int) 616 #define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params) 617 #define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status) 618 #define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int) 619 #define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int) 620 #define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7) 621 enum { 622 SNDRV_TIMER_CLASS_NONE = - 1, 623 SNDRV_TIMER_CLASS_SLAVE = 0, 624 SNDRV_TIMER_CLASS_GLOBAL, 625 SNDRV_TIMER_CLASS_CARD, 626 SNDRV_TIMER_CLASS_PCM, 627 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM, 628 }; 629 enum { 630 SNDRV_TIMER_SCLASS_NONE = 0, 631 SNDRV_TIMER_SCLASS_APPLICATION, 632 SNDRV_TIMER_SCLASS_SEQUENCER, 633 SNDRV_TIMER_SCLASS_OSS_SEQUENCER, 634 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER, 635 }; 636 #define SNDRV_TIMER_GLOBAL_SYSTEM 0 637 #define SNDRV_TIMER_GLOBAL_RTC 1 638 #define SNDRV_TIMER_GLOBAL_HPET 2 639 #define SNDRV_TIMER_GLOBAL_HRTIMER 3 640 #define SNDRV_TIMER_FLG_SLAVE (1 << 0) 641 struct snd_timer_id { 642 int dev_class; 643 int dev_sclass; 644 int card; 645 int device; 646 int subdevice; 647 }; 648 struct snd_timer_ginfo { 649 struct snd_timer_id tid; 650 unsigned int flags; 651 int card; 652 unsigned char id[64]; 653 unsigned char name[80]; 654 unsigned long reserved0; 655 unsigned long resolution; 656 unsigned long resolution_min; 657 unsigned long resolution_max; 658 unsigned int clients; 659 unsigned char reserved[32]; 660 }; 661 struct snd_timer_gparams { 662 struct snd_timer_id tid; 663 unsigned long period_num; 664 unsigned long period_den; 665 unsigned char reserved[32]; 666 }; 667 struct snd_timer_gstatus { 668 struct snd_timer_id tid; 669 unsigned long resolution; 670 unsigned long resolution_num; 671 unsigned long resolution_den; 672 unsigned char reserved[32]; 673 }; 674 struct snd_timer_select { 675 struct snd_timer_id id; 676 unsigned char reserved[32]; 677 }; 678 struct snd_timer_info { 679 unsigned int flags; 680 int card; 681 unsigned char id[64]; 682 unsigned char name[80]; 683 unsigned long reserved0; 684 unsigned long resolution; 685 unsigned char reserved[64]; 686 }; 687 #define SNDRV_TIMER_PSFLG_AUTO (1 << 0) 688 #define SNDRV_TIMER_PSFLG_EXCLUSIVE (1 << 1) 689 #define SNDRV_TIMER_PSFLG_EARLY_EVENT (1 << 2) 690 struct snd_timer_params { 691 unsigned int flags; 692 unsigned int ticks; 693 unsigned int queue_size; 694 unsigned int reserved0; 695 unsigned int filter; 696 unsigned char reserved[60]; 697 }; 698 struct snd_timer_status { 699 struct timespec tstamp; 700 unsigned int resolution; 701 unsigned int lost; 702 unsigned int overrun; 703 unsigned int queue; 704 unsigned char reserved[64]; 705 }; 706 #define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int) 707 #define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id) 708 #define SNDRV_TIMER_IOCTL_TREAD_OLD _IOW('T', 0x02, int) 709 #define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo) 710 #define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams) 711 #define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus) 712 #define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select) 713 #define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info) 714 #define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params) 715 #define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status) 716 #define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0) 717 #define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1) 718 #define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2) 719 #define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3) 720 #define SNDRV_TIMER_IOCTL_TREAD64 _IOW('T', 0xa4, int) 721 #if __BITS_PER_LONG == 64 722 #define SNDRV_TIMER_IOCTL_TREAD SNDRV_TIMER_IOCTL_TREAD_OLD 723 #else 724 #define SNDRV_TIMER_IOCTL_TREAD ((sizeof(__kernel_long_t) >= sizeof(time_t)) ? SNDRV_TIMER_IOCTL_TREAD_OLD : SNDRV_TIMER_IOCTL_TREAD64) 725 #endif 726 struct snd_timer_read { 727 unsigned int resolution; 728 unsigned int ticks; 729 }; 730 enum { 731 SNDRV_TIMER_EVENT_RESOLUTION = 0, 732 SNDRV_TIMER_EVENT_TICK, 733 SNDRV_TIMER_EVENT_START, 734 SNDRV_TIMER_EVENT_STOP, 735 SNDRV_TIMER_EVENT_CONTINUE, 736 SNDRV_TIMER_EVENT_PAUSE, 737 SNDRV_TIMER_EVENT_EARLY, 738 SNDRV_TIMER_EVENT_SUSPEND, 739 SNDRV_TIMER_EVENT_RESUME, 740 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10, 741 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10, 742 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10, 743 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10, 744 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10, 745 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10, 746 }; 747 struct snd_timer_tread { 748 int event; 749 __time_pad pad1; 750 struct timespec tstamp; 751 unsigned int val; 752 __time_pad pad2; 753 }; 754 #define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 8) 755 struct snd_ctl_card_info { 756 int card; 757 int pad; 758 unsigned char id[16]; 759 unsigned char driver[16]; 760 unsigned char name[32]; 761 unsigned char longname[80]; 762 unsigned char reserved_[16]; 763 unsigned char mixername[80]; 764 unsigned char components[128]; 765 }; 766 typedef int __bitwise snd_ctl_elem_type_t; 767 #define SNDRV_CTL_ELEM_TYPE_NONE ((snd_ctl_elem_type_t) 0) 768 #define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((snd_ctl_elem_type_t) 1) 769 #define SNDRV_CTL_ELEM_TYPE_INTEGER ((snd_ctl_elem_type_t) 2) 770 #define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((snd_ctl_elem_type_t) 3) 771 #define SNDRV_CTL_ELEM_TYPE_BYTES ((snd_ctl_elem_type_t) 4) 772 #define SNDRV_CTL_ELEM_TYPE_IEC958 ((snd_ctl_elem_type_t) 5) 773 #define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((snd_ctl_elem_type_t) 6) 774 #define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64 775 typedef int __bitwise snd_ctl_elem_iface_t; 776 #define SNDRV_CTL_ELEM_IFACE_CARD ((snd_ctl_elem_iface_t) 0) 777 #define SNDRV_CTL_ELEM_IFACE_HWDEP ((snd_ctl_elem_iface_t) 1) 778 #define SNDRV_CTL_ELEM_IFACE_MIXER ((snd_ctl_elem_iface_t) 2) 779 #define SNDRV_CTL_ELEM_IFACE_PCM ((snd_ctl_elem_iface_t) 3) 780 #define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((snd_ctl_elem_iface_t) 4) 781 #define SNDRV_CTL_ELEM_IFACE_TIMER ((snd_ctl_elem_iface_t) 5) 782 #define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((snd_ctl_elem_iface_t) 6) 783 #define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER 784 #define SNDRV_CTL_ELEM_ACCESS_READ (1 << 0) 785 #define SNDRV_CTL_ELEM_ACCESS_WRITE (1 << 1) 786 #define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE) 787 #define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1 << 2) 788 #define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1 << 4) 789 #define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1 << 5) 790 #define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ | SNDRV_CTL_ELEM_ACCESS_TLV_WRITE) 791 #define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1 << 6) 792 #define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1 << 8) 793 #define SNDRV_CTL_ELEM_ACCESS_LOCK (1 << 9) 794 #define SNDRV_CTL_ELEM_ACCESS_OWNER (1 << 10) 795 #define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1 << 28) 796 #define SNDRV_CTL_ELEM_ACCESS_USER (1 << 29) 797 #define SNDRV_CTL_POWER_D0 0x0000 798 #define SNDRV_CTL_POWER_D1 0x0100 799 #define SNDRV_CTL_POWER_D2 0x0200 800 #define SNDRV_CTL_POWER_D3 0x0300 801 #define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3 | 0x0000) 802 #define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3 | 0x0001) 803 #define SNDRV_CTL_ELEM_ID_NAME_MAXLEN 44 804 struct snd_ctl_elem_id { 805 unsigned int numid; 806 snd_ctl_elem_iface_t iface; 807 unsigned int device; 808 unsigned int subdevice; 809 unsigned char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; 810 unsigned int index; 811 }; 812 struct snd_ctl_elem_list { 813 unsigned int offset; 814 unsigned int space; 815 unsigned int used; 816 unsigned int count; 817 struct snd_ctl_elem_id * pids; 818 unsigned char reserved[50]; 819 }; 820 struct snd_ctl_elem_info { 821 struct snd_ctl_elem_id id; 822 snd_ctl_elem_type_t type; 823 unsigned int access; 824 unsigned int count; 825 __kernel_pid_t owner; 826 union { 827 struct { 828 long min; 829 long max; 830 long step; 831 } integer; 832 struct { 833 long long min; 834 long long max; 835 long long step; 836 } integer64; 837 struct { 838 unsigned int items; 839 unsigned int item; 840 char name[64]; 841 __u64 names_ptr; 842 unsigned int names_length; 843 } enumerated; 844 unsigned char reserved[128]; 845 } value; 846 unsigned char reserved[64]; 847 }; 848 struct snd_ctl_elem_value { 849 struct snd_ctl_elem_id id; 850 unsigned int indirect : 1; 851 union { 852 union { 853 long value[128]; 854 long * value_ptr; 855 } integer; 856 union { 857 long long value[64]; 858 long long * value_ptr; 859 } integer64; 860 union { 861 unsigned int item[128]; 862 unsigned int * item_ptr; 863 } enumerated; 864 union { 865 unsigned char data[512]; 866 unsigned char * data_ptr; 867 } bytes; 868 struct snd_aes_iec958 iec958; 869 } value; 870 unsigned char reserved[128]; 871 }; 872 struct snd_ctl_tlv { 873 unsigned int numid; 874 unsigned int length; 875 unsigned int tlv[]; 876 }; 877 #define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int) 878 #define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info) 879 #define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list) 880 #define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info) 881 #define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value) 882 #define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value) 883 #define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id) 884 #define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id) 885 #define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int) 886 #define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info) 887 #define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info) 888 #define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id) 889 #define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv) 890 #define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv) 891 #define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv) 892 #define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int) 893 #define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info) 894 #define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int) 895 #define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info) 896 #define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int) 897 #define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int) 898 #define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info) 899 #define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int) 900 #define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int) 901 #define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int) 902 enum sndrv_ctl_event_type { 903 SNDRV_CTL_EVENT_ELEM = 0, 904 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM, 905 }; 906 #define SNDRV_CTL_EVENT_MASK_VALUE (1 << 0) 907 #define SNDRV_CTL_EVENT_MASK_INFO (1 << 1) 908 #define SNDRV_CTL_EVENT_MASK_ADD (1 << 2) 909 #define SNDRV_CTL_EVENT_MASK_TLV (1 << 3) 910 #define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) 911 struct snd_ctl_event { 912 int type; 913 union { 914 struct { 915 unsigned int mask; 916 struct snd_ctl_elem_id id; 917 } elem; 918 unsigned char data8[60]; 919 } data; 920 }; 921 #define SNDRV_CTL_NAME_NONE "" 922 #define SNDRV_CTL_NAME_PLAYBACK "Playback " 923 #define SNDRV_CTL_NAME_CAPTURE "Capture " 924 #define SNDRV_CTL_NAME_IEC958_NONE "" 925 #define SNDRV_CTL_NAME_IEC958_SWITCH "Switch" 926 #define SNDRV_CTL_NAME_IEC958_VOLUME "Volume" 927 #define SNDRV_CTL_NAME_IEC958_DEFAULT "Default" 928 #define SNDRV_CTL_NAME_IEC958_MASK "Mask" 929 #define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask" 930 #define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask" 931 #define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream" 932 #define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_ ##direction SNDRV_CTL_NAME_IEC958_ ##what 933 #endif 934