1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ 2 /* 3 * Advanced Linux Sound Architecture - ALSA - Driver 4 * Copyright (c) 1994-2003 by Jaroslav Kysela <perex@perex.cz>, 5 * Abramo Bagnara <abramo@alsa-project.org> 6 */ 7 8 #ifndef __SOUND_ASOUND_H 9 #define __SOUND_ASOUND_H 10 11 #if defined(__KERNEL__) || defined(__linux__) 12 #include <linux/types.h> 13 #include <asm/byteorder.h> 14 #else 15 #include <endian.h> 16 #include <sys/ioctl.h> 17 #endif 18 19 #include <stdlib.h> 20 #include <time.h> 21 22 /* 23 * protocol version 24 */ 25 26 #define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor)) 27 #define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff) 28 #define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff) 29 #define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff) 30 #define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \ 31 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \ 32 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \ 33 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion))) 34 35 /**************************************************************************** 36 * * 37 * Digital audio interface * 38 * * 39 ****************************************************************************/ 40 41 #define AES_IEC958_STATUS_SIZE 24 42 43 struct snd_aes_iec958 { 44 unsigned char status[AES_IEC958_STATUS_SIZE]; /* AES/IEC958 channel status bits */ 45 unsigned char subcode[147]; /* AES/IEC958 subcode bits */ 46 unsigned char pad; /* nothing */ 47 unsigned char dig_subframe[4]; /* AES/IEC958 subframe bits */ 48 }; 49 50 /**************************************************************************** 51 * * 52 * CEA-861 Audio InfoFrame. Used in HDMI and DisplayPort * 53 * * 54 ****************************************************************************/ 55 56 struct snd_cea_861_aud_if { 57 unsigned char db1_ct_cc; /* coding type and channel count */ 58 unsigned char db2_sf_ss; /* sample frequency and size */ 59 unsigned char db3; /* not used, all zeros */ 60 unsigned char db4_ca; /* channel allocation code */ 61 unsigned char db5_dminh_lsv; /* downmix inhibit & level-shit values */ 62 }; 63 64 /**************************************************************************** 65 * * 66 * Section for driver hardware dependent interface - /dev/snd/hw? * 67 * * 68 ****************************************************************************/ 69 70 #define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1) 71 72 enum { 73 SNDRV_HWDEP_IFACE_OPL2 = 0, 74 SNDRV_HWDEP_IFACE_OPL3, 75 SNDRV_HWDEP_IFACE_OPL4, 76 SNDRV_HWDEP_IFACE_SB16CSP, /* Creative Signal Processor */ 77 SNDRV_HWDEP_IFACE_EMU10K1, /* FX8010 processor in EMU10K1 chip */ 78 SNDRV_HWDEP_IFACE_YSS225, /* Yamaha FX processor */ 79 SNDRV_HWDEP_IFACE_ICS2115, /* Wavetable synth */ 80 SNDRV_HWDEP_IFACE_SSCAPE, /* Ensoniq SoundScape ISA card (MC68EC000) */ 81 SNDRV_HWDEP_IFACE_VX, /* Digigram VX cards */ 82 SNDRV_HWDEP_IFACE_MIXART, /* Digigram miXart cards */ 83 SNDRV_HWDEP_IFACE_USX2Y, /* Tascam US122, US224 & US428 usb */ 84 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, /* EmuX wavetable */ 85 SNDRV_HWDEP_IFACE_BLUETOOTH, /* Bluetooth audio */ 86 SNDRV_HWDEP_IFACE_USX2Y_PCM, /* Tascam US122, US224 & US428 rawusb pcm */ 87 SNDRV_HWDEP_IFACE_PCXHR, /* Digigram PCXHR */ 88 SNDRV_HWDEP_IFACE_SB_RC, /* SB Extigy/Audigy2NX remote control */ 89 SNDRV_HWDEP_IFACE_HDA, /* HD-audio */ 90 SNDRV_HWDEP_IFACE_USB_STREAM, /* direct access to usb stream */ 91 SNDRV_HWDEP_IFACE_FW_DICE, /* TC DICE FireWire device */ 92 SNDRV_HWDEP_IFACE_FW_FIREWORKS, /* Echo Audio Fireworks based device */ 93 SNDRV_HWDEP_IFACE_FW_BEBOB, /* BridgeCo BeBoB based device */ 94 SNDRV_HWDEP_IFACE_FW_OXFW, /* Oxford OXFW970/971 based device */ 95 SNDRV_HWDEP_IFACE_FW_DIGI00X, /* Digidesign Digi 002/003 family */ 96 SNDRV_HWDEP_IFACE_FW_TASCAM, /* TASCAM FireWire series */ 97 SNDRV_HWDEP_IFACE_LINE6, /* Line6 USB processors */ 98 SNDRV_HWDEP_IFACE_FW_MOTU, /* MOTU FireWire series */ 99 SNDRV_HWDEP_IFACE_FW_FIREFACE, /* RME Fireface series */ 100 101 /* Don't forget to change the following: */ 102 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_FW_FIREFACE 103 }; 104 105 struct snd_hwdep_info { 106 unsigned int device; /* WR: device number */ 107 int card; /* R: card number */ 108 unsigned char id[64]; /* ID (user selectable) */ 109 unsigned char name[80]; /* hwdep name */ 110 int iface; /* hwdep interface */ 111 unsigned char reserved[64]; /* reserved for future */ 112 }; 113 114 /* generic DSP loader */ 115 struct snd_hwdep_dsp_status { 116 unsigned int version; /* R: driver-specific version */ 117 unsigned char id[32]; /* R: driver-specific ID string */ 118 unsigned int num_dsps; /* R: number of DSP images to transfer */ 119 unsigned int dsp_loaded; /* R: bit flags indicating the loaded DSPs */ 120 unsigned int chip_ready; /* R: 1 = initialization finished */ 121 unsigned char reserved[16]; /* reserved for future use */ 122 }; 123 124 struct snd_hwdep_dsp_image { 125 unsigned int index; /* W: DSP index */ 126 unsigned char name[64]; /* W: ID (e.g. file name) */ 127 unsigned char *image; /* W: binary image */ 128 size_t length; /* W: size of image in bytes */ 129 unsigned long driver_data; /* W: driver-specific data */ 130 }; 131 132 #define SNDRV_HWDEP_IOCTL_PVERSION _IOR ('H', 0x00, int) 133 #define SNDRV_HWDEP_IOCTL_INFO _IOR ('H', 0x01, struct snd_hwdep_info) 134 #define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status) 135 #define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image) 136 137 /***************************************************************************** 138 * * 139 * Digital Audio (PCM) interface - /dev/snd/pcm?? * 140 * * 141 *****************************************************************************/ 142 143 #define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 15) 144 145 typedef unsigned long snd_pcm_uframes_t; 146 typedef signed long snd_pcm_sframes_t; 147 148 enum { 149 SNDRV_PCM_CLASS_GENERIC = 0, /* standard mono or stereo device */ 150 SNDRV_PCM_CLASS_MULTI, /* multichannel device */ 151 SNDRV_PCM_CLASS_MODEM, /* software modem class */ 152 SNDRV_PCM_CLASS_DIGITIZER, /* digitizer class */ 153 /* Don't forget to change the following: */ 154 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER, 155 }; 156 157 enum { 158 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, /* mono or stereo subdevices are mixed together */ 159 SNDRV_PCM_SUBCLASS_MULTI_MIX, /* multichannel subdevices are mixed together */ 160 /* Don't forget to change the following: */ 161 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX, 162 }; 163 164 enum { 165 SNDRV_PCM_STREAM_PLAYBACK = 0, 166 SNDRV_PCM_STREAM_CAPTURE, 167 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE, 168 }; 169 170 typedef int __bitwise snd_pcm_access_t; 171 #define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((snd_pcm_access_t) 0) /* interleaved mmap */ 172 #define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((snd_pcm_access_t) 1) /* noninterleaved mmap */ 173 #define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((snd_pcm_access_t) 2) /* complex mmap */ 174 #define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((snd_pcm_access_t) 3) /* readi/writei */ 175 #define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((snd_pcm_access_t) 4) /* readn/writen */ 176 #define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED 177 178 typedef int __bitwise snd_pcm_format_t; 179 #define SNDRV_PCM_FORMAT_S8 ((snd_pcm_format_t) 0) 180 #define SNDRV_PCM_FORMAT_U8 ((snd_pcm_format_t) 1) 181 #define SNDRV_PCM_FORMAT_S16_LE ((snd_pcm_format_t) 2) 182 #define SNDRV_PCM_FORMAT_S16_BE ((snd_pcm_format_t) 3) 183 #define SNDRV_PCM_FORMAT_U16_LE ((snd_pcm_format_t) 4) 184 #define SNDRV_PCM_FORMAT_U16_BE ((snd_pcm_format_t) 5) 185 #define SNDRV_PCM_FORMAT_S24_LE ((snd_pcm_format_t) 6) /* low three bytes */ 186 #define SNDRV_PCM_FORMAT_S24_BE ((snd_pcm_format_t) 7) /* low three bytes */ 187 #define SNDRV_PCM_FORMAT_U24_LE ((snd_pcm_format_t) 8) /* low three bytes */ 188 #define SNDRV_PCM_FORMAT_U24_BE ((snd_pcm_format_t) 9) /* low three bytes */ 189 /* 190 * For S32/U32 formats, 'msbits' hardware parameter is often used to deliver information about the 191 * available bit count in most significant bit. It's for the case of so-called 'left-justified' or 192 * `right-padding` sample which has less width than 32 bit. 193 */ 194 #define SNDRV_PCM_FORMAT_S32_LE ((snd_pcm_format_t) 10) 195 #define SNDRV_PCM_FORMAT_S32_BE ((snd_pcm_format_t) 11) 196 #define SNDRV_PCM_FORMAT_U32_LE ((snd_pcm_format_t) 12) 197 #define SNDRV_PCM_FORMAT_U32_BE ((snd_pcm_format_t) 13) 198 #define SNDRV_PCM_FORMAT_FLOAT_LE ((snd_pcm_format_t) 14) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */ 199 #define SNDRV_PCM_FORMAT_FLOAT_BE ((snd_pcm_format_t) 15) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */ 200 #define SNDRV_PCM_FORMAT_FLOAT64_LE ((snd_pcm_format_t) 16) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */ 201 #define SNDRV_PCM_FORMAT_FLOAT64_BE ((snd_pcm_format_t) 17) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */ 202 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((snd_pcm_format_t) 18) /* IEC-958 subframe, Little Endian */ 203 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((snd_pcm_format_t) 19) /* IEC-958 subframe, Big Endian */ 204 #define SNDRV_PCM_FORMAT_MU_LAW ((snd_pcm_format_t) 20) 205 #define SNDRV_PCM_FORMAT_A_LAW ((snd_pcm_format_t) 21) 206 #define SNDRV_PCM_FORMAT_IMA_ADPCM ((snd_pcm_format_t) 22) 207 #define SNDRV_PCM_FORMAT_MPEG ((snd_pcm_format_t) 23) 208 #define SNDRV_PCM_FORMAT_GSM ((snd_pcm_format_t) 24) 209 #define SNDRV_PCM_FORMAT_S20_LE ((snd_pcm_format_t) 25) /* in four bytes, LSB justified */ 210 #define SNDRV_PCM_FORMAT_S20_BE ((snd_pcm_format_t) 26) /* in four bytes, LSB justified */ 211 #define SNDRV_PCM_FORMAT_U20_LE ((snd_pcm_format_t) 27) /* in four bytes, LSB justified */ 212 #define SNDRV_PCM_FORMAT_U20_BE ((snd_pcm_format_t) 28) /* in four bytes, LSB justified */ 213 /* gap in the numbering for a future standard linear format */ 214 #define SNDRV_PCM_FORMAT_SPECIAL ((snd_pcm_format_t) 31) 215 #define SNDRV_PCM_FORMAT_S24_3LE ((snd_pcm_format_t) 32) /* in three bytes */ 216 #define SNDRV_PCM_FORMAT_S24_3BE ((snd_pcm_format_t) 33) /* in three bytes */ 217 #define SNDRV_PCM_FORMAT_U24_3LE ((snd_pcm_format_t) 34) /* in three bytes */ 218 #define SNDRV_PCM_FORMAT_U24_3BE ((snd_pcm_format_t) 35) /* in three bytes */ 219 #define SNDRV_PCM_FORMAT_S20_3LE ((snd_pcm_format_t) 36) /* in three bytes */ 220 #define SNDRV_PCM_FORMAT_S20_3BE ((snd_pcm_format_t) 37) /* in three bytes */ 221 #define SNDRV_PCM_FORMAT_U20_3LE ((snd_pcm_format_t) 38) /* in three bytes */ 222 #define SNDRV_PCM_FORMAT_U20_3BE ((snd_pcm_format_t) 39) /* in three bytes */ 223 #define SNDRV_PCM_FORMAT_S18_3LE ((snd_pcm_format_t) 40) /* in three bytes */ 224 #define SNDRV_PCM_FORMAT_S18_3BE ((snd_pcm_format_t) 41) /* in three bytes */ 225 #define SNDRV_PCM_FORMAT_U18_3LE ((snd_pcm_format_t) 42) /* in three bytes */ 226 #define SNDRV_PCM_FORMAT_U18_3BE ((snd_pcm_format_t) 43) /* in three bytes */ 227 #define SNDRV_PCM_FORMAT_G723_24 ((snd_pcm_format_t) 44) /* 8 samples in 3 bytes */ 228 #define SNDRV_PCM_FORMAT_G723_24_1B ((snd_pcm_format_t) 45) /* 1 sample in 1 byte */ 229 #define SNDRV_PCM_FORMAT_G723_40 ((snd_pcm_format_t) 46) /* 8 Samples in 5 bytes */ 230 #define SNDRV_PCM_FORMAT_G723_40_1B ((snd_pcm_format_t) 47) /* 1 sample in 1 byte */ 231 #define SNDRV_PCM_FORMAT_DSD_U8 ((snd_pcm_format_t) 48) /* DSD, 1-byte samples DSD (x8) */ 232 #define SNDRV_PCM_FORMAT_DSD_U16_LE ((snd_pcm_format_t) 49) /* DSD, 2-byte samples DSD (x16), little endian */ 233 #define SNDRV_PCM_FORMAT_DSD_U32_LE ((snd_pcm_format_t) 50) /* DSD, 4-byte samples DSD (x32), little endian */ 234 #define SNDRV_PCM_FORMAT_DSD_U16_BE ((snd_pcm_format_t) 51) /* DSD, 2-byte samples DSD (x16), big endian */ 235 #define SNDRV_PCM_FORMAT_DSD_U32_BE ((snd_pcm_format_t) 52) /* DSD, 4-byte samples DSD (x32), big endian */ 236 #define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U32_BE 237 #define SNDRV_PCM_FORMAT_FIRST SNDRV_PCM_FORMAT_S8 238 239 #ifdef SNDRV_LITTLE_ENDIAN 240 #define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE 241 #define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE 242 #define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE 243 #define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE 244 #define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE 245 #define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE 246 #define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE 247 #define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE 248 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE 249 #define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_LE 250 #define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_LE 251 #endif 252 #ifdef SNDRV_BIG_ENDIAN 253 #define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE 254 #define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE 255 #define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE 256 #define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE 257 #define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE 258 #define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE 259 #define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE 260 #define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE 261 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE 262 #define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_BE 263 #define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_BE 264 #endif 265 266 typedef int __bitwise snd_pcm_subformat_t; 267 #define SNDRV_PCM_SUBFORMAT_STD ((snd_pcm_subformat_t) 0) 268 #define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD 269 270 #define SNDRV_PCM_INFO_MMAP 0x00000001 /* hardware supports mmap */ 271 #define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 /* period data are valid during transfer */ 272 #define SNDRV_PCM_INFO_DOUBLE 0x00000004 /* Double buffering needed for PCM start/stop */ 273 #define SNDRV_PCM_INFO_BATCH 0x00000010 /* double buffering */ 274 #define SNDRV_PCM_INFO_SYNC_APPLPTR 0x00000020 /* need the explicit sync of appl_ptr update */ 275 #define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 /* channels are interleaved */ 276 #define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 /* channels are not interleaved */ 277 #define SNDRV_PCM_INFO_COMPLEX 0x00000400 /* complex frame organization (mmap only) */ 278 #define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 /* hardware transfer block of samples */ 279 #define SNDRV_PCM_INFO_OVERRANGE 0x00020000 /* hardware supports ADC (capture) overrange detection */ 280 #define SNDRV_PCM_INFO_RESUME 0x00040000 /* hardware supports stream resume after suspend */ 281 #define SNDRV_PCM_INFO_PAUSE 0x00080000 /* pause ioctl is supported */ 282 #define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 /* only half duplex */ 283 #define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 /* playback and capture stream are somewhat correlated */ 284 #define SNDRV_PCM_INFO_SYNC_START 0x00400000 /* pcm support some kind of sync go */ 285 #define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000 /* period wakeup can be disabled */ 286 #define SNDRV_PCM_INFO_HAS_WALL_CLOCK 0x01000000 /* (Deprecated)has audio wall clock for audio/system time sync */ 287 #define SNDRV_PCM_INFO_HAS_LINK_ATIME 0x01000000 /* report hardware link audio time, reset on startup */ 288 #define SNDRV_PCM_INFO_HAS_LINK_ABSOLUTE_ATIME 0x02000000 /* report absolute hardware link audio time, not reset on startup */ 289 #define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME 0x04000000 /* report estimated link audio time */ 290 #define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000 /* report synchronized audio/system time */ 291 #define SNDRV_PCM_INFO_EXPLICIT_SYNC 0x10000000 /* needs explicit sync of pointers and data */ 292 #define SNDRV_PCM_INFO_NO_REWINDS 0x20000000 /* hardware can only support monotonic changes of appl_ptr */ 293 #define SNDRV_PCM_INFO_DRAIN_TRIGGER 0x40000000 /* internal kernel flag - trigger in drain */ 294 #define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000 /* internal kernel flag - FIFO size is in frames */ 295 296 #if (__BITS_PER_LONG == 32 && defined(__USE_TIME_BITS64)) || defined __KERNEL__ 297 #define __SND_STRUCT_TIME64 298 #endif 299 300 typedef int __bitwise snd_pcm_state_t; 301 #define SNDRV_PCM_STATE_OPEN ((snd_pcm_state_t) 0) /* stream is open */ 302 #define SNDRV_PCM_STATE_SETUP ((snd_pcm_state_t) 1) /* stream has a setup */ 303 #define SNDRV_PCM_STATE_PREPARED ((snd_pcm_state_t) 2) /* stream is ready to start */ 304 #define SNDRV_PCM_STATE_RUNNING ((snd_pcm_state_t) 3) /* stream is running */ 305 #define SNDRV_PCM_STATE_XRUN ((snd_pcm_state_t) 4) /* stream reached an xrun */ 306 #define SNDRV_PCM_STATE_DRAINING ((snd_pcm_state_t) 5) /* stream is draining */ 307 #define SNDRV_PCM_STATE_PAUSED ((snd_pcm_state_t) 6) /* stream is paused */ 308 #define SNDRV_PCM_STATE_SUSPENDED ((snd_pcm_state_t) 7) /* hardware is suspended */ 309 #define SNDRV_PCM_STATE_DISCONNECTED ((snd_pcm_state_t) 8) /* hardware is disconnected */ 310 #define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED 311 312 enum { 313 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000, 314 SNDRV_PCM_MMAP_OFFSET_STATUS_OLD = 0x80000000, 315 SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD = 0x81000000, 316 SNDRV_PCM_MMAP_OFFSET_STATUS_NEW = 0x82000000, 317 SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW = 0x83000000, 318 #ifdef __SND_STRUCT_TIME64 319 SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_NEW, 320 SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_NEW, 321 #else 322 SNDRV_PCM_MMAP_OFFSET_STATUS = SNDRV_PCM_MMAP_OFFSET_STATUS_OLD, 323 SNDRV_PCM_MMAP_OFFSET_CONTROL = SNDRV_PCM_MMAP_OFFSET_CONTROL_OLD, 324 #endif 325 }; 326 327 union snd_pcm_sync_id { 328 unsigned char id[16]; 329 unsigned short id16[8]; 330 unsigned int id32[4]; 331 }; 332 333 struct snd_pcm_info { 334 unsigned int device; /* RO/WR (control): device number */ 335 unsigned int subdevice; /* RO/WR (control): subdevice number */ 336 int stream; /* RO/WR (control): stream direction */ 337 int card; /* R: card number */ 338 unsigned char id[64]; /* ID (user selectable) */ 339 unsigned char name[80]; /* name of this device */ 340 unsigned char subname[32]; /* subdevice name */ 341 int dev_class; /* SNDRV_PCM_CLASS_* */ 342 int dev_subclass; /* SNDRV_PCM_SUBCLASS_* */ 343 unsigned int subdevices_count; 344 unsigned int subdevices_avail; 345 union snd_pcm_sync_id sync; /* hardware synchronization ID */ 346 unsigned char reserved[64]; /* reserved for future... */ 347 }; 348 349 typedef int snd_pcm_hw_param_t; 350 #define SNDRV_PCM_HW_PARAM_ACCESS 0 /* Access type */ 351 #define SNDRV_PCM_HW_PARAM_FORMAT 1 /* Format */ 352 #define SNDRV_PCM_HW_PARAM_SUBFORMAT 2 /* Subformat */ 353 #define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS 354 #define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT 355 356 #define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8 /* Bits per sample */ 357 #define SNDRV_PCM_HW_PARAM_FRAME_BITS 9 /* Bits per frame */ 358 #define SNDRV_PCM_HW_PARAM_CHANNELS 10 /* Channels */ 359 #define SNDRV_PCM_HW_PARAM_RATE 11 /* Approx rate */ 360 #define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12 /* Approx distance between 361 * interrupts in us 362 */ 363 #define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13 /* Approx frames between 364 * interrupts 365 */ 366 #define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14 /* Approx bytes between 367 * interrupts 368 */ 369 #define SNDRV_PCM_HW_PARAM_PERIODS 15 /* Approx interrupts per 370 * buffer 371 */ 372 #define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16 /* Approx duration of buffer 373 * in us 374 */ 375 #define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17 /* Size of buffer in frames */ 376 #define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18 /* Size of buffer in bytes */ 377 #define SNDRV_PCM_HW_PARAM_TICK_TIME 19 /* Approx tick duration in us */ 378 #define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS 379 #define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME 380 381 #define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0) /* avoid rate resampling */ 382 #define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1<<1) /* export buffer */ 383 #define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1<<2) /* disable period wakeups */ 384 385 struct snd_interval { 386 unsigned int min, max; 387 unsigned int openmin:1, 388 openmax:1, 389 integer:1, 390 empty:1; 391 }; 392 393 #define SNDRV_MASK_MAX 256 394 395 struct snd_mask { 396 __u32 bits[(SNDRV_MASK_MAX+31)/32]; 397 }; 398 399 struct snd_pcm_hw_params { 400 unsigned int flags; 401 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK - 402 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1]; 403 struct snd_mask mres[5]; /* reserved masks */ 404 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL - 405 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1]; 406 struct snd_interval ires[9]; /* reserved intervals */ 407 unsigned int rmask; /* W: requested masks */ 408 unsigned int cmask; /* R: changed masks */ 409 unsigned int info; /* R: Info flags for returned setup */ 410 unsigned int msbits; /* R: used most significant bits */ 411 unsigned int rate_num; /* R: rate numerator */ 412 unsigned int rate_den; /* R: rate denominator */ 413 snd_pcm_uframes_t fifo_size; /* R: chip FIFO size in frames */ 414 unsigned char reserved[64]; /* reserved for future */ 415 }; 416 417 enum { 418 SNDRV_PCM_TSTAMP_NONE = 0, 419 SNDRV_PCM_TSTAMP_ENABLE, 420 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE, 421 }; 422 423 struct snd_pcm_sw_params { 424 int tstamp_mode; /* timestamp mode */ 425 unsigned int period_step; 426 unsigned int sleep_min; /* min ticks to sleep */ 427 snd_pcm_uframes_t avail_min; /* min avail frames for wakeup */ 428 snd_pcm_uframes_t xfer_align; /* obsolete: xfer size need to be a multiple */ 429 snd_pcm_uframes_t start_threshold; /* min hw_avail frames for automatic start */ 430 snd_pcm_uframes_t stop_threshold; /* min avail frames for automatic stop */ 431 snd_pcm_uframes_t silence_threshold; /* min distance from noise for silence filling */ 432 snd_pcm_uframes_t silence_size; /* silence block size */ 433 snd_pcm_uframes_t boundary; /* pointers wrap point */ 434 unsigned int proto; /* protocol version */ 435 unsigned int tstamp_type; /* timestamp type (req. proto >= 2.0.12) */ 436 unsigned char reserved[56]; /* reserved for future */ 437 }; 438 439 struct snd_pcm_channel_info { 440 unsigned int channel; 441 __kernel_off_t offset; /* mmap offset */ 442 unsigned int first; /* offset to first sample in bits */ 443 unsigned int step; /* samples distance in bits */ 444 }; 445 446 enum { 447 /* 448 * first definition for backwards compatibility only, 449 * maps to wallclock/link time for HDAudio playback and DEFAULT/DMA time for everything else 450 */ 451 SNDRV_PCM_AUDIO_TSTAMP_TYPE_COMPAT = 0, 452 453 /* timestamp definitions */ 454 SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT = 1, /* DMA time, reported as per hw_ptr */ 455 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK = 2, /* link time reported by sample or wallclock counter, reset on startup */ 456 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ABSOLUTE = 3, /* link time reported by sample or wallclock counter, not reset on startup */ 457 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ESTIMATED = 4, /* link time estimated indirectly */ 458 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED = 5, /* link time synchronized with system time */ 459 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LAST = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED 460 }; 461 462 /* explicit padding avoids incompatibility between i386 and x86-64 */ 463 typedef struct { unsigned char pad[sizeof(time_t) - sizeof(int)]; } __time_pad; 464 465 struct snd_pcm_status { 466 snd_pcm_state_t state; /* stream state */ 467 __time_pad pad1; /* align to timespec */ 468 struct timespec trigger_tstamp; /* time when stream was started/stopped/paused */ 469 struct timespec tstamp; /* reference timestamp */ 470 snd_pcm_uframes_t appl_ptr; /* appl ptr */ 471 snd_pcm_uframes_t hw_ptr; /* hw ptr */ 472 snd_pcm_sframes_t delay; /* current delay in frames */ 473 snd_pcm_uframes_t avail; /* number of frames available */ 474 snd_pcm_uframes_t avail_max; /* max frames available on hw since last status */ 475 snd_pcm_uframes_t overrange; /* count of ADC (capture) overrange detections from last status */ 476 snd_pcm_state_t suspended_state; /* suspended stream state */ 477 __u32 audio_tstamp_data; /* needed for 64-bit alignment, used for configs/report to/from userspace */ 478 struct timespec audio_tstamp; /* sample counter, wall clock, PHC or on-demand sync'ed */ 479 struct timespec driver_tstamp; /* useful in case reference system tstamp is reported with delay */ 480 __u32 audio_tstamp_accuracy; /* in ns units, only valid if indicated in audio_tstamp_data */ 481 unsigned char reserved[52-2*sizeof(struct timespec)]; /* must be filled with zero */ 482 }; 483 484 /* 485 * For mmap operations, we need the 64-bit layout, both for compat mode, 486 * and for y2038 compatibility. For 64-bit applications, the two definitions 487 * are identical, so we keep the traditional version. 488 */ 489 #ifdef __SND_STRUCT_TIME64 490 #define __snd_pcm_mmap_status64 snd_pcm_mmap_status 491 #define __snd_pcm_mmap_control64 snd_pcm_mmap_control 492 #define __snd_pcm_sync_ptr64 snd_pcm_sync_ptr 493 #define __snd_timespec64 timespec 494 struct __snd_timespec { 495 __s32 tv_sec; 496 __s32 tv_nsec; 497 }; 498 #else 499 #define __snd_pcm_mmap_status snd_pcm_mmap_status 500 #define __snd_pcm_mmap_control snd_pcm_mmap_control 501 #define __snd_pcm_sync_ptr snd_pcm_sync_ptr 502 #define __snd_timespec timespec 503 struct __snd_timespec64 { 504 __s64 tv_sec; 505 __s64 tv_nsec; 506 }; 507 508 #endif 509 510 struct __snd_pcm_mmap_status { 511 snd_pcm_state_t state; /* RO: state - SNDRV_PCM_STATE_XXXX */ 512 int pad1; /* Needed for 64 bit alignment */ 513 snd_pcm_uframes_t hw_ptr; /* RO: hw ptr (0...boundary-1) */ 514 struct __snd_timespec tstamp; /* Timestamp */ 515 snd_pcm_state_t suspended_state; /* RO: suspended stream state */ 516 struct __snd_timespec audio_tstamp; /* from sample counter or wall clock */ 517 }; 518 519 struct __snd_pcm_mmap_control { 520 snd_pcm_uframes_t appl_ptr; /* RW: appl ptr (0...boundary-1) */ 521 snd_pcm_uframes_t avail_min; /* RW: min available frames for wakeup */ 522 }; 523 524 #define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0) /* execute hwsync */ 525 #define SNDRV_PCM_SYNC_PTR_APPL (1<<1) /* get appl_ptr from driver (r/w op) */ 526 #define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2) /* get avail_min from driver */ 527 528 struct __snd_pcm_sync_ptr { 529 unsigned int flags; 530 union { 531 struct __snd_pcm_mmap_status status; 532 unsigned char reserved[64]; 533 } s; 534 union { 535 struct __snd_pcm_mmap_control control; 536 unsigned char reserved[64]; 537 } c; 538 }; 539 540 #if defined(__BYTE_ORDER) ? __BYTE_ORDER == __BIG_ENDIAN : defined(__BIG_ENDIAN) 541 typedef char __pad_before_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)]; 542 typedef char __pad_after_uframe[0]; 543 #endif 544 545 #if defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN) 546 typedef char __pad_before_uframe[0]; 547 typedef char __pad_after_uframe[sizeof(__u64) - sizeof(snd_pcm_uframes_t)]; 548 #endif 549 550 struct __snd_pcm_mmap_status64 { 551 snd_pcm_state_t state; /* RO: state - SNDRV_PCM_STATE_XXXX */ 552 __u32 pad1; /* Needed for 64 bit alignment */ 553 __pad_before_uframe __pad1; 554 snd_pcm_uframes_t hw_ptr; /* RO: hw ptr (0...boundary-1) */ 555 __pad_after_uframe __pad2; 556 struct __snd_timespec64 tstamp; /* Timestamp */ 557 snd_pcm_state_t suspended_state;/* RO: suspended stream state */ 558 __u32 pad3; /* Needed for 64 bit alignment */ 559 struct __snd_timespec64 audio_tstamp; /* sample counter or wall clock */ 560 }; 561 562 struct __snd_pcm_mmap_control64 { 563 __pad_before_uframe __pad1; 564 snd_pcm_uframes_t appl_ptr; /* RW: appl ptr (0...boundary-1) */ 565 __pad_before_uframe __pad2; 566 567 __pad_before_uframe __pad3; 568 snd_pcm_uframes_t avail_min; /* RW: min available frames for wakeup */ 569 __pad_after_uframe __pad4; 570 }; 571 572 struct __snd_pcm_sync_ptr64 { 573 __u32 flags; 574 __u32 pad1; 575 union { 576 struct __snd_pcm_mmap_status64 status; 577 unsigned char reserved[64]; 578 } s; 579 union { 580 struct __snd_pcm_mmap_control64 control; 581 unsigned char reserved[64]; 582 } c; 583 }; 584 585 struct snd_xferi { 586 snd_pcm_sframes_t result; 587 void *buf; 588 snd_pcm_uframes_t frames; 589 }; 590 591 struct snd_xfern { 592 snd_pcm_sframes_t result; 593 void * *bufs; 594 snd_pcm_uframes_t frames; 595 }; 596 597 enum { 598 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0, /* gettimeofday equivalent */ 599 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC, /* posix_clock_monotonic equivalent */ 600 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW, /* monotonic_raw (no NTP) */ 601 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW, 602 }; 603 604 /* channel positions */ 605 enum { 606 SNDRV_CHMAP_UNKNOWN = 0, 607 SNDRV_CHMAP_NA, /* N/A, silent */ 608 SNDRV_CHMAP_MONO, /* mono stream */ 609 /* this follows the alsa-lib mixer channel value + 3 */ 610 SNDRV_CHMAP_FL, /* front left */ 611 SNDRV_CHMAP_FR, /* front right */ 612 SNDRV_CHMAP_RL, /* rear left */ 613 SNDRV_CHMAP_RR, /* rear right */ 614 SNDRV_CHMAP_FC, /* front center */ 615 SNDRV_CHMAP_LFE, /* LFE */ 616 SNDRV_CHMAP_SL, /* side left */ 617 SNDRV_CHMAP_SR, /* side right */ 618 SNDRV_CHMAP_RC, /* rear center */ 619 /* new definitions */ 620 SNDRV_CHMAP_FLC, /* front left center */ 621 SNDRV_CHMAP_FRC, /* front right center */ 622 SNDRV_CHMAP_RLC, /* rear left center */ 623 SNDRV_CHMAP_RRC, /* rear right center */ 624 SNDRV_CHMAP_FLW, /* front left wide */ 625 SNDRV_CHMAP_FRW, /* front right wide */ 626 SNDRV_CHMAP_FLH, /* front left high */ 627 SNDRV_CHMAP_FCH, /* front center high */ 628 SNDRV_CHMAP_FRH, /* front right high */ 629 SNDRV_CHMAP_TC, /* top center */ 630 SNDRV_CHMAP_TFL, /* top front left */ 631 SNDRV_CHMAP_TFR, /* top front right */ 632 SNDRV_CHMAP_TFC, /* top front center */ 633 SNDRV_CHMAP_TRL, /* top rear left */ 634 SNDRV_CHMAP_TRR, /* top rear right */ 635 SNDRV_CHMAP_TRC, /* top rear center */ 636 /* new definitions for UAC2 */ 637 SNDRV_CHMAP_TFLC, /* top front left center */ 638 SNDRV_CHMAP_TFRC, /* top front right center */ 639 SNDRV_CHMAP_TSL, /* top side left */ 640 SNDRV_CHMAP_TSR, /* top side right */ 641 SNDRV_CHMAP_LLFE, /* left LFE */ 642 SNDRV_CHMAP_RLFE, /* right LFE */ 643 SNDRV_CHMAP_BC, /* bottom center */ 644 SNDRV_CHMAP_BLC, /* bottom left center */ 645 SNDRV_CHMAP_BRC, /* bottom right center */ 646 SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC, 647 }; 648 649 #define SNDRV_CHMAP_POSITION_MASK 0xffff 650 #define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16) 651 #define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16) 652 653 #define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int) 654 #define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info) 655 #define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int) 656 #define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int) 657 #define SNDRV_PCM_IOCTL_USER_PVERSION _IOW('A', 0x04, int) 658 #define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params) 659 #define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params) 660 #define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12) 661 #define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params) 662 #define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status) 663 #define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t) 664 #define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22) 665 #define __SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct __snd_pcm_sync_ptr) 666 #define __SNDRV_PCM_IOCTL_SYNC_PTR64 _IOWR('A', 0x23, struct __snd_pcm_sync_ptr64) 667 #define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr) 668 #define SNDRV_PCM_IOCTL_STATUS_EXT _IOWR('A', 0x24, struct snd_pcm_status) 669 #define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info) 670 #define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40) 671 #define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41) 672 #define SNDRV_PCM_IOCTL_START _IO('A', 0x42) 673 #define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43) 674 #define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44) 675 #define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int) 676 #define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t) 677 #define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47) 678 #define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48) 679 #define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t) 680 #define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi) 681 #define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi) 682 #define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern) 683 #define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern) 684 #define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int) 685 #define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61) 686 687 /***************************************************************************** 688 * * 689 * MIDI v1.0 interface * 690 * * 691 *****************************************************************************/ 692 693 /* 694 * Raw MIDI section - /dev/snd/midi?? 695 */ 696 697 #define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 2) 698 699 enum { 700 SNDRV_RAWMIDI_STREAM_OUTPUT = 0, 701 SNDRV_RAWMIDI_STREAM_INPUT, 702 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT, 703 }; 704 705 #define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001 706 #define SNDRV_RAWMIDI_INFO_INPUT 0x00000002 707 #define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004 708 709 struct snd_rawmidi_info { 710 unsigned int device; /* RO/WR (control): device number */ 711 unsigned int subdevice; /* RO/WR (control): subdevice number */ 712 int stream; /* WR: stream */ 713 int card; /* R: card number */ 714 unsigned int flags; /* SNDRV_RAWMIDI_INFO_XXXX */ 715 unsigned char id[64]; /* ID (user selectable) */ 716 unsigned char name[80]; /* name of device */ 717 unsigned char subname[32]; /* name of active or selected subdevice */ 718 unsigned int subdevices_count; 719 unsigned int subdevices_avail; 720 unsigned char reserved[64]; /* reserved for future use */ 721 }; 722 723 #define SNDRV_RAWMIDI_MODE_FRAMING_MASK (7<<0) 724 #define SNDRV_RAWMIDI_MODE_FRAMING_SHIFT 0 725 #define SNDRV_RAWMIDI_MODE_FRAMING_NONE (0<<0) 726 #define SNDRV_RAWMIDI_MODE_FRAMING_TSTAMP (1<<0) 727 #define SNDRV_RAWMIDI_MODE_CLOCK_MASK (7<<3) 728 #define SNDRV_RAWMIDI_MODE_CLOCK_SHIFT 3 729 #define SNDRV_RAWMIDI_MODE_CLOCK_NONE (0<<3) 730 #define SNDRV_RAWMIDI_MODE_CLOCK_REALTIME (1<<3) 731 #define SNDRV_RAWMIDI_MODE_CLOCK_MONOTONIC (2<<3) 732 #define SNDRV_RAWMIDI_MODE_CLOCK_MONOTONIC_RAW (3<<3) 733 734 #define SNDRV_RAWMIDI_FRAMING_DATA_LENGTH 16 735 736 struct snd_rawmidi_framing_tstamp { 737 /* For now, frame_type is always 0. Midi 2.0 is expected to add new 738 * types here. Applications are expected to skip unknown frame types. 739 */ 740 __u8 frame_type; 741 __u8 length; /* number of valid bytes in data field */ 742 __u8 reserved[2]; 743 __u32 tv_nsec; /* nanoseconds */ 744 __u64 tv_sec; /* seconds */ 745 __u8 data[SNDRV_RAWMIDI_FRAMING_DATA_LENGTH]; 746 } __attribute__((packed)); 747 748 struct snd_rawmidi_params { 749 int stream; 750 size_t buffer_size; /* queue size in bytes */ 751 size_t avail_min; /* minimum avail bytes for wakeup */ 752 unsigned int no_active_sensing: 1; /* do not send active sensing byte in close() */ 753 unsigned int mode; /* For input data only, frame incoming data */ 754 unsigned char reserved[12]; /* reserved for future use */ 755 }; 756 757 struct snd_rawmidi_status { 758 int stream; 759 __time_pad pad1; 760 struct timespec tstamp; /* Timestamp */ 761 size_t avail; /* available bytes */ 762 size_t xruns; /* count of overruns since last status (in bytes) */ 763 unsigned char reserved[16]; /* reserved for future use */ 764 }; 765 766 #define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int) 767 #define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info) 768 #define SNDRV_RAWMIDI_IOCTL_USER_PVERSION _IOW('W', 0x02, int) 769 #define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params) 770 #define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status) 771 #define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int) 772 #define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int) 773 774 /* 775 * Timer section - /dev/snd/timer 776 */ 777 778 #define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7) 779 780 enum { 781 SNDRV_TIMER_CLASS_NONE = -1, 782 SNDRV_TIMER_CLASS_SLAVE = 0, 783 SNDRV_TIMER_CLASS_GLOBAL, 784 SNDRV_TIMER_CLASS_CARD, 785 SNDRV_TIMER_CLASS_PCM, 786 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM, 787 }; 788 789 /* slave timer classes */ 790 enum { 791 SNDRV_TIMER_SCLASS_NONE = 0, 792 SNDRV_TIMER_SCLASS_APPLICATION, 793 SNDRV_TIMER_SCLASS_SEQUENCER, /* alias */ 794 SNDRV_TIMER_SCLASS_OSS_SEQUENCER, /* alias */ 795 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER, 796 }; 797 798 /* global timers (device member) */ 799 #define SNDRV_TIMER_GLOBAL_SYSTEM 0 800 #define SNDRV_TIMER_GLOBAL_RTC 1 /* unused */ 801 #define SNDRV_TIMER_GLOBAL_HPET 2 802 #define SNDRV_TIMER_GLOBAL_HRTIMER 3 803 804 /* info flags */ 805 #define SNDRV_TIMER_FLG_SLAVE (1<<0) /* cannot be controlled */ 806 807 struct snd_timer_id { 808 int dev_class; 809 int dev_sclass; 810 int card; 811 int device; 812 int subdevice; 813 }; 814 815 struct snd_timer_ginfo { 816 struct snd_timer_id tid; /* requested timer ID */ 817 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */ 818 int card; /* card number */ 819 unsigned char id[64]; /* timer identification */ 820 unsigned char name[80]; /* timer name */ 821 unsigned long reserved0; /* reserved for future use */ 822 unsigned long resolution; /* average period resolution in ns */ 823 unsigned long resolution_min; /* minimal period resolution in ns */ 824 unsigned long resolution_max; /* maximal period resolution in ns */ 825 unsigned int clients; /* active timer clients */ 826 unsigned char reserved[32]; 827 }; 828 829 struct snd_timer_gparams { 830 struct snd_timer_id tid; /* requested timer ID */ 831 unsigned long period_num; /* requested precise period duration (in seconds) - numerator */ 832 unsigned long period_den; /* requested precise period duration (in seconds) - denominator */ 833 unsigned char reserved[32]; 834 }; 835 836 struct snd_timer_gstatus { 837 struct snd_timer_id tid; /* requested timer ID */ 838 unsigned long resolution; /* current period resolution in ns */ 839 unsigned long resolution_num; /* precise current period resolution (in seconds) - numerator */ 840 unsigned long resolution_den; /* precise current period resolution (in seconds) - denominator */ 841 unsigned char reserved[32]; 842 }; 843 844 struct snd_timer_select { 845 struct snd_timer_id id; /* bind to timer ID */ 846 unsigned char reserved[32]; /* reserved */ 847 }; 848 849 struct snd_timer_info { 850 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */ 851 int card; /* card number */ 852 unsigned char id[64]; /* timer identificator */ 853 unsigned char name[80]; /* timer name */ 854 unsigned long reserved0; /* reserved for future use */ 855 unsigned long resolution; /* average period resolution in ns */ 856 unsigned char reserved[64]; /* reserved */ 857 }; 858 859 #define SNDRV_TIMER_PSFLG_AUTO (1<<0) /* auto start, otherwise one-shot */ 860 #define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1) /* exclusive use, precise start/stop/pause/continue */ 861 #define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2) /* write early event to the poll queue */ 862 863 struct snd_timer_params { 864 unsigned int flags; /* flags - SNDRV_TIMER_PSFLG_* */ 865 unsigned int ticks; /* requested resolution in ticks */ 866 unsigned int queue_size; /* total size of queue (32-1024) */ 867 unsigned int reserved0; /* reserved, was: failure locations */ 868 unsigned int filter; /* event filter (bitmask of SNDRV_TIMER_EVENT_*) */ 869 unsigned char reserved[60]; /* reserved */ 870 }; 871 872 struct snd_timer_status { 873 struct timespec tstamp; /* Timestamp - last update */ 874 unsigned int resolution; /* current period resolution in ns */ 875 unsigned int lost; /* counter of master tick lost */ 876 unsigned int overrun; /* count of read queue overruns */ 877 unsigned int queue; /* used queue size */ 878 unsigned char reserved[64]; /* reserved */ 879 }; 880 881 #define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int) 882 #define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id) 883 #define SNDRV_TIMER_IOCTL_TREAD_OLD _IOW('T', 0x02, int) 884 #define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo) 885 #define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams) 886 #define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus) 887 #define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select) 888 #define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info) 889 #define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params) 890 #define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status) 891 /* The following four ioctls are changed since 1.0.9 due to confliction */ 892 #define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0) 893 #define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1) 894 #define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2) 895 #define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3) 896 #define SNDRV_TIMER_IOCTL_TREAD64 _IOW('T', 0xa4, int) 897 898 #if __BITS_PER_LONG == 64 899 #define SNDRV_TIMER_IOCTL_TREAD SNDRV_TIMER_IOCTL_TREAD_OLD 900 #else 901 #define SNDRV_TIMER_IOCTL_TREAD ((sizeof(__kernel_long_t) >= sizeof(time_t)) ? \ 902 SNDRV_TIMER_IOCTL_TREAD_OLD : \ 903 SNDRV_TIMER_IOCTL_TREAD64) 904 #endif 905 906 struct snd_timer_read { 907 unsigned int resolution; 908 unsigned int ticks; 909 }; 910 911 enum { 912 SNDRV_TIMER_EVENT_RESOLUTION = 0, /* val = resolution in ns */ 913 SNDRV_TIMER_EVENT_TICK, /* val = ticks */ 914 SNDRV_TIMER_EVENT_START, /* val = resolution in ns */ 915 SNDRV_TIMER_EVENT_STOP, /* val = 0 */ 916 SNDRV_TIMER_EVENT_CONTINUE, /* val = resolution in ns */ 917 SNDRV_TIMER_EVENT_PAUSE, /* val = 0 */ 918 SNDRV_TIMER_EVENT_EARLY, /* val = 0, early event */ 919 SNDRV_TIMER_EVENT_SUSPEND, /* val = 0 */ 920 SNDRV_TIMER_EVENT_RESUME, /* val = resolution in ns */ 921 /* master timer events for slave timer instances */ 922 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10, 923 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10, 924 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10, 925 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10, 926 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10, 927 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10, 928 }; 929 930 struct snd_timer_tread { 931 int event; 932 __time_pad pad1; 933 struct timespec tstamp; 934 unsigned int val; 935 __time_pad pad2; 936 }; 937 938 /**************************************************************************** 939 * * 940 * Section for driver control interface - /dev/snd/control? * 941 * * 942 ****************************************************************************/ 943 944 #define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 8) 945 946 struct snd_ctl_card_info { 947 int card; /* card number */ 948 int pad; /* reserved for future (was type) */ 949 unsigned char id[16]; /* ID of card (user selectable) */ 950 unsigned char driver[16]; /* Driver name */ 951 unsigned char name[32]; /* Short name of soundcard */ 952 unsigned char longname[80]; /* name + info text about soundcard */ 953 unsigned char reserved_[16]; /* reserved for future (was ID of mixer) */ 954 unsigned char mixername[80]; /* visual mixer identification */ 955 unsigned char components[128]; /* card components / fine identification, delimited with one space (AC97 etc..) */ 956 }; 957 958 typedef int __bitwise snd_ctl_elem_type_t; 959 #define SNDRV_CTL_ELEM_TYPE_NONE ((snd_ctl_elem_type_t) 0) /* invalid */ 960 #define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((snd_ctl_elem_type_t) 1) /* boolean type */ 961 #define SNDRV_CTL_ELEM_TYPE_INTEGER ((snd_ctl_elem_type_t) 2) /* integer type */ 962 #define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((snd_ctl_elem_type_t) 3) /* enumerated type */ 963 #define SNDRV_CTL_ELEM_TYPE_BYTES ((snd_ctl_elem_type_t) 4) /* byte array */ 964 #define SNDRV_CTL_ELEM_TYPE_IEC958 ((snd_ctl_elem_type_t) 5) /* IEC958 (S/PDIF) setup */ 965 #define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((snd_ctl_elem_type_t) 6) /* 64-bit integer type */ 966 #define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64 967 968 typedef int __bitwise snd_ctl_elem_iface_t; 969 #define SNDRV_CTL_ELEM_IFACE_CARD ((snd_ctl_elem_iface_t) 0) /* global control */ 970 #define SNDRV_CTL_ELEM_IFACE_HWDEP ((snd_ctl_elem_iface_t) 1) /* hardware dependent device */ 971 #define SNDRV_CTL_ELEM_IFACE_MIXER ((snd_ctl_elem_iface_t) 2) /* virtual mixer device */ 972 #define SNDRV_CTL_ELEM_IFACE_PCM ((snd_ctl_elem_iface_t) 3) /* PCM device */ 973 #define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((snd_ctl_elem_iface_t) 4) /* RawMidi device */ 974 #define SNDRV_CTL_ELEM_IFACE_TIMER ((snd_ctl_elem_iface_t) 5) /* timer device */ 975 #define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((snd_ctl_elem_iface_t) 6) /* sequencer client */ 976 #define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER 977 978 #define SNDRV_CTL_ELEM_ACCESS_READ (1<<0) 979 #define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1) 980 #define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE) 981 #define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2) /* control value may be changed without a notification */ 982 /* (1 << 3) is unused. */ 983 #define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1<<4) /* TLV read is possible */ 984 #define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1<<5) /* TLV write is possible */ 985 #define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ|SNDRV_CTL_ELEM_ACCESS_TLV_WRITE) 986 #define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1<<6) /* TLV command is possible */ 987 #define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8) /* control does actually nothing, but may be updated */ 988 #define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9) /* write lock */ 989 #define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10) /* write lock owner */ 990 #define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1<<28) /* kernel use a TLV callback */ 991 #define SNDRV_CTL_ELEM_ACCESS_USER (1<<29) /* user space element */ 992 /* bits 30 and 31 are obsoleted (for indirect access) */ 993 994 /* for further details see the ACPI and PCI power management specification */ 995 #define SNDRV_CTL_POWER_D0 0x0000 /* full On */ 996 #define SNDRV_CTL_POWER_D1 0x0100 /* partial On */ 997 #define SNDRV_CTL_POWER_D2 0x0200 /* partial On */ 998 #define SNDRV_CTL_POWER_D3 0x0300 /* Off */ 999 #define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000) /* Off, with power */ 1000 #define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001) /* Off, without power */ 1001 1002 #define SNDRV_CTL_ELEM_ID_NAME_MAXLEN 44 1003 1004 struct snd_ctl_elem_id { 1005 unsigned int numid; /* numeric identifier, zero = invalid */ 1006 snd_ctl_elem_iface_t iface; /* interface identifier */ 1007 unsigned int device; /* device/client number */ 1008 unsigned int subdevice; /* subdevice (substream) number */ 1009 unsigned char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; /* ASCII name of item */ 1010 unsigned int index; /* index of item */ 1011 }; 1012 1013 struct snd_ctl_elem_list { 1014 unsigned int offset; /* W: first element ID to get */ 1015 unsigned int space; /* W: count of element IDs to get */ 1016 unsigned int used; /* R: count of element IDs set */ 1017 unsigned int count; /* R: count of all elements */ 1018 struct snd_ctl_elem_id *pids; /* R: IDs */ 1019 unsigned char reserved[50]; 1020 }; 1021 1022 struct snd_ctl_elem_info { 1023 struct snd_ctl_elem_id id; /* W: element ID */ 1024 snd_ctl_elem_type_t type; /* R: value type - SNDRV_CTL_ELEM_TYPE_* */ 1025 unsigned int access; /* R: value access (bitmask) - SNDRV_CTL_ELEM_ACCESS_* */ 1026 unsigned int count; /* count of values */ 1027 __kernel_pid_t owner; /* owner's PID of this control */ 1028 union { 1029 struct { 1030 long min; /* R: minimum value */ 1031 long max; /* R: maximum value */ 1032 long step; /* R: step (0 variable) */ 1033 } integer; 1034 struct { 1035 long long min; /* R: minimum value */ 1036 long long max; /* R: maximum value */ 1037 long long step; /* R: step (0 variable) */ 1038 } integer64; 1039 struct { 1040 unsigned int items; /* R: number of items */ 1041 unsigned int item; /* W: item number */ 1042 char name[64]; /* R: value name */ 1043 __u64 names_ptr; /* W: names list (ELEM_ADD only) */ 1044 unsigned int names_length; 1045 } enumerated; 1046 unsigned char reserved[128]; 1047 } value; 1048 unsigned char reserved[64]; 1049 }; 1050 1051 struct snd_ctl_elem_value { 1052 struct snd_ctl_elem_id id; /* W: element ID */ 1053 unsigned int indirect: 1; /* W: indirect access - obsoleted */ 1054 union { 1055 union { 1056 long value[128]; 1057 long *value_ptr; /* obsoleted */ 1058 } integer; 1059 union { 1060 long long value[64]; 1061 long long *value_ptr; /* obsoleted */ 1062 } integer64; 1063 union { 1064 unsigned int item[128]; 1065 unsigned int *item_ptr; /* obsoleted */ 1066 } enumerated; 1067 union { 1068 unsigned char data[512]; 1069 unsigned char *data_ptr; /* obsoleted */ 1070 } bytes; 1071 struct snd_aes_iec958 iec958; 1072 } value; /* RO */ 1073 unsigned char reserved[128]; 1074 }; 1075 1076 struct snd_ctl_tlv { 1077 unsigned int numid; /* control element numeric identification */ 1078 unsigned int length; /* in bytes aligned to 4 */ 1079 unsigned int tlv[]; /* first TLV */ 1080 }; 1081 1082 #define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int) 1083 #define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info) 1084 #define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list) 1085 #define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info) 1086 #define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value) 1087 #define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value) 1088 #define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id) 1089 #define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id) 1090 #define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int) 1091 #define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info) 1092 #define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info) 1093 #define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id) 1094 #define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv) 1095 #define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv) 1096 #define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv) 1097 #define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int) 1098 #define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info) 1099 #define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int) 1100 #define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info) 1101 #define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int) 1102 #define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int) 1103 #define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info) 1104 #define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int) 1105 #define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int) 1106 #define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int) 1107 1108 /* 1109 * Read interface. 1110 */ 1111 1112 enum sndrv_ctl_event_type { 1113 SNDRV_CTL_EVENT_ELEM = 0, 1114 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM, 1115 }; 1116 1117 #define SNDRV_CTL_EVENT_MASK_VALUE (1<<0) /* element value was changed */ 1118 #define SNDRV_CTL_EVENT_MASK_INFO (1<<1) /* element info was changed */ 1119 #define SNDRV_CTL_EVENT_MASK_ADD (1<<2) /* element was added */ 1120 #define SNDRV_CTL_EVENT_MASK_TLV (1<<3) /* element TLV tree was changed */ 1121 #define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) /* element was removed */ 1122 1123 struct snd_ctl_event { 1124 int type; /* event type - SNDRV_CTL_EVENT_* */ 1125 union { 1126 struct { 1127 unsigned int mask; 1128 struct snd_ctl_elem_id id; 1129 } elem; 1130 unsigned char data8[60]; 1131 } data; 1132 }; 1133 1134 /* 1135 * Control names 1136 */ 1137 1138 #define SNDRV_CTL_NAME_NONE "" 1139 #define SNDRV_CTL_NAME_PLAYBACK "Playback " 1140 #define SNDRV_CTL_NAME_CAPTURE "Capture " 1141 1142 #define SNDRV_CTL_NAME_IEC958_NONE "" 1143 #define SNDRV_CTL_NAME_IEC958_SWITCH "Switch" 1144 #define SNDRV_CTL_NAME_IEC958_VOLUME "Volume" 1145 #define SNDRV_CTL_NAME_IEC958_DEFAULT "Default" 1146 #define SNDRV_CTL_NAME_IEC958_MASK "Mask" 1147 #define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask" 1148 #define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask" 1149 #define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream" 1150 #define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what 1151 1152 #endif /* __SOUND_ASOUND_H */ 1153