1 /*
2  * Driver interface for the AB State Manager
3  *
4  * Copyright (C) 2018 Google, Inc.
5  *
6  * This software is licensed under the terms of the GNU General Public
7  * License version 2, as published by the Free Software Foundation, and
8  * may be copied, distributed, and modified under those terms.
9  *
10  * This program is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15 
16 #ifndef __UAPI_AB_SM_H__
17 #define __UAPI_AB_SM_H__
18 
19 #include <linux/ioctl.h>
20 
21 #define AB_SM_FATAL_EL2_ERROR_FLAG	0x01
22 #define AB_SM_COMPUTE_READY_MASK	0x01
23 #define AB_SM_DRAM_INTACT_MASK		0x02
24 
25 #define AB_SM_IOCTL_MAGIC	'a'
26 
27 /* Enters secure state. Blocks until ready.
28  * On success will return 0, otherwise will return error < 0.
29  * -ETIMEDOUT: state change for thermal disabling timed out.
30  * -EBUSY: already throttled to suspend due to system overheated.
31  */
32 #define AB_SM_ENTER_EL2		_IO(AB_SM_IOCTL_MAGIC, 3)
33 
34 /* Exits secure state and blocks until cleanup is complete.
35  * On success will return 0, otherwise will return error < 0.
36  */
37 #define AB_SM_EXIT_EL2		_IO(AB_SM_IOCTL_MAGIC, 4)
38 
39 /*
40  * WARNING: Debug only, will be removed in production
41  * Parameter int:
42  *	Pass new frequency value to set
43  * On success will return 0, otherwise will return error < 0.
44  */
45 #define AB_SM_SET_IPU_FREQUENCY	_IOW(AB_SM_IOCTL_MAGIC, 5, int)
46 
47 /*
48  * WARNING: Debug only, will be removed in production
49  * Parameter int:
50  *	Pass new frequency value to set
51  * On success will return 0, otherwise will return error < 0.
52  */
53 #define AB_SM_SET_TPU_FREQUENCY	_IOW(AB_SM_IOCTL_MAGIC, 6, int)
54 
55 /*
56  * WARNING: Debug only, will be removed in production
57  * Parameter int:
58  *	Pass new frequency value to set
59  * On success will return 0, otherwise will return error < 0.
60  */
61 #define AB_SM_SET_DDR_FREQUENCY	_IOW(AB_SM_IOCTL_MAGIC, 7, int)
62 
63 /*
64  * WARNING: Debug only, will be removed in production
65  * Parameter int:
66  *	Pass new frequency value to set
67  * On success will return 0, otherwise will return error < 0.
68  */
69 #define AB_SM_SET_PCIE_FREQUENCY	_IOW(AB_SM_IOCTL_MAGIC, 8, int)
70 
71 /*
72  * WARNING: Debug only, will be removed in production
73  * Parameter int:
74  *	Pass new frequency value to set
75  * On success will return 0, otherwise will return error < 0.
76  */
77 #define AB_SM_SET_AON_FREQUENCY	_IOW(AB_SM_IOCTL_MAGIC, 9, int)
78 
79 /*
80  * WARNING: Debug only, will be removed in production
81  * Parameter int:
82  *	Pass new low power state value to set
83  * On success will return 0, otherwise will return error < 0.
84  */
85 #define AB_SM_SET_IPU_STATE	_IOW(AB_SM_IOCTL_MAGIC, 10, int)
86 
87 /*
88  * WARNING: Debug only, will be removed in production
89  * Parameter int:
90  *	Pass new low power state value to set
91  * On success will return 0, otherwise will return error < 0.
92  */
93 #define AB_SM_SET_TPU_STATE	_IOW(AB_SM_IOCTL_MAGIC, 11, int)
94 
95 /*
96  * WARNING: Debug only, will be removed in production
97  * Parameter int:
98  *	Pass new low power state value to set
99  * On success will return 0, otherwise will return error < 0.
100  */
101 #define AB_SM_SET_DDR_STATE	_IOW(AB_SM_IOCTL_MAGIC, 12, int)
102 
103 /*
104  * WARNING: Debug only, will be removed in production
105  * Parameter int:
106  *	Pass new low power state value to set
107  * On success will return 0, otherwise will return error < 0.
108  */
109 #define AB_SM_SET_PCIE_STATE	_IOW(AB_SM_IOCTL_MAGIC, 13, int)
110 
111 /*
112  * WARNING: Debug only, will be removed in production
113  * Parameter struct new_block_props *:
114  *	Pass new ipu state properties
115  * On success will return 0, otherwise will return error < 0.
116  */
117 #define AB_SM_UPDATE_IPU_STATE_PROPERTIES	_IOW(AB_SM_IOCTL_MAGIC, 14, \
118 		struct new_block_props *)
119 
120 /*
121  * WARNING: Debug only, will be removed in production
122  * Parameter struct new_block_props *:
123  *	Pass new tpu state properties
124  * On success will return 0, otherwise will return error < 0.
125  */
126 #define AB_SM_UPDATE_TPU_STATE_PROPERTIES	_IOW(AB_SM_IOCTL_MAGIC, 15, \
127 		struct new_block_props *)
128 
129 /*
130  * WARNING: Debug only, will be removed in production
131  * Parameter struct new_block_props *:
132  *	Pass new dram state properties
133  * On success will return 0, otherwise will return error < 0.
134  */
135 #define AB_SM_UPDATE_DRAM_STATE_PROPERTIES	_IOW(AB_SM_IOCTL_MAGIC, 16, \
136 		struct new_block_props *)
137 
138 /*
139  * WARNING: Debug only, will be removed in production
140  * Parameter struct new_block_props *:
141  *	Pass new mif state properties
142  * On success will return 0, otherwise will return error < 0.
143  */
144 #define AB_SM_UPDATE_MIF_STATE_PROPERTIES	_IOW(AB_SM_IOCTL_MAGIC, 17, \
145 		struct new_block_props *)
146 
147 /*
148  * WARNING: Debug only, will be removed in production
149  * Parameter struct new_block_props *:
150  *	Pass new fsys state properties
151  * On success will return 0, otherwise will return error < 0.
152  */
153 #define AB_SM_UPDATE_FSYS_STATE_PROPERTIES	_IOW(AB_SM_IOCTL_MAGIC, 18, \
154 		struct new_block_props *)
155 
156 /*
157  * WARNING: Debug only, will be removed in production
158  * Parameter struct new_block_props *:
159  *	Pass new aon state properties
160  * On success will return 0, otherwise will return error < 0.
161  */
162 #define AB_SM_UPDATE_AON_STATE_PROPERTIES	_IOW(AB_SM_IOCTL_MAGIC, 19, \
163 		struct new_block_props *)
164 
165 /*
166  * Parameter int *:
167  *	Pass pointer to integer to be filled in with state value
168  *	On success will return 0, otherwise will return error < 0.
169  */
170 #define AB_SM_GET_EL2_MODE	_IOR(AB_SM_IOCTL_MAGIC, 20, int *)
171 
172 /* First call after open will immediately return the current
173  * state. Subsequent calls will block until next state change,
174  * then return the new state.
175  *
176  * Parameter int *:
177  *	Pass pointer to integer to be filled in with mapped state value
178  * On success will return 0, otherwise will return error < 0.
179  */
180 #define AB_SM_MAPPED_ASYNC_NOTIFY	_IOR(AB_SM_IOCTL_MAGIC, 21, int *)
181 
182 /*
183  * Parameter int:
184  *	Pass mapped state value to set
185  * On success will return 0, otherwise will return error < 0.
186  * Note: State changes are not allowed after calling AB_SM_ENTER_EL2
187  *     until subsequently calling AB_SM_EXIT EL2.
188  *     All calls to AB_SM_SET_STATE will fail with -ENODEV
189  *     during that time.
190  */
191 #define AB_SM_MAPPED_SET_STATE		_IOW(AB_SM_IOCTL_MAGIC, 22, int)
192 
193 /*
194  * Parameter int *:
195  *	Pass pointer to integer to be filled in with mapped state value
196  * On success will return 0, otherwise will return error < 0.
197  */
198 #define AB_SM_MAPPED_GET_STATE		_IOR(AB_SM_IOCTL_MAGIC, 23, int *)
199 
200 /*
201  * WARNING: Debug only, will be removed in production
202  * Parameter int:
203  *	Pass new L1ss entry delay to set
204  * On success will return 0, otherwise will return error < 0.
205  */
206 #define AB_SM_SET_PCIE_L1SS_DELAY  _IOW(AB_SM_IOCTL_MAGIC, 24, int)
207 
208 /*
209  * Call will block until there is a throttle to no-compute
210  * event.
211  *
212  * Parameter int*:
213  *  Bit [0:0] (compute_ready): On return if bit is set to 0,
214  *     caller is expected to prepare for a no-compute scenario,
215  *     and then call back into this ioctl. The throttle event will
216  *     wait until all listeners call back into this ioctl, or a timeout occurs.
217  *     On return if bit is set to 1, the no-compute scenario
218  *     is over and normal operation can continue. Caller is expected to
219  *     call back into this ioctl to signal it has received the message.
220  *  Bit [1:1] (dram_intact): On return if compute_ready is set to 1, this
221  *     bit signals whether the DRAM remained valid during the compute-not-ready
222  *     state. If dram_intact bit is set to 1, DRAM data is still valid.
223  *     Otherwise, DRAM data was lost.
224  *     This bit should be ignored if compute_ready bit is 0.
225  */
226 #define AB_SM_COMPUTE_READY_NOTIFY	_IOR(AB_SM_IOCTL_MAGIC, 25, int *)
227 
228 /*
229  * WARNING: Debug only, will be removed in production
230  * Parameter int:
231  *  Pass new throttle level to set
232  *  THROTTLE_NONE	= 0
233  *  THROTTLE_TO_MID	= 1
234  *  THROTTLE_TO_LOW	= 2
235  *  THROTTLE_TO_MIN = 3
236  *  THROTTLE_NOCOMPUTE = 4
237  *
238  * On success will return 0, otherwise will return error < 0.
239  */
240 #define AB_SM_SET_THROTTLE_LEVEL		_IOW(AB_SM_IOCTL_MAGIC, 26, int)
241 
242 /*
243  * WARNING: Debug only, will be removed in production
244  * Parameter int:
245  *  Pass 0 to disable all throttling
246  *  Pass 1 to enable all throttling
247  *
248  * On success will return 0, otherwise will return error < 0.
249  */
250 #define AB_SM_ENABLE_THERMAL			_IOW(AB_SM_IOCTL_MAGIC, 27, int)
251 
252 /* Exits secure state and blocks until cleanup is complete.
253  * Parameter int:
254  *  Bitwise flag param used to notify ABSM of any issues
255  *  which occurred during EL2 mode.
256  *   Bit  [0]    - AB_SM_FATAL_EL2_ERROR_FLAG - A reset occurred during EL2
257  *   Bits [1:31] - Reserved
258  * On success will return 0, otherwise will return error < 0.
259  */
260 #define AB_SM_EXIT_EL2_WITH_FLAG		_IOW(AB_SM_IOCTL_MAGIC, 28, int)
261 
262 /* Get the current thermal (aka throttle) level.
263  * Parameter int *:
264  *   Filled in with current thermal level, which is a value
265  *   ranging from 0 - 4.
266  *   Level 0: No throttling is present
267  *   Level 1: Minimum throttle level, IPU/TPU clocks reduced
268  *   Level 2: Medium throttle level, IPU/TPU clocks reduced further
269  *   Level 3: High throttle level, IPU/TPU clocks reduced further
270  *   Level 4: Maximum throttle level, IPU/TPU blocks off, AB placed in S100
271  */
272 #define AB_SM_GET_THERMAL_LEVEL		_IOR(AB_SM_IOCTL_MAGIC, 29, int *)
273 
274 #define AB_CHIP_ID_UNKNOWN	-1
275 #define AB_CHIP_ID_A0		0
276 #define AB_CHIP_ID_B0		1
277 
278 #define UAPI_BLK_(num, pmu, rail, v, clk, freq, pwr, used, tiles, dr) \
279 	{					\
280 		UAPI_BLOCK_STATE_ ## num,	\
281 		(enum uapi_pmu_state)pmu,	\
282 		uapi_ ## rail,			\
283 		UAPI_VOLTAGE_ ## v,		\
284 		uapi_ ## clk,			\
285 		(__u64)(1000000. * freq),	\
286 		pwr,				\
287 		used,				\
288 		tiles,				\
289 		dr,				\
290 	}
291 
292 /* Keep in sync with enum block_state in airbrush-sm-ctrl.h. */
293 #define AB_SM_UAPI_NUM_BLOCK_STATES	12
294 enum uapi_block_state {
295 	UAPI_BLOCK_STATE_0 = 0,
296 	UAPI_BLOCK_STATE_100 = 100,
297 	UAPI_BLOCK_STATE_101,
298 	UAPI_BLOCK_STATE_200 = 200,
299 	UAPI_BLOCK_STATE_201,
300 	UAPI_BLOCK_STATE_202,
301 	UAPI_BLOCK_STATE_300 = 300,
302 	UAPI_BLOCK_STATE_301,
303 	UAPI_BLOCK_STATE_302,
304 	UAPI_BLOCK_STATE_303,
305 	UAPI_BLOCK_STATE_304,
306 	UAPI_BLOCK_STATE_305,
307 };
308 
309 /* Keep in sync with enum pmu_states in airbrush_sm_ctrl.h. */
310 enum uapi_pmu_state {
311 	UAPI_PMU_STATE_ON = 0,
312 	UAPI_PMU_STATE_SLEEP,
313 	UAPI_PMU_STATE_DEEP_SLEEP,
314 	UAPI_PMU_STATE_OFF
315 };
316 
317 /* Keep in sync with enum states in airbrush-sm-ctrl.h. */
318 enum uapi_state {
319 	uapi_off = 0,
320 	uapi_on = 1,
321 };
322 
323 /* Keep in sync with enum logic_voltage in airbrush-sm-ctrl.h. */
324 enum uapi_logic_voltage {
325 	UAPI_VOLTAGE_0_0,
326 	UAPI_VOLTAGE_0_60,
327 	UAPI_VOLTAGE_0_75,
328 	UAPI_VOLTAGE_0_85,
329 };
330 
331 /**
332  * Stores information of the soc block's operating state.
333  * Similar to struct block_property in airbrush-sm-ctrl.h.
334  */
335 struct uapi_block_properties {
336 	enum uapi_block_state id;
337 	enum uapi_pmu_state pmu;
338 	enum uapi_state rail_en;
339 	enum uapi_logic_voltage logic_voltage;
340 	enum uapi_state clk_status;
341 	__u64 clk_frequency;
342 	__u32 num_powered_cores;
343 	__u32 num_computing_cores;
344 	__u32 num_powered_tiles;
345 	__u32 data_rate;
346 };
347 
348 struct new_block_props {
349 	struct uapi_block_properties table[AB_SM_UAPI_NUM_BLOCK_STATES];
350 };
351 
352 
353 #endif /* __UAPI_AB_SM_H__ */
354