1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __SAMSUNG_DRM_H__ 20 #define __SAMSUNG_DRM_H__ 21 #ifdef __linux__ 22 #include <linux/types.h> 23 #endif 24 #include "drm.h" 25 #ifdef __cplusplus 26 extern "C" { 27 #endif 28 #define DRM_SAMSUNG_HDR_EOTF_LUT_LEN 129 29 struct hdr_eotf_lut { 30 __u16 posx[DRM_SAMSUNG_HDR_EOTF_LUT_LEN]; 31 __u32 posy[DRM_SAMSUNG_HDR_EOTF_LUT_LEN]; 32 }; 33 #define DRM_SAMSUNG_HDR_OETF_LUT_LEN 33 34 struct hdr_oetf_lut { 35 __u16 posx[DRM_SAMSUNG_HDR_OETF_LUT_LEN]; 36 __u16 posy[DRM_SAMSUNG_HDR_OETF_LUT_LEN]; 37 }; 38 #define DRM_SAMSUNG_HDR_GM_DIMENS 3 39 struct hdr_gm_data { 40 __u32 coeffs[DRM_SAMSUNG_HDR_GM_DIMENS * DRM_SAMSUNG_HDR_GM_DIMENS]; 41 __u32 offsets[DRM_SAMSUNG_HDR_GM_DIMENS]; 42 }; 43 #define DRM_SAMSUNG_HDR_TM_LUT_LEN 33 44 struct hdr_tm_data { 45 __u16 coeff_r; 46 __u16 coeff_g; 47 __u16 coeff_b; 48 __u16 rng_x_min; 49 __u16 rng_x_max; 50 __u16 rng_y_min; 51 __u16 rng_y_max; 52 __u16 posx[DRM_SAMSUNG_HDR_TM_LUT_LEN]; 53 __u32 posy[DRM_SAMSUNG_HDR_TM_LUT_LEN]; 54 }; 55 #define DRM_SAMSUNG_CGC_LUT_REG_CNT 2457 56 struct cgc_lut { 57 __u32 r_values[DRM_SAMSUNG_CGC_LUT_REG_CNT]; 58 __u32 g_values[DRM_SAMSUNG_CGC_LUT_REG_CNT]; 59 __u32 b_values[DRM_SAMSUNG_CGC_LUT_REG_CNT]; 60 }; 61 #define DRM_SAMSUNG_CGC_DMA_LUT_ENTRY_CNT 4913 62 struct cgc_dma_lut { 63 __u16 r_value; 64 __u16 g_value; 65 __u16 b_value; 66 }; 67 #define DRM_SAMSUNG_MATRIX_DIMENS 3 68 struct exynos_matrix { 69 __u16 coeffs[DRM_SAMSUNG_MATRIX_DIMENS * DRM_SAMSUNG_MATRIX_DIMENS]; 70 __u16 offsets[DRM_SAMSUNG_MATRIX_DIMENS]; 71 }; 72 struct dpp_size_range { 73 __u32 min; 74 __u32 max; 75 __u32 align; 76 }; 77 struct dpp_restriction { 78 struct dpp_size_range src_f_w; 79 struct dpp_size_range src_f_h; 80 struct dpp_size_range src_w; 81 struct dpp_size_range src_h; 82 __u32 src_x_align; 83 __u32 src_y_align; 84 struct dpp_size_range dst_f_w; 85 struct dpp_size_range dst_f_h; 86 struct dpp_size_range dst_w; 87 struct dpp_size_range dst_h; 88 __u32 dst_x_align; 89 __u32 dst_y_align; 90 struct dpp_size_range blk_w; 91 struct dpp_size_range blk_h; 92 __u32 blk_x_align; 93 __u32 blk_y_align; 94 __u32 src_h_rot_max; 95 __u32 scale_down; 96 __u32 scale_up; 97 }; 98 struct dpp_ch_restriction { 99 __s32 id; 100 __u64 attr; 101 struct dpp_restriction restriction; 102 }; 103 struct dither_config { 104 __u8 en : 1; 105 __u8 mode : 1; 106 __u8 frame_con : 1; 107 __u8 frame_offset : 2; 108 __u8 table_sel_r : 1; 109 __u8 table_sel_g : 1; 110 __u8 table_sel_b : 1; 111 __u32 reserved : 24; 112 }; 113 struct attribute_range { 114 __u32 min; 115 __u32 max; 116 }; 117 struct brightness_attribute { 118 struct attribute_range nits; 119 struct attribute_range level; 120 struct attribute_range percentage; 121 }; 122 struct brightness_capability { 123 struct brightness_attribute normal; 124 struct brightness_attribute hbm; 125 }; 126 struct tui_hw_buffer { 127 __u64 fb_physical; 128 __u64 fb_size; 129 } __attribute__((packed)); 130 #define EXYNOS_START_TUI 0x10 131 #define EXYNOS_FINISH_TUI 0x11 132 #define EXYNOS_TUI_REQUEST_BUFFER 0x20 133 #define EXYNOS_TUI_RELEASE_BUFFER 0x21 134 struct histogram_roi { 135 __u16 start_x; 136 __u16 start_y; 137 __u16 hsize; 138 __u16 vsize; 139 }; 140 struct histogram_weights { 141 __u16 weight_r; 142 __u16 weight_g; 143 __u16 weight_b; 144 }; 145 #define HISTOGRAM_BIN_COUNT 256 146 struct histogram_bins { 147 __u16 data[HISTOGRAM_BIN_COUNT]; 148 }; 149 #define EXYNOS_DRM_HISTOGRAM_EVENT 0x80000000 150 struct exynos_drm_histogram_event { 151 struct drm_event base; 152 struct histogram_bins bins; 153 __u32 crtc_id; 154 }; 155 enum exynos_prog_pos { 156 POST_DQE, 157 PRE_DQE, 158 }; 159 #define EXYNOS_HISTOGRAM_REQUEST 0x0 160 #define EXYNOS_HISTOGRAM_CANCEL 0x1 161 #define DRM_IOCTL_EXYNOS_HISTOGRAM_REQUEST DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_REQUEST, __u32) 162 #define DRM_IOCTL_EXYNOS_HISTOGRAM_CANCEL DRM_IOW(DRM_COMMAND_BASE + EXYNOS_HISTOGRAM_CANCEL, __u32) 163 #ifdef __cplusplus 164 } 165 #endif 166 #endif 167