1 /* 2 * This file is auto-generated. Modifications will be lost. 3 * 4 * See https://android.googlesource.com/platform/bionic/+/master/libc/kernel/ 5 * for more information. 6 */ 7 #ifndef __SOUND_ASOUND_H 8 #define __SOUND_ASOUND_H 9 #ifdef __linux__ 10 #include <linux/types.h> 11 #else 12 #include <sys/ioctl.h> 13 #endif 14 #include <stdlib.h> 15 #define SNDRV_PROTOCOL_VERSION(major,minor,subminor) (((major) << 16) | ((minor) << 8) | (subminor)) 16 #define SNDRV_PROTOCOL_MAJOR(version) (((version) >> 16) & 0xffff) 17 #define SNDRV_PROTOCOL_MINOR(version) (((version) >> 8) & 0xff) 18 #define SNDRV_PROTOCOL_MICRO(version) ((version) & 0xff) 19 #define SNDRV_PROTOCOL_INCOMPATIBLE(kversion,uversion) (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion))) 20 struct snd_aes_iec958 { 21 unsigned char status[24]; 22 unsigned char subcode[147]; 23 unsigned char pad; 24 unsigned char dig_subframe[4]; 25 }; 26 struct snd_cea_861_aud_if { 27 unsigned char db1_ct_cc; 28 unsigned char db2_sf_ss; 29 unsigned char db3; 30 unsigned char db4_ca; 31 unsigned char db5_dminh_lsv; 32 }; 33 #define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1) 34 enum { 35 SNDRV_HWDEP_IFACE_OPL2 = 0, 36 SNDRV_HWDEP_IFACE_OPL3, 37 SNDRV_HWDEP_IFACE_OPL4, 38 SNDRV_HWDEP_IFACE_SB16CSP, 39 SNDRV_HWDEP_IFACE_EMU10K1, 40 SNDRV_HWDEP_IFACE_YSS225, 41 SNDRV_HWDEP_IFACE_ICS2115, 42 SNDRV_HWDEP_IFACE_SSCAPE, 43 SNDRV_HWDEP_IFACE_VX, 44 SNDRV_HWDEP_IFACE_MIXART, 45 SNDRV_HWDEP_IFACE_USX2Y, 46 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, 47 SNDRV_HWDEP_IFACE_BLUETOOTH, 48 SNDRV_HWDEP_IFACE_USX2Y_PCM, 49 SNDRV_HWDEP_IFACE_PCXHR, 50 SNDRV_HWDEP_IFACE_SB_RC, 51 SNDRV_HWDEP_IFACE_HDA, 52 SNDRV_HWDEP_IFACE_USB_STREAM, 53 SNDRV_HWDEP_IFACE_FW_DICE, 54 SNDRV_HWDEP_IFACE_FW_FIREWORKS, 55 SNDRV_HWDEP_IFACE_FW_BEBOB, 56 SNDRV_HWDEP_IFACE_FW_OXFW, 57 SNDRV_HWDEP_IFACE_FW_DIGI00X, 58 SNDRV_HWDEP_IFACE_FW_TASCAM, 59 SNDRV_HWDEP_IFACE_LINE6, 60 SNDRV_HWDEP_IFACE_FW_MOTU, 61 SNDRV_HWDEP_IFACE_FW_FIREFACE, 62 SNDRV_HWDEP_IFACE_AUDIO_BE, 63 SNDRV_HWDEP_IFACE_AUDIO_CODEC, 64 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_AUDIO_CODEC 65 }; 66 #define SNDRV_HWDEP_IFACE_AUDIO_BE SNDRV_HWDEP_IFACE_AUDIO_BE 67 #define SNDRV_HWDEP_IFACE_AUDIO_CODEC SNDRV_HWDEP_IFACE_AUDIO_CODEC 68 struct snd_hwdep_info { 69 unsigned int device; 70 int card; 71 unsigned char id[64]; 72 unsigned char name[80]; 73 int iface; 74 unsigned char reserved[64]; 75 }; 76 struct snd_hwdep_dsp_status { 77 unsigned int version; 78 unsigned char id[32]; 79 unsigned int num_dsps; 80 unsigned int dsp_loaded; 81 unsigned int chip_ready; 82 unsigned char reserved[16]; 83 }; 84 struct snd_hwdep_dsp_image { 85 unsigned int index; 86 unsigned char name[64]; 87 unsigned char * image; 88 size_t length; 89 unsigned long driver_data; 90 }; 91 #define SNDRV_HWDEP_IOCTL_PVERSION _IOR('H', 0x00, int) 92 #define SNDRV_HWDEP_IOCTL_INFO _IOR('H', 0x01, struct snd_hwdep_info) 93 #define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status) 94 #define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image) 95 #define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 14) 96 typedef unsigned long snd_pcm_uframes_t; 97 typedef signed long snd_pcm_sframes_t; 98 enum { 99 SNDRV_PCM_CLASS_GENERIC = 0, 100 SNDRV_PCM_CLASS_MULTI, 101 SNDRV_PCM_CLASS_MODEM, 102 SNDRV_PCM_CLASS_DIGITIZER, 103 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER, 104 }; 105 enum { 106 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, 107 SNDRV_PCM_SUBCLASS_MULTI_MIX, 108 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX, 109 }; 110 enum { 111 SNDRV_PCM_STREAM_PLAYBACK = 0, 112 SNDRV_PCM_STREAM_CAPTURE, 113 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE, 114 }; 115 typedef int __bitwise snd_pcm_access_t; 116 #define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((snd_pcm_access_t) 0) 117 #define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((snd_pcm_access_t) 1) 118 #define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((snd_pcm_access_t) 2) 119 #define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((snd_pcm_access_t) 3) 120 #define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((snd_pcm_access_t) 4) 121 #define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED 122 typedef int __bitwise snd_pcm_format_t; 123 #define SNDRV_PCM_FORMAT_S8 ((snd_pcm_format_t) 0) 124 #define SNDRV_PCM_FORMAT_U8 ((snd_pcm_format_t) 1) 125 #define SNDRV_PCM_FORMAT_S16_LE ((snd_pcm_format_t) 2) 126 #define SNDRV_PCM_FORMAT_S16_BE ((snd_pcm_format_t) 3) 127 #define SNDRV_PCM_FORMAT_U16_LE ((snd_pcm_format_t) 4) 128 #define SNDRV_PCM_FORMAT_U16_BE ((snd_pcm_format_t) 5) 129 #define SNDRV_PCM_FORMAT_S24_LE ((snd_pcm_format_t) 6) 130 #define SNDRV_PCM_FORMAT_S24_BE ((snd_pcm_format_t) 7) 131 #define SNDRV_PCM_FORMAT_U24_LE ((snd_pcm_format_t) 8) 132 #define SNDRV_PCM_FORMAT_U24_BE ((snd_pcm_format_t) 9) 133 #define SNDRV_PCM_FORMAT_S32_LE ((snd_pcm_format_t) 10) 134 #define SNDRV_PCM_FORMAT_S32_BE ((snd_pcm_format_t) 11) 135 #define SNDRV_PCM_FORMAT_U32_LE ((snd_pcm_format_t) 12) 136 #define SNDRV_PCM_FORMAT_U32_BE ((snd_pcm_format_t) 13) 137 #define SNDRV_PCM_FORMAT_FLOAT_LE ((snd_pcm_format_t) 14) 138 #define SNDRV_PCM_FORMAT_FLOAT_BE ((snd_pcm_format_t) 15) 139 #define SNDRV_PCM_FORMAT_FLOAT64_LE ((snd_pcm_format_t) 16) 140 #define SNDRV_PCM_FORMAT_FLOAT64_BE ((snd_pcm_format_t) 17) 141 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((snd_pcm_format_t) 18) 142 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((snd_pcm_format_t) 19) 143 #define SNDRV_PCM_FORMAT_MU_LAW ((snd_pcm_format_t) 20) 144 #define SNDRV_PCM_FORMAT_A_LAW ((snd_pcm_format_t) 21) 145 #define SNDRV_PCM_FORMAT_IMA_ADPCM ((snd_pcm_format_t) 22) 146 #define SNDRV_PCM_FORMAT_MPEG ((snd_pcm_format_t) 23) 147 #define SNDRV_PCM_FORMAT_GSM ((snd_pcm_format_t) 24) 148 #define SNDRV_PCM_FORMAT_S20_LE ((snd_pcm_format_t) 25) 149 #define SNDRV_PCM_FORMAT_S20_BE ((snd_pcm_format_t) 26) 150 #define SNDRV_PCM_FORMAT_U20_LE ((snd_pcm_format_t) 27) 151 #define SNDRV_PCM_FORMAT_U20_BE ((snd_pcm_format_t) 28) 152 #define SNDRV_PCM_FORMAT_SPECIAL ((snd_pcm_format_t) 31) 153 #define SNDRV_PCM_FORMAT_S24_3LE ((snd_pcm_format_t) 32) 154 #define SNDRV_PCM_FORMAT_S24_3BE ((snd_pcm_format_t) 33) 155 #define SNDRV_PCM_FORMAT_U24_3LE ((snd_pcm_format_t) 34) 156 #define SNDRV_PCM_FORMAT_U24_3BE ((snd_pcm_format_t) 35) 157 #define SNDRV_PCM_FORMAT_S20_3LE ((snd_pcm_format_t) 36) 158 #define SNDRV_PCM_FORMAT_S20_3BE ((snd_pcm_format_t) 37) 159 #define SNDRV_PCM_FORMAT_U20_3LE ((snd_pcm_format_t) 38) 160 #define SNDRV_PCM_FORMAT_U20_3BE ((snd_pcm_format_t) 39) 161 #define SNDRV_PCM_FORMAT_S18_3LE ((snd_pcm_format_t) 40) 162 #define SNDRV_PCM_FORMAT_S18_3BE ((snd_pcm_format_t) 41) 163 #define SNDRV_PCM_FORMAT_U18_3LE ((snd_pcm_format_t) 42) 164 #define SNDRV_PCM_FORMAT_U18_3BE ((snd_pcm_format_t) 43) 165 #define SNDRV_PCM_FORMAT_G723_24 ((snd_pcm_format_t) 44) 166 #define SNDRV_PCM_FORMAT_G723_24_1B ((snd_pcm_format_t) 45) 167 #define SNDRV_PCM_FORMAT_G723_40 ((snd_pcm_format_t) 46) 168 #define SNDRV_PCM_FORMAT_G723_40_1B ((snd_pcm_format_t) 47) 169 #define SNDRV_PCM_FORMAT_DSD_U8 ((snd_pcm_format_t) 48) 170 #define SNDRV_PCM_FORMAT_DSD_U16_LE ((snd_pcm_format_t) 49) 171 #define SNDRV_PCM_FORMAT_DSD_U32_LE ((snd_pcm_format_t) 50) 172 #define SNDRV_PCM_FORMAT_DSD_U16_BE ((snd_pcm_format_t) 51) 173 #define SNDRV_PCM_FORMAT_DSD_U32_BE ((snd_pcm_format_t) 52) 174 #define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_DSD_U32_BE 175 #define SNDRV_PCM_FORMAT_FIRST SNDRV_PCM_FORMAT_S8 176 #ifdef SNDRV_LITTLE_ENDIAN 177 #define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE 178 #define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE 179 #define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE 180 #define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE 181 #define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE 182 #define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE 183 #define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE 184 #define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE 185 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE 186 #define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_LE 187 #define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_LE 188 #endif 189 #ifdef SNDRV_BIG_ENDIAN 190 #define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE 191 #define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE 192 #define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE 193 #define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE 194 #define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE 195 #define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE 196 #define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE 197 #define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE 198 #define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE 199 #define SNDRV_PCM_FORMAT_S20 SNDRV_PCM_FORMAT_S20_BE 200 #define SNDRV_PCM_FORMAT_U20 SNDRV_PCM_FORMAT_U20_BE 201 #endif 202 typedef int __bitwise snd_pcm_subformat_t; 203 #define SNDRV_PCM_SUBFORMAT_STD ((snd_pcm_subformat_t) 0) 204 #define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD 205 #define SNDRV_PCM_INFO_MMAP 0x00000001 206 #define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 207 #define SNDRV_PCM_INFO_DOUBLE 0x00000004 208 #define SNDRV_PCM_INFO_BATCH 0x00000010 209 #define SNDRV_PCM_INFO_SYNC_APPLPTR 0x00000020 210 #define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 211 #define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 212 #define SNDRV_PCM_INFO_COMPLEX 0x00000400 213 #define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 214 #define SNDRV_PCM_INFO_OVERRANGE 0x00020000 215 #define SNDRV_PCM_INFO_RESUME 0x00040000 216 #define SNDRV_PCM_INFO_PAUSE 0x00080000 217 #define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 218 #define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 219 #define SNDRV_PCM_INFO_SYNC_START 0x00400000 220 #define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000 221 #define SNDRV_PCM_INFO_HAS_WALL_CLOCK 0x01000000 222 #define SNDRV_PCM_INFO_HAS_LINK_ATIME 0x01000000 223 #define SNDRV_PCM_INFO_HAS_LINK_ABSOLUTE_ATIME 0x02000000 224 #define SNDRV_PCM_INFO_HAS_LINK_ESTIMATED_ATIME 0x04000000 225 #define SNDRV_PCM_INFO_HAS_LINK_SYNCHRONIZED_ATIME 0x08000000 226 #define SNDRV_PCM_INFO_DRAIN_TRIGGER 0x40000000 227 #define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000 228 typedef int __bitwise snd_pcm_state_t; 229 #define SNDRV_PCM_STATE_OPEN ((snd_pcm_state_t) 0) 230 #define SNDRV_PCM_STATE_SETUP ((snd_pcm_state_t) 1) 231 #define SNDRV_PCM_STATE_PREPARED ((snd_pcm_state_t) 2) 232 #define SNDRV_PCM_STATE_RUNNING ((snd_pcm_state_t) 3) 233 #define SNDRV_PCM_STATE_XRUN ((snd_pcm_state_t) 4) 234 #define SNDRV_PCM_STATE_DRAINING ((snd_pcm_state_t) 5) 235 #define SNDRV_PCM_STATE_PAUSED ((snd_pcm_state_t) 6) 236 #define SNDRV_PCM_STATE_SUSPENDED ((snd_pcm_state_t) 7) 237 #define SNDRV_PCM_STATE_DISCONNECTED ((snd_pcm_state_t) 8) 238 #define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED 239 enum { 240 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000, 241 SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000, 242 SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000, 243 }; 244 union snd_pcm_sync_id { 245 unsigned char id[16]; 246 unsigned short id16[8]; 247 unsigned int id32[4]; 248 }; 249 struct snd_pcm_info { 250 unsigned int device; 251 unsigned int subdevice; 252 int stream; 253 int card; 254 unsigned char id[64]; 255 unsigned char name[80]; 256 unsigned char subname[32]; 257 int dev_class; 258 int dev_subclass; 259 unsigned int subdevices_count; 260 unsigned int subdevices_avail; 261 union snd_pcm_sync_id sync; 262 unsigned char reserved[64]; 263 }; 264 typedef int snd_pcm_hw_param_t; 265 #define SNDRV_PCM_HW_PARAM_ACCESS 0 266 #define SNDRV_PCM_HW_PARAM_FORMAT 1 267 #define SNDRV_PCM_HW_PARAM_SUBFORMAT 2 268 #define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS 269 #define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT 270 #define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8 271 #define SNDRV_PCM_HW_PARAM_FRAME_BITS 9 272 #define SNDRV_PCM_HW_PARAM_CHANNELS 10 273 #define SNDRV_PCM_HW_PARAM_RATE 11 274 #define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12 275 #define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13 276 #define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14 277 #define SNDRV_PCM_HW_PARAM_PERIODS 15 278 #define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16 279 #define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17 280 #define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18 281 #define SNDRV_PCM_HW_PARAM_TICK_TIME 19 282 #define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS 283 #define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME 284 #define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1 << 0) 285 #define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1 << 1) 286 #define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1 << 2) 287 struct snd_interval { 288 unsigned int min, max; 289 unsigned int openmin : 1, openmax : 1, integer : 1, empty : 1; 290 }; 291 #define SNDRV_MASK_MAX 256 292 struct snd_mask { 293 __u32 bits[(SNDRV_MASK_MAX + 31) / 32]; 294 }; 295 struct snd_pcm_hw_params { 296 unsigned int flags; 297 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK - SNDRV_PCM_HW_PARAM_FIRST_MASK + 1]; 298 struct snd_mask mres[5]; 299 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL - SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1]; 300 struct snd_interval ires[9]; 301 unsigned int rmask; 302 unsigned int cmask; 303 unsigned int info; 304 unsigned int msbits; 305 unsigned int rate_num; 306 unsigned int rate_den; 307 snd_pcm_uframes_t fifo_size; 308 unsigned char reserved[64]; 309 }; 310 enum { 311 SNDRV_PCM_TSTAMP_NONE = 0, 312 SNDRV_PCM_TSTAMP_ENABLE, 313 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE, 314 }; 315 struct snd_pcm_sw_params { 316 int tstamp_mode; 317 unsigned int period_step; 318 unsigned int sleep_min; 319 snd_pcm_uframes_t avail_min; 320 snd_pcm_uframes_t xfer_align; 321 snd_pcm_uframes_t start_threshold; 322 snd_pcm_uframes_t stop_threshold; 323 snd_pcm_uframes_t silence_threshold; 324 snd_pcm_uframes_t silence_size; 325 snd_pcm_uframes_t boundary; 326 unsigned int proto; 327 unsigned int tstamp_type; 328 unsigned char reserved[56]; 329 }; 330 struct snd_pcm_channel_info { 331 unsigned int channel; 332 __kernel_off_t offset; 333 unsigned int first; 334 unsigned int step; 335 }; 336 enum { 337 SNDRV_PCM_AUDIO_TSTAMP_TYPE_COMPAT = 0, 338 SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT = 1, 339 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK = 2, 340 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ABSOLUTE = 3, 341 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_ESTIMATED = 4, 342 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED = 5, 343 SNDRV_PCM_AUDIO_TSTAMP_TYPE_LAST = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK_SYNCHRONIZED 344 }; 345 struct snd_pcm_status { 346 snd_pcm_state_t state; 347 struct timespec trigger_tstamp; 348 struct timespec tstamp; 349 snd_pcm_uframes_t appl_ptr; 350 snd_pcm_uframes_t hw_ptr; 351 snd_pcm_sframes_t delay; 352 snd_pcm_uframes_t avail; 353 snd_pcm_uframes_t avail_max; 354 snd_pcm_uframes_t overrange; 355 snd_pcm_state_t suspended_state; 356 __u32 audio_tstamp_data; 357 struct timespec audio_tstamp; 358 struct timespec driver_tstamp; 359 __u32 audio_tstamp_accuracy; 360 unsigned char reserved[52 - 2 * sizeof(struct timespec)]; 361 }; 362 struct snd_pcm_mmap_status { 363 snd_pcm_state_t state; 364 int pad1; 365 snd_pcm_uframes_t hw_ptr; 366 struct timespec tstamp; 367 snd_pcm_state_t suspended_state; 368 struct timespec audio_tstamp; 369 }; 370 struct snd_pcm_mmap_control { 371 snd_pcm_uframes_t appl_ptr; 372 snd_pcm_uframes_t avail_min; 373 }; 374 #define SNDRV_PCM_SYNC_PTR_HWSYNC (1 << 0) 375 #define SNDRV_PCM_SYNC_PTR_APPL (1 << 1) 376 #define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1 << 2) 377 struct snd_pcm_sync_ptr { 378 unsigned int flags; 379 union { 380 struct snd_pcm_mmap_status status; 381 unsigned char reserved[64]; 382 } s; 383 union { 384 struct snd_pcm_mmap_control control; 385 unsigned char reserved[64]; 386 } c; 387 }; 388 struct snd_xferi { 389 snd_pcm_sframes_t result; 390 void * buf; 391 snd_pcm_uframes_t frames; 392 }; 393 struct snd_xfern { 394 snd_pcm_sframes_t result; 395 void * * bufs; 396 snd_pcm_uframes_t frames; 397 }; 398 enum { 399 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0, 400 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC, 401 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW, 402 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC_RAW, 403 }; 404 enum { 405 SNDRV_CHMAP_UNKNOWN = 0, 406 SNDRV_CHMAP_NA, 407 SNDRV_CHMAP_MONO, 408 SNDRV_CHMAP_FL, 409 SNDRV_CHMAP_FR, 410 SNDRV_CHMAP_RL, 411 SNDRV_CHMAP_RR, 412 SNDRV_CHMAP_FC, 413 SNDRV_CHMAP_LFE, 414 SNDRV_CHMAP_SL, 415 SNDRV_CHMAP_SR, 416 SNDRV_CHMAP_RC, 417 SNDRV_CHMAP_FLC, 418 SNDRV_CHMAP_FRC, 419 SNDRV_CHMAP_RLC, 420 SNDRV_CHMAP_RRC, 421 SNDRV_CHMAP_FLW, 422 SNDRV_CHMAP_FRW, 423 SNDRV_CHMAP_FLH, 424 SNDRV_CHMAP_FCH, 425 SNDRV_CHMAP_FRH, 426 SNDRV_CHMAP_TC, 427 SNDRV_CHMAP_TFL, 428 SNDRV_CHMAP_TFR, 429 SNDRV_CHMAP_TFC, 430 SNDRV_CHMAP_TRL, 431 SNDRV_CHMAP_TRR, 432 SNDRV_CHMAP_TRC, 433 SNDRV_CHMAP_TFLC, 434 SNDRV_CHMAP_TFRC, 435 SNDRV_CHMAP_TSL, 436 SNDRV_CHMAP_TSR, 437 SNDRV_CHMAP_LLFE, 438 SNDRV_CHMAP_RLFE, 439 SNDRV_CHMAP_BC, 440 SNDRV_CHMAP_BLC, 441 SNDRV_CHMAP_BRC, 442 SNDRV_CHMAP_LAST = SNDRV_CHMAP_BRC, 443 }; 444 #define SNDRV_CHMAP_POSITION_MASK 0xffff 445 #define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16) 446 #define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16) 447 #define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int) 448 #define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info) 449 #define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int) 450 #define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int) 451 #define SNDRV_PCM_IOCTL_USER_PVERSION _IOW('A', 0x04, int) 452 #define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params) 453 #define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params) 454 #define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12) 455 #define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params) 456 #define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status) 457 #define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t) 458 #define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22) 459 #define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr) 460 #define SNDRV_PCM_IOCTL_STATUS_EXT _IOWR('A', 0x24, struct snd_pcm_status) 461 #define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info) 462 #define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40) 463 #define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41) 464 #define SNDRV_PCM_IOCTL_START _IO('A', 0x42) 465 #define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43) 466 #define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44) 467 #define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int) 468 #define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t) 469 #define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47) 470 #define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48) 471 #define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t) 472 #define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi) 473 #define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi) 474 #define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern) 475 #define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern) 476 #define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int) 477 #define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61) 478 #define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0) 479 enum { 480 SNDRV_RAWMIDI_STREAM_OUTPUT = 0, 481 SNDRV_RAWMIDI_STREAM_INPUT, 482 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT, 483 }; 484 #define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001 485 #define SNDRV_RAWMIDI_INFO_INPUT 0x00000002 486 #define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004 487 struct snd_rawmidi_info { 488 unsigned int device; 489 unsigned int subdevice; 490 int stream; 491 int card; 492 unsigned int flags; 493 unsigned char id[64]; 494 unsigned char name[80]; 495 unsigned char subname[32]; 496 unsigned int subdevices_count; 497 unsigned int subdevices_avail; 498 unsigned char reserved[64]; 499 }; 500 struct snd_rawmidi_params { 501 int stream; 502 size_t buffer_size; 503 size_t avail_min; 504 unsigned int no_active_sensing : 1; 505 unsigned char reserved[16]; 506 }; 507 struct snd_rawmidi_status { 508 int stream; 509 struct timespec tstamp; 510 size_t avail; 511 size_t xruns; 512 unsigned char reserved[16]; 513 }; 514 #define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int) 515 #define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info) 516 #define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params) 517 #define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status) 518 #define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int) 519 #define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int) 520 #define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 6) 521 enum { 522 SNDRV_TIMER_CLASS_NONE = - 1, 523 SNDRV_TIMER_CLASS_SLAVE = 0, 524 SNDRV_TIMER_CLASS_GLOBAL, 525 SNDRV_TIMER_CLASS_CARD, 526 SNDRV_TIMER_CLASS_PCM, 527 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM, 528 }; 529 enum { 530 SNDRV_TIMER_SCLASS_NONE = 0, 531 SNDRV_TIMER_SCLASS_APPLICATION, 532 SNDRV_TIMER_SCLASS_SEQUENCER, 533 SNDRV_TIMER_SCLASS_OSS_SEQUENCER, 534 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER, 535 }; 536 #define SNDRV_TIMER_GLOBAL_SYSTEM 0 537 #define SNDRV_TIMER_GLOBAL_RTC 1 538 #define SNDRV_TIMER_GLOBAL_HPET 2 539 #define SNDRV_TIMER_GLOBAL_HRTIMER 3 540 #define SNDRV_TIMER_FLG_SLAVE (1 << 0) 541 struct snd_timer_id { 542 int dev_class; 543 int dev_sclass; 544 int card; 545 int device; 546 int subdevice; 547 }; 548 struct snd_timer_ginfo { 549 struct snd_timer_id tid; 550 unsigned int flags; 551 int card; 552 unsigned char id[64]; 553 unsigned char name[80]; 554 unsigned long reserved0; 555 unsigned long resolution; 556 unsigned long resolution_min; 557 unsigned long resolution_max; 558 unsigned int clients; 559 unsigned char reserved[32]; 560 }; 561 struct snd_timer_gparams { 562 struct snd_timer_id tid; 563 unsigned long period_num; 564 unsigned long period_den; 565 unsigned char reserved[32]; 566 }; 567 struct snd_timer_gstatus { 568 struct snd_timer_id tid; 569 unsigned long resolution; 570 unsigned long resolution_num; 571 unsigned long resolution_den; 572 unsigned char reserved[32]; 573 }; 574 struct snd_timer_select { 575 struct snd_timer_id id; 576 unsigned char reserved[32]; 577 }; 578 struct snd_timer_info { 579 unsigned int flags; 580 int card; 581 unsigned char id[64]; 582 unsigned char name[80]; 583 unsigned long reserved0; 584 unsigned long resolution; 585 unsigned char reserved[64]; 586 }; 587 #define SNDRV_TIMER_PSFLG_AUTO (1 << 0) 588 #define SNDRV_TIMER_PSFLG_EXCLUSIVE (1 << 1) 589 #define SNDRV_TIMER_PSFLG_EARLY_EVENT (1 << 2) 590 struct snd_timer_params { 591 unsigned int flags; 592 unsigned int ticks; 593 unsigned int queue_size; 594 unsigned int reserved0; 595 unsigned int filter; 596 unsigned char reserved[60]; 597 }; 598 struct snd_timer_status { 599 struct timespec tstamp; 600 unsigned int resolution; 601 unsigned int lost; 602 unsigned int overrun; 603 unsigned int queue; 604 unsigned char reserved[64]; 605 }; 606 #define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int) 607 #define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id) 608 #define SNDRV_TIMER_IOCTL_TREAD _IOW('T', 0x02, int) 609 #define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo) 610 #define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams) 611 #define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus) 612 #define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select) 613 #define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info) 614 #define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params) 615 #define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status) 616 #define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0) 617 #define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1) 618 #define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2) 619 #define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3) 620 struct snd_timer_read { 621 unsigned int resolution; 622 unsigned int ticks; 623 }; 624 enum { 625 SNDRV_TIMER_EVENT_RESOLUTION = 0, 626 SNDRV_TIMER_EVENT_TICK, 627 SNDRV_TIMER_EVENT_START, 628 SNDRV_TIMER_EVENT_STOP, 629 SNDRV_TIMER_EVENT_CONTINUE, 630 SNDRV_TIMER_EVENT_PAUSE, 631 SNDRV_TIMER_EVENT_EARLY, 632 SNDRV_TIMER_EVENT_SUSPEND, 633 SNDRV_TIMER_EVENT_RESUME, 634 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10, 635 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10, 636 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10, 637 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10, 638 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10, 639 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10, 640 }; 641 struct snd_timer_tread { 642 int event; 643 struct timespec tstamp; 644 unsigned int val; 645 }; 646 #define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7) 647 struct snd_ctl_card_info { 648 int card; 649 int pad; 650 unsigned char id[16]; 651 unsigned char driver[16]; 652 unsigned char name[32]; 653 unsigned char longname[80]; 654 unsigned char reserved_[16]; 655 unsigned char mixername[80]; 656 unsigned char components[128]; 657 }; 658 typedef int __bitwise snd_ctl_elem_type_t; 659 #define SNDRV_CTL_ELEM_TYPE_NONE ((snd_ctl_elem_type_t) 0) 660 #define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((snd_ctl_elem_type_t) 1) 661 #define SNDRV_CTL_ELEM_TYPE_INTEGER ((snd_ctl_elem_type_t) 2) 662 #define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((snd_ctl_elem_type_t) 3) 663 #define SNDRV_CTL_ELEM_TYPE_BYTES ((snd_ctl_elem_type_t) 4) 664 #define SNDRV_CTL_ELEM_TYPE_IEC958 ((snd_ctl_elem_type_t) 5) 665 #define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((snd_ctl_elem_type_t) 6) 666 #define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64 667 typedef int __bitwise snd_ctl_elem_iface_t; 668 #define SNDRV_CTL_ELEM_IFACE_CARD ((snd_ctl_elem_iface_t) 0) 669 #define SNDRV_CTL_ELEM_IFACE_HWDEP ((snd_ctl_elem_iface_t) 1) 670 #define SNDRV_CTL_ELEM_IFACE_MIXER ((snd_ctl_elem_iface_t) 2) 671 #define SNDRV_CTL_ELEM_IFACE_PCM ((snd_ctl_elem_iface_t) 3) 672 #define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((snd_ctl_elem_iface_t) 4) 673 #define SNDRV_CTL_ELEM_IFACE_TIMER ((snd_ctl_elem_iface_t) 5) 674 #define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((snd_ctl_elem_iface_t) 6) 675 #define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER 676 #define SNDRV_CTL_ELEM_ACCESS_READ (1 << 0) 677 #define SNDRV_CTL_ELEM_ACCESS_WRITE (1 << 1) 678 #define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE) 679 #define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1 << 2) 680 #define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1 << 3) 681 #define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1 << 4) 682 #define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1 << 5) 683 #define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ | SNDRV_CTL_ELEM_ACCESS_TLV_WRITE) 684 #define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1 << 6) 685 #define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1 << 8) 686 #define SNDRV_CTL_ELEM_ACCESS_LOCK (1 << 9) 687 #define SNDRV_CTL_ELEM_ACCESS_OWNER (1 << 10) 688 #define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1 << 28) 689 #define SNDRV_CTL_ELEM_ACCESS_USER (1 << 29) 690 #define SNDRV_CTL_POWER_D0 0x0000 691 #define SNDRV_CTL_POWER_D1 0x0100 692 #define SNDRV_CTL_POWER_D2 0x0200 693 #define SNDRV_CTL_POWER_D3 0x0300 694 #define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3 | 0x0000) 695 #define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3 | 0x0001) 696 #define SNDRV_CTL_ELEM_ID_NAME_MAXLEN 44 697 struct snd_ctl_elem_id { 698 unsigned int numid; 699 snd_ctl_elem_iface_t iface; 700 unsigned int device; 701 unsigned int subdevice; 702 unsigned char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; 703 unsigned int index; 704 }; 705 struct snd_ctl_elem_list { 706 unsigned int offset; 707 unsigned int space; 708 unsigned int used; 709 unsigned int count; 710 struct snd_ctl_elem_id * pids; 711 unsigned char reserved[50]; 712 }; 713 struct snd_ctl_elem_info { 714 struct snd_ctl_elem_id id; 715 snd_ctl_elem_type_t type; 716 unsigned int access; 717 unsigned int count; 718 __kernel_pid_t owner; 719 union { 720 struct { 721 long min; 722 long max; 723 long step; 724 } integer; 725 struct { 726 long long min; 727 long long max; 728 long long step; 729 } integer64; 730 struct { 731 unsigned int items; 732 unsigned int item; 733 char name[64]; 734 __u64 names_ptr; 735 unsigned int names_length; 736 } enumerated; 737 unsigned char reserved[128]; 738 } value; 739 union { 740 unsigned short d[4]; 741 unsigned short * d_ptr; 742 } dimen; 743 unsigned char reserved[64 - 4 * sizeof(unsigned short)]; 744 }; 745 struct snd_ctl_elem_value { 746 struct snd_ctl_elem_id id; 747 unsigned int indirect : 1; 748 union { 749 union { 750 long value[128]; 751 long * value_ptr; 752 } integer; 753 union { 754 long long value[64]; 755 long long * value_ptr; 756 } integer64; 757 union { 758 unsigned int item[128]; 759 unsigned int * item_ptr; 760 } enumerated; 761 union { 762 unsigned char data[512]; 763 unsigned char * data_ptr; 764 } bytes; 765 struct snd_aes_iec958 iec958; 766 } value; 767 struct timespec tstamp; 768 unsigned char reserved[128 - sizeof(struct timespec)]; 769 }; 770 struct snd_ctl_tlv { 771 unsigned int numid; 772 unsigned int length; 773 unsigned int tlv[0]; 774 }; 775 #define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int) 776 #define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info) 777 #define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list) 778 #define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info) 779 #define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value) 780 #define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value) 781 #define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id) 782 #define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id) 783 #define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int) 784 #define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info) 785 #define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info) 786 #define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id) 787 #define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv) 788 #define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv) 789 #define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv) 790 #define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int) 791 #define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info) 792 #define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int) 793 #define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info) 794 #define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int) 795 #define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int) 796 #define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info) 797 #define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int) 798 #define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int) 799 #define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int) 800 enum sndrv_ctl_event_type { 801 SNDRV_CTL_EVENT_ELEM = 0, 802 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM, 803 }; 804 #define SNDRV_CTL_EVENT_MASK_VALUE (1 << 0) 805 #define SNDRV_CTL_EVENT_MASK_INFO (1 << 1) 806 #define SNDRV_CTL_EVENT_MASK_ADD (1 << 2) 807 #define SNDRV_CTL_EVENT_MASK_TLV (1 << 3) 808 #define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) 809 struct snd_ctl_event { 810 int type; 811 union { 812 struct { 813 unsigned int mask; 814 struct snd_ctl_elem_id id; 815 } elem; 816 unsigned char data8[60]; 817 } data; 818 }; 819 #define SNDRV_CTL_NAME_NONE "" 820 #define SNDRV_CTL_NAME_PLAYBACK "Playback " 821 #define SNDRV_CTL_NAME_CAPTURE "Capture " 822 #define SNDRV_CTL_NAME_IEC958_NONE "" 823 #define SNDRV_CTL_NAME_IEC958_SWITCH "Switch" 824 #define SNDRV_CTL_NAME_IEC958_VOLUME "Volume" 825 #define SNDRV_CTL_NAME_IEC958_DEFAULT "Default" 826 #define SNDRV_CTL_NAME_IEC958_MASK "Mask" 827 #define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask" 828 #define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask" 829 #define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream" 830 #define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_ ##direction SNDRV_CTL_NAME_IEC958_ ##what 831 #endif 832