1 /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ 2 /* 3 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef __UAPI_CAM_DEFS_H__ 7 #define __UAPI_CAM_DEFS_H__ 8 9 #include <linux/videodev2.h> 10 #include <linux/types.h> 11 #include <linux/ioctl.h> 12 13 14 /* camera op codes */ 15 #define CAM_COMMON_OPCODE_BASE 0x100 16 #define CAM_QUERY_CAP (CAM_COMMON_OPCODE_BASE + 0x1) 17 #define CAM_ACQUIRE_DEV (CAM_COMMON_OPCODE_BASE + 0x2) 18 #define CAM_START_DEV (CAM_COMMON_OPCODE_BASE + 0x3) 19 #define CAM_STOP_DEV (CAM_COMMON_OPCODE_BASE + 0x4) 20 #define CAM_CONFIG_DEV (CAM_COMMON_OPCODE_BASE + 0x5) 21 #define CAM_RELEASE_DEV (CAM_COMMON_OPCODE_BASE + 0x6) 22 #define CAM_SD_SHUTDOWN (CAM_COMMON_OPCODE_BASE + 0x7) 23 #define CAM_FLUSH_REQ (CAM_COMMON_OPCODE_BASE + 0x8) 24 #define CAM_COMMON_OPCODE_MAX (CAM_COMMON_OPCODE_BASE + 0x9) 25 26 #define CAM_COMMON_OPCODE_BASE_v2 0x150 27 #define CAM_ACQUIRE_HW (CAM_COMMON_OPCODE_BASE_v2 + 0x1) 28 #define CAM_RELEASE_HW (CAM_COMMON_OPCODE_BASE_v2 + 0x2) 29 #define CAM_DUMP_REQ (CAM_COMMON_OPCODE_BASE_v2 + 0x3) 30 31 #define CAM_EXT_OPCODE_BASE 0x200 32 #define CAM_CONFIG_DEV_EXTERNAL (CAM_EXT_OPCODE_BASE + 0x1) 33 34 /* camera handle type */ 35 #define CAM_HANDLE_USER_POINTER 1 36 #define CAM_HANDLE_MEM_HANDLE 2 37 38 /* Generic Blob CmdBuffer header properties */ 39 #define CAM_GENERIC_BLOB_CMDBUFFER_SIZE_MASK 0xFFFFFF00 40 #define CAM_GENERIC_BLOB_CMDBUFFER_SIZE_SHIFT 8 41 #define CAM_GENERIC_BLOB_CMDBUFFER_TYPE_MASK 0xFF 42 #define CAM_GENERIC_BLOB_CMDBUFFER_TYPE_SHIFT 0 43 44 /* Command Buffer Types */ 45 #define CAM_CMD_BUF_DMI 0x1 46 #define CAM_CMD_BUF_DMI16 0x2 47 #define CAM_CMD_BUF_DMI32 0x3 48 #define CAM_CMD_BUF_DMI64 0x4 49 #define CAM_CMD_BUF_DIRECT 0x5 50 #define CAM_CMD_BUF_INDIRECT 0x6 51 #define CAM_CMD_BUF_I2C 0x7 52 #define CAM_CMD_BUF_FW 0x8 53 #define CAM_CMD_BUF_GENERIC 0x9 54 #define CAM_CMD_BUF_LEGACY 0xA 55 56 /* UBWC API Version */ 57 #define CAM_UBWC_CFG_VERSION_1 1 58 #define CAM_UBWC_CFG_VERSION_2 2 59 60 #define CAM_MAX_ACQ_RES 5 61 #define CAM_MAX_HW_SPLIT 3 62 63 64 /** 65 * enum flush_type_t - Identifies the various flush types 66 * 67 * @CAM_FLUSH_TYPE_REQ: Flush specific request 68 * @CAM_FLUSH_TYPE_ALL: Flush all requests belonging to a context 69 * @CAM_FLUSH_TYPE_MAX: Max enum to validate flush type 70 * 71 */ 72 enum flush_type_t { 73 CAM_FLUSH_TYPE_REQ, 74 CAM_FLUSH_TYPE_ALL, 75 CAM_FLUSH_TYPE_MAX 76 }; 77 78 /** 79 * struct cam_control - Structure used by ioctl control for camera 80 * 81 * @op_code: This is the op code for camera control 82 * @size: Control command size 83 * @handle_type: User pointer or shared memory handle 84 * @reserved: Reserved field for 64 bit alignment 85 * @handle: Control command payload 86 */ 87 struct cam_control { 88 uint32_t op_code; 89 uint32_t size; 90 uint32_t handle_type; 91 uint32_t reserved; 92 uint64_t handle; 93 }; 94 95 /* camera IOCTL */ 96 #define VIDIOC_CAM_CONTROL \ 97 _IOWR('V', BASE_VIDIOC_PRIVATE, struct cam_control) 98 99 /** 100 * struct cam_hw_version - Structure for HW version of camera devices 101 * 102 * @major : Hardware version major 103 * @minor : Hardware version minor 104 * @incr : Hardware version increment 105 * @reserved : Reserved for 64 bit aligngment 106 */ 107 struct cam_hw_version { 108 uint32_t major; 109 uint32_t minor; 110 uint32_t incr; 111 uint32_t reserved; 112 }; 113 114 /** 115 * struct cam_iommu_handle - Structure for IOMMU handles of camera hw devices 116 * 117 * @non_secure: Device Non Secure IOMMU handle 118 * @secure: Device Secure IOMMU handle 119 * 120 */ 121 struct cam_iommu_handle { 122 int32_t non_secure; 123 int32_t secure; 124 }; 125 126 /* camera secure mode */ 127 #define CAM_SECURE_MODE_NON_SECURE 0 128 #define CAM_SECURE_MODE_SECURE 1 129 130 /* Camera Format Type */ 131 #define CAM_FORMAT_BASE 0 132 #define CAM_FORMAT_MIPI_RAW_6 1 133 #define CAM_FORMAT_MIPI_RAW_8 2 134 #define CAM_FORMAT_MIPI_RAW_10 3 135 #define CAM_FORMAT_MIPI_RAW_12 4 136 #define CAM_FORMAT_MIPI_RAW_14 5 137 #define CAM_FORMAT_MIPI_RAW_16 6 138 #define CAM_FORMAT_MIPI_RAW_20 7 139 #define CAM_FORMAT_QTI_RAW_8 8 140 #define CAM_FORMAT_QTI_RAW_10 9 141 #define CAM_FORMAT_QTI_RAW_12 10 142 #define CAM_FORMAT_QTI_RAW_14 11 143 #define CAM_FORMAT_PLAIN8 12 144 #define CAM_FORMAT_PLAIN16_8 13 145 #define CAM_FORMAT_PLAIN16_10 14 146 #define CAM_FORMAT_PLAIN16_12 15 147 #define CAM_FORMAT_PLAIN16_14 16 148 #define CAM_FORMAT_PLAIN16_16 17 149 #define CAM_FORMAT_PLAIN32_20 18 150 #define CAM_FORMAT_PLAIN64 19 151 #define CAM_FORMAT_PLAIN128 20 152 #define CAM_FORMAT_ARGB 21 153 #define CAM_FORMAT_ARGB_10 22 154 #define CAM_FORMAT_ARGB_12 23 155 #define CAM_FORMAT_ARGB_14 24 156 #define CAM_FORMAT_DPCM_10_6_10 25 157 #define CAM_FORMAT_DPCM_10_8_10 26 158 #define CAM_FORMAT_DPCM_12_6_12 27 159 #define CAM_FORMAT_DPCM_12_8_12 28 160 #define CAM_FORMAT_DPCM_14_8_14 29 161 #define CAM_FORMAT_DPCM_14_10_14 30 162 #define CAM_FORMAT_NV21 31 163 #define CAM_FORMAT_NV12 32 164 #define CAM_FORMAT_TP10 33 165 #define CAM_FORMAT_YUV422 34 166 #define CAM_FORMAT_PD8 35 167 #define CAM_FORMAT_PD10 36 168 #define CAM_FORMAT_UBWC_NV12 37 169 #define CAM_FORMAT_UBWC_NV12_4R 38 170 #define CAM_FORMAT_UBWC_TP10 39 171 #define CAM_FORMAT_UBWC_P010 40 172 #define CAM_FORMAT_PLAIN8_SWAP 41 173 #define CAM_FORMAT_PLAIN8_10 42 174 #define CAM_FORMAT_PLAIN8_10_SWAP 43 175 #define CAM_FORMAT_YV12 44 176 #define CAM_FORMAT_Y_ONLY 45 177 #define CAM_FORMAT_DPCM_12_10_12 46 178 #define CAM_FORMAT_PLAIN32 47 179 #define CAM_FORMAT_ARGB_16 48 180 #define CAM_FORMAT_MAX 49 181 182 /* camera rotaion */ 183 #define CAM_ROTATE_CW_0_DEGREE 0 184 #define CAM_ROTATE_CW_90_DEGREE 1 185 #define CAM_RORATE_CW_180_DEGREE 2 186 #define CAM_ROTATE_CW_270_DEGREE 3 187 188 /* camera Color Space */ 189 #define CAM_COLOR_SPACE_BASE 0 190 #define CAM_COLOR_SPACE_BT601_FULL 1 191 #define CAM_COLOR_SPACE_BT601625 2 192 #define CAM_COLOR_SPACE_BT601525 3 193 #define CAM_COLOR_SPACE_BT709 4 194 #define CAM_COLOR_SPACE_DEPTH 5 195 #define CAM_COLOR_SPACE_MAX 6 196 197 /* camera buffer direction */ 198 #define CAM_BUF_INPUT 1 199 #define CAM_BUF_OUTPUT 2 200 #define CAM_BUF_IN_OUT 3 201 202 /* camera packet device Type */ 203 #define CAM_PACKET_DEV_BASE 0 204 #define CAM_PACKET_DEV_IMG_SENSOR 1 205 #define CAM_PACKET_DEV_ACTUATOR 2 206 #define CAM_PACKET_DEV_COMPANION 3 207 #define CAM_PACKET_DEV_EEPOM 4 208 #define CAM_PACKET_DEV_CSIPHY 5 209 #define CAM_PACKET_DEV_OIS 6 210 #define CAM_PACKET_DEV_FLASH 7 211 #define CAM_PACKET_DEV_FD 8 212 #define CAM_PACKET_DEV_JPEG_ENC 9 213 #define CAM_PACKET_DEV_JPEG_DEC 10 214 #define CAM_PACKET_DEV_VFE 11 215 #define CAM_PACKET_DEV_CPP 12 216 #define CAM_PACKET_DEV_CSID 13 217 #define CAM_PACKET_DEV_ISPIF 14 218 #define CAM_PACKET_DEV_IFE 15 219 #define CAM_PACKET_DEV_ICP 16 220 #define CAM_PACKET_DEV_LRME 17 221 #define CAM_PACKET_DEV_MAX 18 222 223 /* Register base type */ 224 #define CAM_REG_DUMP_BASE_TYPE_ISP_LEFT 1 225 #define CAM_REG_DUMP_BASE_TYPE_ISP_RIGHT 2 226 #define CAM_REG_DUMP_BASE_TYPE_CAMNOC 3 227 228 /* Register dump read type */ 229 #define CAM_REG_DUMP_READ_TYPE_CONT_RANGE 1 230 #define CAM_REG_DUMP_READ_TYPE_DMI 2 231 232 /* Max number of config writes to read from DMI */ 233 #define CAM_REG_DUMP_DMI_CONFIG_MAX 5 234 235 236 /* constants */ 237 #define CAM_PACKET_MAX_PLANES 3 238 239 /** 240 * struct cam_plane_cfg - Plane configuration info 241 * 242 * @width: Plane width in pixels 243 * @height: Plane height in lines 244 * @plane_stride: Plane stride in pixel 245 * @slice_height: Slice height in line (not used by ISP) 246 * @meta_stride: UBWC metadata stride 247 * @meta_size: UBWC metadata plane size 248 * @meta_offset: UBWC metadata offset 249 * @packer_config: UBWC packer config 250 * @mode_config: UBWC mode config 251 * @tile_config: UBWC tile config 252 * @h_init: UBWC horizontal initial coordinate in pixels 253 * @v_init: UBWC vertical initial coordinate in lines 254 * 255 */ 256 struct cam_plane_cfg { 257 uint32_t width; 258 uint32_t height; 259 uint32_t plane_stride; 260 uint32_t slice_height; 261 uint32_t meta_stride; 262 uint32_t meta_size; 263 uint32_t meta_offset; 264 uint32_t packer_config; 265 uint32_t mode_config; 266 uint32_t tile_config; 267 uint32_t h_init; 268 uint32_t v_init; 269 }; 270 271 /** 272 * struct cam_ubwc_plane_cfg_v1 - UBWC Plane configuration info 273 * 274 * @port_type: Port Type 275 * @meta_stride: UBWC metadata stride 276 * @meta_size: UBWC metadata plane size 277 * @meta_offset: UBWC metadata offset 278 * @packer_config: UBWC packer config 279 * @mode_config_0: UBWC mode config 0 280 * @mode_config_1: UBWC 3 mode config 1 281 * @tile_config: UBWC tile config 282 * @h_init: UBWC horizontal initial coordinate in pixels 283 * @v_init: UBWC vertical initial coordinate in lines 284 * 285 */ 286 struct cam_ubwc_plane_cfg_v1 { 287 uint32_t port_type; 288 uint32_t meta_stride; 289 uint32_t meta_size; 290 uint32_t meta_offset; 291 uint32_t packer_config; 292 uint32_t mode_config_0; 293 uint32_t mode_config_1; 294 uint32_t tile_config; 295 uint32_t h_init; 296 uint32_t v_init; 297 }; 298 299 /** 300 * struct cam_ubwc_plane_cfg_v2 - UBWC Plane configuration info 301 * 302 * @port_type: Port Type 303 * @meta_stride: UBWC metadata stride 304 * @meta_size: UBWC metadata plane size 305 * @meta_offset: UBWC metadata offset 306 * @packer_config: UBWC packer config 307 * @mode_config: UBWC mode config 308 * @static ctrl: UBWC static ctrl 309 * @ctrl_2: UBWC ctrl 2 310 * @tile_config: UBWC tile config 311 * @h_init: UBWC horizontal initial coordinate in pixels 312 * @v_init: UBWC vertical initial coordinate in lines 313 * @stats_ctrl_2: UBWC stats control 314 * @lossy_threshold0 UBWC lossy threshold 0 315 * @lossy_threshold1 UBWC lossy threshold 1 316 * @lossy_var_offset UBWC offset variance thrshold 317 * 318 */ 319 struct cam_ubwc_plane_cfg_v2 { 320 uint32_t port_type; 321 uint32_t meta_stride; 322 uint32_t meta_size; 323 uint32_t meta_offset; 324 uint32_t packer_config; 325 uint32_t mode_config_0; 326 uint32_t mode_config_1; 327 uint32_t tile_config; 328 uint32_t h_init; 329 uint32_t v_init; 330 uint32_t static_ctrl; 331 uint32_t ctrl_2; 332 uint32_t stats_ctrl_2; 333 uint32_t lossy_threshold_0; 334 uint32_t lossy_threshold_1; 335 uint32_t lossy_var_offset; 336 uint32_t bandwidth_limit; 337 uint32_t reserved[3]; 338 }; 339 /** 340 * struct cam_cmd_buf_desc - Command buffer descriptor 341 * 342 * @mem_handle: Command buffer handle 343 * @offset: Command start offset 344 * @size: Size of the command buffer in bytes 345 * @length: Used memory in command buffer in bytes 346 * @type: Type of the command buffer 347 * @meta_data: Data type for private command buffer 348 * Between UMD and KMD 349 * 350 */ 351 struct cam_cmd_buf_desc { 352 int32_t mem_handle; 353 uint32_t offset; 354 uint32_t size; 355 uint32_t length; 356 uint32_t type; 357 uint32_t meta_data; 358 }; 359 360 /** 361 * struct cam_buf_io_cfg - Buffer io configuration for buffers 362 * 363 * @mem_handle: Mem_handle array for the buffers. 364 * @offsets: Offsets for each planes in the buffer 365 * @planes: Per plane information 366 * @width: Main plane width in pixel 367 * @height: Main plane height in lines 368 * @format: Format of the buffer 369 * @color_space: Color space for the buffer 370 * @color_pattern: Color pattern in the buffer 371 * @bpp: Bit per pixel 372 * @rotation: Rotation information for the buffer 373 * @resource_type: Resource type associated with the buffer 374 * @fence: Fence handle 375 * @early_fence: Fence handle for early signal 376 * @aux_cmd_buf: An auxiliary command buffer that may be 377 * used for programming the IO 378 * @direction: Direction of the config 379 * @batch_size: Batch size in HFR mode 380 * @subsample_pattern: Subsample pattern. Used in HFR mode. It 381 * should be consistent with batchSize and 382 * CAMIF programming. 383 * @subsample_period: Subsample period. Used in HFR mode. It 384 * should be consistent with batchSize and 385 * CAMIF programming. 386 * @framedrop_pattern: Framedrop pattern 387 * @framedrop_period: Framedrop period 388 * @flag: Flags for extra information 389 * @direction: Buffer direction: input or output 390 * @padding: Padding for the structure 391 * 392 */ 393 struct cam_buf_io_cfg { 394 int32_t mem_handle[CAM_PACKET_MAX_PLANES]; 395 uint32_t offsets[CAM_PACKET_MAX_PLANES]; 396 struct cam_plane_cfg planes[CAM_PACKET_MAX_PLANES]; 397 uint32_t format; 398 uint32_t color_space; 399 uint32_t color_pattern; 400 uint32_t bpp; 401 uint32_t rotation; 402 uint32_t resource_type; 403 int32_t fence; 404 int32_t early_fence; 405 struct cam_cmd_buf_desc aux_cmd_buf; 406 uint32_t direction; 407 uint32_t batch_size; 408 uint32_t subsample_pattern; 409 uint32_t subsample_period; 410 uint32_t framedrop_pattern; 411 uint32_t framedrop_period; 412 uint32_t flag; 413 uint32_t padding; 414 }; 415 416 /** 417 * struct cam_packet_header - Camera packet header 418 * 419 * @op_code: Camera packet opcode 420 * @size: Size of the camera packet in bytes 421 * @request_id: Request id for this camera packet 422 * @flags: Flags for the camera packet 423 * @padding: Padding 424 * 425 */ 426 struct cam_packet_header { 427 uint32_t op_code; 428 uint32_t size; 429 uint64_t request_id; 430 uint32_t flags; 431 uint32_t padding; 432 }; 433 434 /** 435 * struct cam_patch_desc - Patch structure 436 * 437 * @dst_buf_hdl: Memory handle for the dest buffer 438 * @dst_offset: Offset byte in the dest buffer 439 * @src_buf_hdl: Memory handle for the source buffer 440 * @src_offset: Offset byte in the source buffer 441 * 442 */ 443 struct cam_patch_desc { 444 int32_t dst_buf_hdl; 445 uint32_t dst_offset; 446 int32_t src_buf_hdl; 447 uint32_t src_offset; 448 }; 449 450 /** 451 * struct cam_packet - Camera packet structure 452 * 453 * @header: Camera packet header 454 * @cmd_buf_offset: Command buffer start offset 455 * @num_cmd_buf: Number of the command buffer in the packet 456 * @io_config_offset: Buffer io configuration start offset 457 * @num_io_configs: Number of the buffer io configurations 458 * @patch_offset: Patch offset for the patch structure 459 * @num_patches: Number of the patch structure 460 * @kmd_cmd_buf_index: Command buffer index which contains extra 461 * space for the KMD buffer 462 * @kmd_cmd_buf_offset: Offset from the beginning of the command 463 * buffer for KMD usage. 464 * @payload: Camera packet payload 465 * 466 */ 467 struct cam_packet { 468 struct cam_packet_header header; 469 uint32_t cmd_buf_offset; 470 uint32_t num_cmd_buf; 471 uint32_t io_configs_offset; 472 uint32_t num_io_configs; 473 uint32_t patch_offset; 474 uint32_t num_patches; 475 uint32_t kmd_cmd_buf_index; 476 uint32_t kmd_cmd_buf_offset; 477 uint64_t payload[1]; 478 479 }; 480 481 /** 482 * struct cam_release_dev_cmd - Control payload for release devices 483 * 484 * @session_handle: Session handle for the release 485 * @dev_handle: Device handle for the release 486 */ 487 struct cam_release_dev_cmd { 488 int32_t session_handle; 489 int32_t dev_handle; 490 }; 491 492 /** 493 * struct cam_start_stop_dev_cmd - Control payload for start/stop device 494 * 495 * @session_handle: Session handle for the start/stop command 496 * @dev_handle: Device handle for the start/stop command 497 * 498 */ 499 struct cam_start_stop_dev_cmd { 500 int32_t session_handle; 501 int32_t dev_handle; 502 }; 503 504 /** 505 * struct cam_config_dev_cmd - Command payload for configure device 506 * 507 * @session_handle: Session handle for the command 508 * @dev_handle: Device handle for the command 509 * @offset: Offset byte in the packet handle. 510 * @packet_handle: Packet memory handle for the actual packet: 511 * struct cam_packet. 512 * 513 */ 514 struct cam_config_dev_cmd { 515 int32_t session_handle; 516 int32_t dev_handle; 517 uint64_t offset; 518 uint64_t packet_handle; 519 }; 520 521 /** 522 * struct cam_query_cap_cmd - Payload for query device capability 523 * 524 * @size: Handle size 525 * @handle_type: User pointer or shared memory handle 526 * @caps_handle: Device specific query command payload 527 * 528 */ 529 struct cam_query_cap_cmd { 530 uint32_t size; 531 uint32_t handle_type; 532 uint64_t caps_handle; 533 }; 534 535 /** 536 * struct cam_acquire_dev_cmd - Control payload for acquire devices 537 * 538 * @session_handle: Session handle for the acquire command 539 * @dev_handle: Device handle to be returned 540 * @handle_type: Resource handle type: 541 * 1 = user pointer, 2 = mem handle 542 * @num_resources: Number of the resources to be acquired 543 * @resources_hdl: Resource handle that refers to the actual 544 * resource array. Each item in this 545 * array is device specific resource structure 546 * 547 */ 548 struct cam_acquire_dev_cmd { 549 int32_t session_handle; 550 int32_t dev_handle; 551 uint32_t handle_type; 552 uint32_t num_resources; 553 uint64_t resource_hdl; 554 }; 555 556 /* 557 * In old version, while acquiring device the num_resources in 558 * struct cam_acquire_dev_cmd will be a valid value. During ACQUIRE_DEV 559 * KMD driver will return dev_handle as well as associate HW to handle. 560 * If num_resources is set to the constant below, we are using 561 * the new version and we do not acquire HW in ACQUIRE_DEV IOCTL. 562 * ACQUIRE_DEV will only return handle and we should receive 563 * ACQUIRE_HW IOCTL after ACQUIRE_DEV and that is when the HW 564 * is associated with the dev_handle. 565 * 566 * (Data type): uint32_t 567 */ 568 #define CAM_API_COMPAT_CONSTANT 0xFEFEFEFE 569 570 #define CAM_ACQUIRE_HW_STRUCT_VERSION_1 1 571 #define CAM_ACQUIRE_HW_STRUCT_VERSION_2 2 572 573 /** 574 * struct cam_acquire_hw_cmd_v1 - Control payload for acquire HW IOCTL (Ver 1) 575 * 576 * @struct_version: = CAM_ACQUIRE_HW_STRUCT_VERSION_1 for this struct 577 * This value should be the first 32-bits in any structure 578 * related to this IOCTL. So that if the struct needs to 579 * change, we can first read the starting 32-bits, get the 580 * version number and then typecast the data to struct 581 * accordingly. 582 * @reserved: Reserved field for 64-bit alignment 583 * @session_handle: Session handle for the acquire command 584 * @dev_handle: Device handle to be returned 585 * @handle_type: Tells you how to interpret the variable resource_hdl- 586 * 1 = user pointer, 2 = mem handle 587 * @data_size: Total size of data contained in memory pointed 588 * to by resource_hdl 589 * @resource_hdl: Resource handle that refers to the actual 590 * resource data. 591 */ 592 struct cam_acquire_hw_cmd_v1 { 593 uint32_t struct_version; 594 uint32_t reserved; 595 int32_t session_handle; 596 int32_t dev_handle; 597 uint32_t handle_type; 598 uint32_t data_size; 599 uint64_t resource_hdl; 600 }; 601 602 /** 603 * struct cam_acquired_hw_info - Update the acquired hardware info 604 * 605 * @acquired_hw_id: Acquired hardware mask 606 * @acquired_hw_path: Acquired path mask for an input 607 * if input splits into multiple paths, 608 * its updated per hardware 609 * valid_acquired_hw: Valid num of acquired hardware 610 */ 611 struct cam_acquired_hw_info { 612 uint32_t acquired_hw_id[CAM_MAX_ACQ_RES]; 613 uint32_t acquired_hw_path[CAM_MAX_ACQ_RES][CAM_MAX_HW_SPLIT]; 614 uint32_t valid_acquired_hw; 615 }; 616 617 /** 618 * struct cam_acquire_hw_cmd_v2 - Control payload for acquire HW IOCTL (Ver 2) 619 * 620 * @struct_version: = CAM_ACQUIRE_HW_STRUCT_VERSION_2 for this struct 621 * This value should be the first 32-bits in any structure 622 * related to this IOCTL. So that if the struct needs to 623 * change, we can first read the starting 32-bits, get the 624 * version number and then typecast the data to struct 625 * accordingly. 626 * @reserved: Reserved field for 64-bit alignment 627 * @session_handle: Session handle for the acquire command 628 * @dev_handle: Device handle to be returned 629 * @handle_type: Tells you how to interpret the variable resource_hdl- 630 * 1 = user pointer, 2 = mem handle 631 * @data_size: Total size of data contained in memory pointed 632 * to by resource_hdl 633 * @resource_hdl: Resource handle that refers to the actual 634 * resource data. 635 */ 636 struct cam_acquire_hw_cmd_v2 { 637 uint32_t struct_version; 638 uint32_t reserved; 639 int32_t session_handle; 640 int32_t dev_handle; 641 uint32_t handle_type; 642 uint32_t data_size; 643 uint64_t resource_hdl; 644 struct cam_acquired_hw_info hw_info; 645 }; 646 647 #define CAM_RELEASE_HW_STRUCT_VERSION_1 1 648 649 /** 650 * struct cam_release_hw_cmd_v1 - Control payload for release HW IOCTL (Ver 1) 651 * 652 * @struct_version: = CAM_RELEASE_HW_STRUCT_VERSION_1 for this struct 653 * This value should be the first 32-bits in any structure 654 * related to this IOCTL. So that if the struct needs to 655 * change, we can first read the starting 32-bits, get the 656 * version number and then typecast the data to struct 657 * accordingly. 658 * @reserved: Reserved field for 64-bit alignment 659 * @session_handle: Session handle for the release 660 * @dev_handle: Device handle for the release 661 */ 662 struct cam_release_hw_cmd_v1 { 663 uint32_t struct_version; 664 uint32_t reserved; 665 int32_t session_handle; 666 int32_t dev_handle; 667 }; 668 669 /** 670 * struct cam_flush_dev_cmd - Control payload for flush devices 671 * 672 * @version: Version 673 * @session_handle: Session handle for the acquire command 674 * @dev_handle: Device handle to be returned 675 * @flush_type: Flush type: 676 * 0 = flush specific request 677 * 1 = flush all 678 * @reserved: Reserved for 64 bit aligngment 679 * @req_id: Request id that needs to cancel 680 * 681 */ 682 struct cam_flush_dev_cmd { 683 uint64_t version; 684 int32_t session_handle; 685 int32_t dev_handle; 686 uint32_t flush_type; 687 uint32_t reserved; 688 int64_t req_id; 689 }; 690 691 /** 692 * struct cam_ubwc_config - UBWC Configuration Payload 693 * 694 * @api_version: UBWC config api version 695 * @num_ports: Number of ports to be configured 696 * @ubwc_plane_config: Array of UBWC configurations per port 697 * Size [CAM_PACKET_MAX_PLANES - 1] per port 698 * as UBWC is supported on Y & C planes 699 * and therefore a max size of 2 planes 700 * 701 */ 702 struct cam_ubwc_config { 703 uint32_t api_version; 704 uint32_t num_ports; 705 struct cam_ubwc_plane_cfg_v1 706 ubwc_plane_cfg[1][CAM_PACKET_MAX_PLANES - 1]; 707 }; 708 709 /** 710 * struct cam_ubwc_config_v2 - UBWC Configuration Payload 711 * 712 * @api_version: UBWC config api version 713 * @num_ports: Number of ports to be configured 714 * @ubwc_plane_config: Array of UBWC configurations per port 715 * Size [CAM_PACKET_MAX_PLANES - 1] per port 716 * as UBWC is supported on Y & C planes 717 * and therefore a max size of 2 planes 718 * 719 */ 720 struct cam_ubwc_config_v2 { 721 uint32_t api_version; 722 uint32_t num_ports; 723 struct cam_ubwc_plane_cfg_v2 724 ubwc_plane_cfg[1][CAM_PACKET_MAX_PLANES - 1]; 725 }; 726 727 /** 728 * struct cam_cmd_mem_region_info - 729 * Cmd buffer region info 730 * 731 * @mem_handle : Memory handle of the region 732 * @offset : Offset if any 733 * @size : Size of the region 734 * @flags : Flags if any 735 */ 736 struct cam_cmd_mem_region_info { 737 int32_t mem_handle; 738 uint32_t offset; 739 uint32_t size; 740 uint32_t flags; 741 }; 742 743 /** 744 * struct cam_cmd_mem_regions - 745 * List of multiple memory descriptors of 746 * of different regions 747 * 748 * @version : Version number 749 * @num_regions : Number of regions 750 * @map_info_array : Array of all the regions 751 */ 752 struct cam_cmd_mem_regions { 753 uint32_t version; 754 uint32_t num_regions; 755 struct cam_cmd_mem_region_info map_info_array[1]; 756 }; 757 758 /** 759 * struct cam_reg_write_desc - Register write descriptor 760 * 761 * @offset : Register offset at which 'value' needs to written 762 * @value : Register value to write 763 */ 764 struct cam_reg_write_desc { 765 uint32_t offset; 766 uint32_t value; 767 }; 768 769 /** 770 * struct cam_reg_range_read_desc - Descriptor to provide read info 771 * 772 * @offset : Register offset address to start with 773 * @num_values : Number of values to read 774 */ 775 struct cam_reg_range_read_desc { 776 uint32_t offset; 777 uint32_t num_values; 778 }; 779 780 /** 781 * struct cam_dmi_read_desc - Descriptor to provide DMI read info 782 * 783 * @num_pre_writes : Number of registers to write before reading DMI data 784 * @num_post_writes : Number of registers to write after reading DMI data 785 * @pre_read_config : Registers to write before reading DMI data 786 * @dmi_data_read : DMI Register, number of values to read to dump 787 * DMI data 788 * @post_read_config : Registers to write after reading DMI data 789 */ 790 struct cam_dmi_read_desc { 791 uint32_t num_pre_writes; 792 uint32_t num_post_writes; 793 struct cam_reg_write_desc pre_read_config[ 794 CAM_REG_DUMP_DMI_CONFIG_MAX]; 795 struct cam_reg_range_read_desc dmi_data_read; 796 struct cam_reg_write_desc post_read_config[ 797 CAM_REG_DUMP_DMI_CONFIG_MAX]; 798 }; 799 800 /** 801 * struct cam_reg_read_info - Register read info for both reg continuous read 802 * or DMI read 803 * 804 * @type : Whether Register range read or DMI read 805 * @reg_read : Range of registers to read 806 * @dmi_read : DMI data to read 807 */ 808 struct cam_reg_read_info { 809 uint32_t type; 810 uint32_t reserved; 811 union { 812 struct cam_reg_range_read_desc reg_read; 813 struct cam_dmi_read_desc dmi_read; 814 }; 815 }; 816 817 /** 818 * struct cam_reg_dump_out_buffer -Buffer info for dump data to be provided 819 * 820 * @req_id : Request ID corresponding to reg dump data 821 * @bytes_written : Number of bytes written 822 * @dump_data : Register dump data 823 */ 824 struct cam_reg_dump_out_buffer { 825 uint64_t req_id; 826 uint32_t bytes_written; 827 uint32_t dump_data[1]; 828 }; 829 830 /** 831 * struct cam_reg_dump_desc - Descriptor to provide dump info 832 * 833 * @reg_base_type : Register base type, e.g. ISP_LEFT, ISP_RIGHT, CAMNOC 834 * @dump_buffer_offset : Offset from base of mem_handle at which Register dump 835 * will be written for this set 836 * @dump_buffer_size : Available size in bytes for writing dump values 837 * @num_read_range : Number register range reads (Continuous + DMI) 838 * @read_range : Read range info 839 */ 840 struct cam_reg_dump_desc { 841 uint32_t reg_base_type; 842 uint32_t dump_buffer_offset; 843 uint32_t dump_buffer_size; 844 uint32_t num_read_range; 845 struct cam_reg_read_info read_range[1]; 846 }; 847 848 /** 849 * struct cam_reg_dump_input_info - Info about required dump sets 850 * 851 * @num_dump_sets : Number of different dump sets (base types) given 852 * @dump_set_offsets : Points to the given dump description structures 853 * (cam_reg_dump_desc) 854 */ 855 struct cam_reg_dump_input_info { 856 uint32_t num_dump_sets; 857 uint32_t dump_set_offsets[1]; 858 }; 859 860 /** 861 * struct cam_dump_req_cmd - 862 * Dump the information of issue req id 863 * 864 * @issue_req_id : Issue Request Id 865 * @offset : Offset for the buffer 866 * @buf_handle : Buffer Handle 867 * @error_type : Error type, using it, dumping information can be extended 868 * @session_handle : Session Handle 869 * @link_hdl : link handle 870 * @dev_handle : Device Handle 871 */ 872 struct cam_dump_req_cmd { 873 uint64_t issue_req_id; 874 size_t offset; 875 uint32_t buf_handle; 876 uint32_t error_type; 877 int32_t session_handle; 878 int32_t link_hdl; 879 int32_t dev_handle; 880 }; 881 882 #endif /* __UAPI_CAM_DEFS_H__ */ 883