489     ArmOpcode op;  in LoadConstantWide()  local
495       op = WIDE(kA64Movn3rdM);  in LoadConstantWide()
498       op = WIDE(kA64Movz3rdM);  in LoadConstantWide()
507         res = NewLIR3(op, r_dest.GetReg(), halfword ^ background, shift);  in LoadConstantWide()
550 LIR* Arm64Mir2Lir::OpReg(OpKind op, RegStorage r_dest_src) {  in OpReg()  argument
552   switch (op) {  in OpReg()
561       LOG(FATAL) << "Bad opcode " << op;  in OpReg()
566 LIR* Arm64Mir2Lir::OpRegRegShift(OpKind op, RegStorage r_dest_src1, RegStorage r_src2, int shift) {  in OpRegRegShift()  argument
571   switch (op) {  in OpRegRegShift()
616       return OpRegRegRegShift(op, r_dest_src1, r_dest_src1, r_src2, shift);  in OpRegRegShift()
634 LIR* Arm64Mir2Lir::OpRegRegExtend(OpKind op, RegStorage r_dest_src1, RegStorage r_src2,  in OpRegRegExtend()  argument
639   switch (op) {  in OpRegRegExtend()
649       return OpRegRegRegExtend(op, r_dest_src1, r_dest_src1, r_src2, ext, amount);  in OpRegRegExtend()
669 LIR* Arm64Mir2Lir::OpRegReg(OpKind op, RegStorage r_dest_src1, RegStorage r_src2) {  in OpRegReg()  argument
674     return OpRegRegExtend(op, r_dest_src1, r_src2, kA64Uxtx, 0);  in OpRegReg()
676     return OpRegRegShift(op, r_dest_src1, r_src2, ENCODE_NO_SHIFT);  in OpRegReg()
690 LIR* Arm64Mir2Lir::OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) {  in OpCondRegReg()  argument
695 LIR* Arm64Mir2Lir::OpRegRegRegShift(OpKind op, RegStorage r_dest, RegStorage r_src1,  in OpRegRegRegShift()  argument
699   switch (op) {  in OpRegRegRegShift()
743       LOG(FATAL) << "Bad opcode: " << op;  in OpRegRegRegShift()
763 LIR* Arm64Mir2Lir::OpRegRegRegExtend(OpKind op, RegStorage r_dest, RegStorage r_src1,  in OpRegRegRegExtend()  argument
767   switch (op) {  in OpRegRegRegExtend()
775       LOG(FATAL) << "Unimplemented opcode: " << op;  in OpRegRegRegExtend()
801 LIR* Arm64Mir2Lir::OpRegRegReg(OpKind op, RegStorage r_dest, RegStorage r_src1, RegStorage r_src2) {  in OpRegRegReg()  argument
802   return OpRegRegRegShift(op, r_dest, r_src1, r_src2, ENCODE_NO_SHIFT);  in OpRegRegReg()
805 LIR* Arm64Mir2Lir::OpRegRegImm(OpKind op, RegStorage r_dest, RegStorage r_src1, int value) {  in OpRegRegImm()  argument
806   return OpRegRegImm64(op, r_dest, r_src1, static_cast<int64_t>(value));  in OpRegRegImm()
809 LIR* Arm64Mir2Lir::OpRegRegImm64(OpKind op, RegStorage r_dest, RegStorage r_src1, int64_t value) {  in OpRegRegImm64()  argument
820   switch (op) {  in OpRegRegImm64()
850         alt_opcode = (op == kOpAdd) ? kA64Add4RRre : kA64Sub4RRre;  in OpRegRegImm64()
880       LOG(FATAL) << "Bad opcode: " << op;  in OpRegRegImm64()
891         switch (op) {  in OpRegRegImm64()
898             DCHECK(op == kOpAnd);  in OpRegRegImm64()
903         switch (op) {  in OpRegRegImm64()
912             DCHECK(op == kOpOr);  in OpRegRegImm64()
935 LIR* Arm64Mir2Lir::OpRegImm(OpKind op, RegStorage r_dest_src1, int value) {  in OpRegImm()  argument
936   return OpRegImm64(op, r_dest_src1, static_cast<int64_t>(value));  in OpRegImm()
939 LIR* Arm64Mir2Lir::OpRegImm64(OpKind op, RegStorage r_dest_src1, int64_t value) {  in OpRegImm64()  argument
954   } else if (LIKELY(abs_value < 0x1000000 && (op == kOpAdd || op == kOpSub))) {  in OpRegImm64()
961       op = (op == kOpAdd) ? kOpSub : kOpAdd;  in OpRegImm64()
963     OpRegImm64(op, r_dest_src1, abs_value & (~INT64_C(0xfff)));  in OpRegImm64()
964     return OpRegImm64(op, r_dest_src1, abs_value & 0xfff);  in OpRegImm64()
975     OpRegReg(op, r_dest_src1, r_tmp);  in OpRegImm64()
980   switch (op) {  in OpRegImm64()
994       LOG(FATAL) << "Bad op-kind in OpRegImm: " << op;  in OpRegImm64()
1397 LIR* Arm64Mir2Lir::OpMem(OpKind op, RegStorage r_base, int disp) {  in OpMem()  argument
1402 LIR* Arm64Mir2Lir::InvokeTrampoline(OpKind op, RegStorage r_tgt, QuickEntrypointEnum trampoline) {  in InvokeTrampoline()  argument
1403   return OpReg(op, r_tgt);  in InvokeTrampoline()