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Searched refs:IsPair (Results 1 – 15 of 15) sorted by relevance

/art/compiler/dex/
Dreg_storage.h161 constexpr bool IsPair() const { in IsPair() function
209 DCHECK(!IsPair()) << "reg_ = 0x" << std::hex << reg_; in GetReg()
216 DCHECK(!IsPair()); in SetReg()
222 DCHECK(IsPair()); in SetLowReg()
228 DCHECK(IsPair()); in GetLowReg()
234 DCHECK(IsPair()); in GetLow()
240 DCHECK(IsPair()); in GetHighReg()
246 DCHECK(IsPair()); in GetHigh()
251 DCHECK(IsPair()); in SetHighReg()
272 DCHECK(!low.IsPair()); in MakeRegPair()
[all …]
/art/compiler/dex/quick/
Dralloc_util.cc173 if (UNLIKELY(reg.IsPair())) { in Clobber()
433 DCHECK(!res.IsPair()); in AllocTempRef()
521 if (reg.IsPair()) { in AllocLiveReg()
550 if (reg.IsPair()) { in FreeTemp()
579 if (reg.IsPair()) { in IsLive()
593 if (reg.IsPair()) { in IsTemp()
606 if (reg.IsPair()) { in IsPromoted()
619 if (reg.IsPair()) { in IsDirty()
637 if (reg.IsPair()) { in LockTemp()
652 if (reg.IsPair()) { in ResetDef()
[all …]
Dmir_to_lir-inl.h259 RegisterInfo* res = reg.IsPair() ? reginfo_map_.Get(reg.GetLowReg()) : in GetRegInfo()
Dgen_loadstore.cc410 if (!loc.reg.IsPair()) { in ForceTempWide()
Dcodegen_util.cc1289 if (loc.reg.IsPair()) { in NarrowRegLoc()
Dgen_invoke.cc792 if (rl_arg.reg.IsPair()) { in GenDalvikArgsNoRange()
/art/compiler/dex/quick/arm/
Dutility_arm.cc646 DCHECK(!r_dest.IsPair()); in LoadConstantWide()
662 DCHECK(r_dest.IsPair()); in LoadConstantWide()
679 DCHECK(r_dest.IsPair()); in LoadConstantWide()
837 if (!r_src_dest.IsPair()) { in LoadStoreUsingInsnWithOffsetImm8Shl2()
868 DCHECK(!r_dest.IsPair()); in LoadBaseDispBody()
871 DCHECK(r_dest.IsPair()); in LoadBaseDispBody()
1009 DCHECK(!r_src.IsPair()); in StoreBaseDispBody()
1012 DCHECK(r_src.IsPair()); in StoreBaseDispBody()
Dint_arm.cc405 if (r_dest.IsPair()) { in OpRegCopyNoInsert()
408 if (r_src.IsPair()) { in OpRegCopyNoInsert()
822 RegStorage expected_reg = rl_src_expected.reg.IsPair() ? rl_src_expected.reg.GetLow() : in GenInlinedCas()
824 RegStorage new_val_reg = rl_src_new_value.reg.IsPair() ? rl_src_new_value.reg.GetLow() : in GenInlinedCas()
1078 DCHECK(reg.IsPair()); // TODO: support k64BitSolo. in GenDivZeroCheckWide()
/art/compiler/dex/quick/x86/
Dutility_x86.cc254 int dest = r_dest.IsPair() ? r_dest.GetLowReg() : r_dest.GetReg(); in OpMovRegMem()
305 int src = r_src.IsPair() ? r_src.GetLowReg() : r_src.GetReg(); in OpMovMemReg()
563 int32_t low_reg_val = r_dest.IsPair() ? r_dest.GetLowReg() : r_dest.GetReg(); in LoadConstantWide()
598 if (r_dest.IsPair()) { in LoadConstantWide()
618 if (r_dest.IsPair()) { in LoadConstantWide()
639 bool pair = r_dest.IsPair(); in LoadBaseIndexedDisp()
786 bool pair = r_src.IsPair(); in StoreBaseIndexedDisp()
Dint_x86.cc125 if (r_dest.IsPair()) { in OpRegCopyNoInsert()
128 if (r_src.IsPair()) { in OpRegCopyNoInsert()
158 if (!r_src.IsPair()) { in OpRegCopyWide()
159 DCHECK(!r_dest.IsPair()); in OpRegCopyWide()
171 if (!r_dest.IsPair()) { in OpRegCopyWide()
172 DCHECK(!r_src.IsPair()); in OpRegCopyWide()
182 DCHECK_EQ(r_dest.IsPair(), r_src.IsPair()); in OpRegCopyWide()
183 if (!r_src.IsPair()) { in OpRegCopyWide()
212 DCHECK(!left_op.IsPair() && !right_op.IsPair() && !rs_dest.IsPair()); in GenSelectConst32()
1126 DCHECK(reg.IsPair()); in GenDivZeroCheckWide()
Dcodegen_x86.h375 DCHECK(!reg.IsPair()); in As32BitReg()
393 DCHECK(!reg.IsPair()); in As64BitReg()
/art/compiler/dex/quick/mips/
Dutility_mips.cc346 if (!r_dest.IsPair()) { in LoadConstantWide()
470 bool pair = r_dest.IsPair(); in LoadBaseDispBody()
581 bool pair = r_src.IsPair(); in StoreBaseDispBody()
Dint_mips.cc165 if (r_dest.IsPair()) { in OpRegCopyNoInsert()
168 if (r_src.IsPair()) { in OpRegCopyNoInsert()
355 DCHECK(reg.IsPair()); // TODO: support k64BitSolo. in GenDivZeroCheckWide()
Dtarget_mips.cc497 DCHECK(r_dest.IsPair()); in GenAtomic64Load()
511 DCHECK(r_src.IsPair()); in GenAtomic64Store()
/art/compiler/dex/quick/arm64/
Dcodegen_arm64.h270 DCHECK(!reg.IsPair()); in As32BitReg()
306 DCHECK(!reg.IsPair()); in As64BitReg()