| /art/compiler/jni/quick/ |
| D | jni_compiler.cc | 50 ManagedRegister in_reg);
159 ManagedRegister in_reg = mr_conv->CurrentParamRegister(); in ArtJniCompileMethodInternal() local
160 __ VerifyObject(in_reg, mr_conv->IsCurrentArgPossiblyNull()); in ArtJniCompileMethodInternal()
161 __ StoreRef(handle_scope_offset, in_reg); in ArtJniCompileMethodInternal()
474 ManagedRegister in_reg = mr_conv->CurrentParamRegister(); in CopyParameter() local
477 __ CreateHandleScopeEntry(out_reg, handle_scope_offset, in_reg, null_allowed); in CopyParameter()
481 __ Move(out_reg, in_reg, mr_conv->CurrentParamSize()); in CopyParameter()
511 ManagedRegister in_reg = mr_conv->CurrentParamRegister(); in CopyParameter() local
524 __ Store(out_off, in_reg, param_size); in CopyParameter()
529 __ StoreSpanning(out_off, in_reg, in_off, mr_conv->InterproceduralScratchRegister()); in CopyParameter()
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| /art/compiler/utils/arm/ |
| D | assembler_arm.cc | 704 ArmManagedRegister in_reg = min_reg.AsArm(); in CreateHandleScopeEntry() local
705 CHECK(in_reg.IsNoRegister() || in_reg.IsCoreRegister()) << in_reg; in CreateHandleScopeEntry()
711 if (in_reg.IsNoRegister()) { in CreateHandleScopeEntry()
714 in_reg = out_reg; in CreateHandleScopeEntry()
716 cmp(in_reg.AsCoreRegister(), ShifterOperand(0)); in CreateHandleScopeEntry()
717 if (!out_reg.Equals(in_reg)) { in CreateHandleScopeEntry()
753 ArmManagedRegister in_reg = min_reg.AsArm(); in LoadReferenceFromHandleScope() local
755 CHECK(in_reg.IsCoreRegister()) << in_reg; in LoadReferenceFromHandleScope()
757 if (!out_reg.Equals(in_reg)) { in LoadReferenceFromHandleScope()
760 cmp(in_reg.AsCoreRegister(), ShifterOperand(0)); in LoadReferenceFromHandleScope()
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| D | assembler_arm.h | 699 …teHandleScopeEntry(ManagedRegister out_reg, FrameOffset handlescope_offset, ManagedRegister in_reg,
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| /art/compiler/utils/arm64/ |
| D | assembler_arm64.cc | 545 Arm64ManagedRegister in_reg = m_in_reg.AsArm64(); in CreateHandleScopeEntry() local
547 CHECK(in_reg.IsNoRegister() || in_reg.IsCoreRegister()) << in_reg; in CreateHandleScopeEntry()
553 if (in_reg.IsNoRegister()) { in CreateHandleScopeEntry()
556 in_reg = out_reg; in CreateHandleScopeEntry()
558 ___ Cmp(reg_w(in_reg.AsOverlappingCoreRegisterLow()), 0); in CreateHandleScopeEntry()
559 if (!out_reg.Equals(in_reg)) { in CreateHandleScopeEntry()
590 Arm64ManagedRegister in_reg = m_in_reg.AsArm64(); in LoadReferenceFromHandleScope() local
592 CHECK(in_reg.IsCoreRegister()) << in_reg; in LoadReferenceFromHandleScope()
594 if (!out_reg.Equals(in_reg)) { in LoadReferenceFromHandleScope()
598 ___ Cbz(reg_x(in_reg.AsCoreRegister()), &exit); in LoadReferenceFromHandleScope()
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| D | assembler_arm64.h | 169 ManagedRegister in_reg, bool null_allowed) OVERRIDE;
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| /art/compiler/jni/quick/x86_64/ |
| D | calling_convention_x86_64.cc | 109 ManagedRegister in_reg = CurrentParamRegister(); in EntrySpills() local
110 if (!in_reg.IsNoRegister()) { in EntrySpills()
113 ManagedRegisterSpill spill(in_reg, size, spill_offset); in EntrySpills()
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| /art/compiler/utils/mips/ |
| D | assembler_mips.cc | 834 MipsManagedRegister in_reg = min_reg.AsMips(); in CreateHandleScopeEntry() local
835 CHECK(in_reg.IsNoRegister() || in_reg.IsCoreRegister()) << in_reg; in CreateHandleScopeEntry()
842 if (in_reg.IsNoRegister()) { in CreateHandleScopeEntry()
845 in_reg = out_reg; in CreateHandleScopeEntry()
847 if (!out_reg.Equals(in_reg)) { in CreateHandleScopeEntry()
850 EmitBranch(in_reg.AsCoreRegister(), ZERO, &null_arg, true); in CreateHandleScopeEntry()
884 MipsManagedRegister in_reg = min_reg.AsMips(); in LoadReferenceFromHandleScope() local
886 CHECK(in_reg.IsCoreRegister()) << in_reg; in LoadReferenceFromHandleScope()
888 if (!out_reg.Equals(in_reg)) { in LoadReferenceFromHandleScope()
891 EmitBranch(in_reg.AsCoreRegister(), ZERO, &null_arg, true); in LoadReferenceFromHandleScope()
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| D | assembler_mips.h | 245 …teHandleScopeEntry(ManagedRegister out_reg, FrameOffset handlescope_offset, ManagedRegister in_reg,
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| /art/compiler/dex/ |
| D | ssa_transformation.cc | 175 int in_reg = num_regs - cu_->num_ins; in ComputeDefBlockMatrix() local
176 for (; in_reg < num_regs; in_reg++) { in ComputeDefBlockMatrix()
177 def_block_matrix_[in_reg]->SetBit(GetEntryBlock()->id); in ComputeDefBlockMatrix()
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| D | mir_optimization.cc | 761 for (uint16_t in_reg = cu_->num_dalvik_registers - cu_->num_ins; in EliminateNullChecksAndInferTypes() local
762 in_reg < cu_->num_dalvik_registers; in_reg++) { in EliminateNullChecksAndInferTypes()
763 ssa_regs_to_check->SetBit(in_reg); in EliminateNullChecksAndInferTypes()
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| /art/compiler/utils/x86/ |
| D | assembler_x86.cc | 1744 X86ManagedRegister in_reg = min_reg.AsX86(); in CreateHandleScopeEntry() local
1745 CHECK(in_reg.IsCpuRegister()); in CreateHandleScopeEntry()
1747 VerifyObject(in_reg, null_allowed); in CreateHandleScopeEntry()
1750 if (!out_reg.Equals(in_reg)) { in CreateHandleScopeEntry()
1753 testl(in_reg.AsCpuRegister(), in_reg.AsCpuRegister()); in CreateHandleScopeEntry()
1785 X86ManagedRegister in_reg = min_reg.AsX86(); in LoadReferenceFromHandleScope() local
1787 CHECK(in_reg.IsCpuRegister()); in LoadReferenceFromHandleScope()
1789 if (!out_reg.Equals(in_reg)) { in LoadReferenceFromHandleScope()
1792 testl(in_reg.AsCpuRegister(), in_reg.AsCpuRegister()); in LoadReferenceFromHandleScope()
1794 movl(out_reg.AsCpuRegister(), Address(in_reg.AsCpuRegister(), 0)); in LoadReferenceFromHandleScope()
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| D | assembler_x86.h | 549 …teHandleScopeEntry(ManagedRegister out_reg, FrameOffset handlescope_offset, ManagedRegister in_reg,
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| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.cc | 2103 X86_64ManagedRegister in_reg = min_reg.AsX86_64(); in CreateHandleScopeEntry() local
2104 if (in_reg.IsNoRegister()) { // TODO(64): && null_allowed in CreateHandleScopeEntry()
2106 in_reg = out_reg; in CreateHandleScopeEntry()
2108 movl(in_reg.AsCpuRegister(), Address(CpuRegister(RSP), handle_scope_offset)); in CreateHandleScopeEntry()
2110 CHECK(in_reg.IsCpuRegister()); in CreateHandleScopeEntry()
2112 VerifyObject(in_reg, null_allowed); in CreateHandleScopeEntry()
2115 if (!out_reg.Equals(in_reg)) { in CreateHandleScopeEntry()
2118 testl(in_reg.AsCpuRegister(), in_reg.AsCpuRegister()); in CreateHandleScopeEntry()
2150 X86_64ManagedRegister in_reg = min_reg.AsX86_64(); in LoadReferenceFromHandleScope() local
2152 CHECK(in_reg.IsCpuRegister()); in LoadReferenceFromHandleScope()
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| D | assembler_x86_64.h | 591 …teHandleScopeEntry(ManagedRegister out_reg, FrameOffset handlescope_offset, ManagedRegister in_reg,
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| /art/compiler/utils/ |
| D | assembler.h | 474 ManagedRegister in_reg, bool null_allowed) = 0;
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