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/art/runtime/interpreter/
Dinterpreter_switch_impl.cc29 inst->GetDexPc(insns), \
35 inst = inst->RelativeAt(displacement); \
44 inst = inst->_next_function(); \
51 DCHECK(!inst->IsReturn()); \
84 const Instruction* inst = Instruction::At(insns + dex_pc); in ExecuteSwitchImpl() local
87 dex_pc = inst->GetDexPc(insns); in ExecuteSwitchImpl()
89 TraceExecution(shadow_frame, inst, dex_pc, mh); in ExecuteSwitchImpl()
90 inst_data = inst->Fetch16(0); in ExecuteSwitchImpl()
91 switch (inst->Opcode(inst_data)) { in ExecuteSwitchImpl()
94 inst = inst->Next_1xx(); in ExecuteSwitchImpl()
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Dinterpreter_goto_table_impl.cc35 inst = inst->RelativeAt(disp); \
38 TraceExecution(shadow_frame, inst, dex_pc, mh); \
39 inst_data = inst->Fetch16(0); \
40 goto *currentHandlersTable[inst->Opcode(inst_data)]; \
145 const Instruction* inst = Instruction::At(code_item->insns_ + dex_pc); in ExecuteGotoImpl() local
171 shadow_frame.SetVReg(inst->VRegA_12x(inst_data), in ExecuteGotoImpl()
172 shadow_frame.GetVReg(inst->VRegB_12x(inst_data))); in ExecuteGotoImpl()
177 shadow_frame.SetVReg(inst->VRegA_22x(inst_data), in ExecuteGotoImpl()
178 shadow_frame.GetVReg(inst->VRegB_22x())); in ExecuteGotoImpl()
183 shadow_frame.SetVReg(inst->VRegA_32x(), in ExecuteGotoImpl()
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Dinterpreter_common.h101 const Instruction* inst, uint16_t inst_data, JValue* result);
106 static inline bool DoInvoke(Thread* self, ShadowFrame& shadow_frame, const Instruction* inst, in DoInvoke() argument
108 const uint32_t method_idx = (is_range) ? inst->VRegB_3rc() : inst->VRegB_35c(); in DoInvoke()
109 const uint32_t vregC = (is_range) ? inst->VRegC_3rc() : inst->VRegC_35c(); in DoInvoke()
124 return DoCall<is_range, do_access_check>(method, self, shadow_frame, inst, inst_data, result); in DoInvoke()
132 const Instruction* inst, uint16_t inst_data, in DoInvokeVirtualQuick() argument
134 const uint32_t vregC = (is_range) ? inst->VRegC_3rc() : inst->VRegC_35c(); in DoInvokeVirtualQuick()
142 const uint32_t vtable_idx = (is_range) ? inst->VRegB_3rc() : inst->VRegB_35c(); in DoInvokeVirtualQuick()
155 return DoCall<is_range, false>(method, self, shadow_frame, inst, inst_data, result); in DoInvokeVirtualQuick()
162 bool DoFieldGet(Thread* self, ShadowFrame& shadow_frame, const Instruction* inst,
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Dinterpreter_common.cc30 bool DoFieldGet(Thread* self, ShadowFrame& shadow_frame, const Instruction* inst, in DoFieldGet() argument
33 const uint32_t field_idx = is_static ? inst->VRegB_21c() : inst->VRegC_22c(); in DoFieldGet()
44 obj = shadow_frame.GetVRegReference(inst->VRegB_22c(inst_data)); in DoFieldGet()
58 uint32_t vregA = is_static ? inst->VRegA_21c(inst_data) : inst->VRegA_22c(inst_data); in DoFieldGet()
91 const Instruction* inst, \
122 bool DoIGetQuick(ShadowFrame& shadow_frame, const Instruction* inst, uint16_t inst_data) { in DoIGetQuick() argument
123 Object* obj = shadow_frame.GetVRegReference(inst->VRegB_22c(inst_data)); in DoIGetQuick()
130 MemberOffset field_offset(inst->VRegC_22c()); in DoIGetQuick()
143 const uint32_t vregA = inst->VRegA_22c(inst_data); in DoIGetQuick()
162 template bool DoIGetQuick<_field_type>(ShadowFrame& shadow_frame, const Instruction* inst, \
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/art/compiler/dex/
Ddex_to_dex_compiler.cc61 void CompileReturnVoid(Instruction* inst, uint32_t dex_pc);
66 Instruction* CompileCheckCast(Instruction* inst, uint32_t dex_pc);
74 void CompileInstanceFieldAccess(Instruction* inst, uint32_t dex_pc,
83 void CompileInvokeVirtual(Instruction* inst, uint32_t dex_pc,
98 Instruction* inst = const_cast<Instruction*>(Instruction::At(insns)); in Compile() local
101 inst = const_cast<Instruction*>(inst->Next()), dex_pc = inst->GetDexPc(insns)) { in Compile()
102 switch (inst->Opcode()) { in Compile()
104 CompileReturnVoid(inst, dex_pc); in Compile()
108 inst = CompileCheckCast(inst, dex_pc); in Compile()
112 CompileInstanceFieldAccess(inst, dex_pc, Instruction::IGET_QUICK, false); in Compile()
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Dverified_method.cc201 const Instruction* inst = Instruction::At(insns); in GenerateDevirtMap() local
204 for (; inst < end; inst = inst->Next()) { in GenerateDevirtMap()
205 bool is_virtual = (inst->Opcode() == Instruction::INVOKE_VIRTUAL) || in GenerateDevirtMap()
206 (inst->Opcode() == Instruction::INVOKE_VIRTUAL_RANGE); in GenerateDevirtMap()
207 bool is_interface = (inst->Opcode() == Instruction::INVOKE_INTERFACE) || in GenerateDevirtMap()
208 (inst->Opcode() == Instruction::INVOKE_INTERFACE_RANGE); in GenerateDevirtMap()
214 uint32_t dex_pc = inst->GetDexPc(insns); in GenerateDevirtMap()
216 bool is_range = (inst->Opcode() == Instruction::INVOKE_VIRTUAL_RANGE) || in GenerateDevirtMap()
217 (inst->Opcode() == Instruction::INVOKE_INTERFACE_RANGE); in GenerateDevirtMap()
219 reg_type(line->GetRegisterType(is_range ? inst->VRegC_3rc() : inst->VRegC_35c())); in GenerateDevirtMap()
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Dmir_graph.cc141 const Instruction* inst = Instruction::At(code_ptr); in ParseInsn() local
142 decoded_instruction->opcode = inst->Opcode(); in ParseInsn()
143 decoded_instruction->vA = inst->HasVRegA() ? inst->VRegA() : 0; in ParseInsn()
144 decoded_instruction->vB = inst->HasVRegB() ? inst->VRegB() : 0; in ParseInsn()
145 decoded_instruction->vB_wide = inst->HasWideVRegB() ? inst->WideVRegB() : 0; in ParseInsn()
146 decoded_instruction->vC = inst->HasVRegC() ? inst->VRegC() : 0; in ParseInsn()
147 if (inst->HasVarArgs()) { in ParseInsn()
148 inst->GetVarArgs(decoded_instruction->arg); in ParseInsn()
150 return inst->SizeInCodeUnits(); in ParseInsn()
/art/runtime/verifier/
Dmethod_verifier.cc415 const Instruction* inst = Instruction::At(code_item_->insns_ + dex_pc); in FindAccessedFieldAtDexPc() local
416 return GetQuickFieldAccess(inst, register_line); in FindAccessedFieldAtDexPc()
445 const Instruction* inst = Instruction::At(code_item_->insns_ + dex_pc); in FindInvokedMethodAtDexPc() local
446 const bool is_range = (inst->Opcode() == Instruction::INVOKE_VIRTUAL_RANGE_QUICK); in FindInvokedMethodAtDexPc()
447 return GetQuickInvokedMethod(inst, register_line, is_range); in FindInvokedMethodAtDexPc()
557 const Instruction* inst = Instruction::At(insns); in ComputeWidthsAndCountOps() local
563 Instruction::Code opcode = inst->Opcode(); in ComputeWidthsAndCountOps()
584 size_t inst_size = inst->SizeInCodeUnits(); in ComputeWidthsAndCountOps()
587 inst = inst->Next(); in ComputeWidthsAndCountOps()
660 const Instruction* inst = Instruction::At(code_item_->insns_); in VerifyInstructions() local
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Dregister_line.cc92 RegType& RegisterLine::GetInvocationThis(const Instruction* inst, bool is_range) { in GetInvocationThis() argument
93 const size_t args_count = is_range ? inst->VRegA_3rc() : inst->VRegA_35c(); in GetInvocationThis()
99 const uint32_t this_reg = (is_range) ? inst->VRegC_3rc() : inst->VRegC_35c(); in GetInvocationThis()
283 void RegisterLine::CheckUnaryOp(const Instruction* inst, in CheckUnaryOp() argument
286 if (VerifyRegisterType(inst->VRegB_12x(), src_type)) { in CheckUnaryOp()
287 SetRegisterType(inst->VRegA_12x(), dst_type); in CheckUnaryOp()
291 void RegisterLine::CheckUnaryOpWide(const Instruction* inst, in CheckUnaryOpWide() argument
294 if (VerifyRegisterTypeWide(inst->VRegB_12x(), src_type1, src_type2)) { in CheckUnaryOpWide()
295 SetRegisterTypeWide(inst->VRegA_12x(), dst_type1, dst_type2); in CheckUnaryOpWide()
299 void RegisterLine::CheckUnaryOpToWide(const Instruction* inst, in CheckUnaryOpToWide() argument
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Dregister_line.h176 RegType& GetInvocationThis(const Instruction* inst, bool is_range)
183 void CheckUnaryOp(const Instruction* inst, RegType& dst_type,
187 void CheckUnaryOpWide(const Instruction* inst,
192 void CheckUnaryOpToWide(const Instruction* inst,
197 void CheckUnaryOpFromWide(const Instruction* inst,
207 void CheckBinaryOp(const Instruction* inst,
212 void CheckBinaryOpWide(const Instruction* inst,
218 void CheckBinaryOpWideShift(const Instruction* inst,
227 void CheckBinaryOp2addr(const Instruction* inst,
233 void CheckBinaryOp2addrWide(const Instruction* inst,
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Dmethod_verifier.h353 bool VerifyInstruction(const Instruction* inst, uint32_t code_offset);
484 void VerifyNewArray(const Instruction* inst, bool is_filled, bool is_range)
495 void VerifyAGet(const Instruction* inst, RegType& insn_type,
499 void VerifyAPut(const Instruction* inst, RegType& insn_type,
515 void VerifyISFieldAccess(const Instruction* inst, RegType& insn_type,
521 mirror::ArtField* GetQuickFieldAccess(const Instruction* inst, RegisterLine* reg_line)
525 void VerifyQuickFieldAccess(const Instruction* inst, RegType& insn_type, bool is_primitive)
571 mirror::ArtMethod* VerifyInvocationArgs(const Instruction* inst,
578 void VerifyInvocationArgsUnresolvedMethod(const Instruction* inst, MethodType method_type,
583 mirror::ArtMethod* VerifyInvocationArgsFromIterator(T* it, const Instruction* inst,
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/art/compiler/sea_ir/ir/
Dinstruction_nodes.h111 explicit ConstInstructionNode(const art::Instruction* inst): in ConstInstructionNode() argument
112 InstructionNode(inst) { } in ConstInstructionNode()
126 explicit UnnamedConstInstructionNode(const art::Instruction* inst, int32_t value): in UnnamedConstInstructionNode() argument
127 ConstInstructionNode(inst), value_(value) { } in UnnamedConstInstructionNode()
148 explicit ReturnInstructionNode(const art::Instruction* inst): InstructionNode(inst) { } in ReturnInstructionNode() argument
157 explicit IfNeInstructionNode(const art::Instruction* inst): InstructionNode(inst) { in IfNeInstructionNode() argument
158 DCHECK(InstructionTools::IsDefinition(inst) == false); in IfNeInstructionNode()
170 explicit MoveResultInstructionNode(const art::Instruction* inst): InstructionNode(inst) { } in MoveResultInstructionNode() argument
184 explicit InvokeStaticInstructionNode(const art::Instruction* inst): InstructionNode(inst), in InvokeStaticInstructionNode() argument
185 method_index_(inst->VRegB_35c()) { } in InvokeStaticInstructionNode()
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Dsea.cc208 const art::Instruction* inst = art::Instruction::At(&code[i]); in BuildMethodSeaGraph() local
209 if (inst->IsBranch() || inst->IsUnconditional()) { in BuildMethodSeaGraph()
210 int32_t offset = inst->GetTargetOffset(); in BuildMethodSeaGraph()
215 if (inst->CanFlowThrough() in BuildMethodSeaGraph()
216 && (target_regions.end() == target_regions.find(&code[i + inst->SizeInCodeUnits()]))) { in BuildMethodSeaGraph()
219 std::pair<const uint16_t*, Region*>(&code[i + inst->SizeInCodeUnits()], region)); in BuildMethodSeaGraph()
222 i += inst->SizeInCodeUnits(); in BuildMethodSeaGraph()
235 const art::Instruction* inst = art::Instruction::At(&code[i]); in BuildMethodSeaGraph() local
237 sea_ir::InstructionNode::Create(inst); in BuildMethodSeaGraph()
243 if (inst->IsBranch() || inst->IsUnconditional()) { in BuildMethodSeaGraph()
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/art/runtime/
Ddex_instruction_visitor.h33 const Instruction* inst = Instruction::At(&code[i]); in Visit() local
34 switch (inst->Opcode()) { in Visit()
37 derived->Do_ ## cname(inst); \ in Visit()
47 i += inst->SizeInCodeUnits(); in Visit()
54 void Do_ ## cname(const Instruction* inst) { \
56 derived->Do_Default(inst); \
/art/test/003-omnibus-opcodes/src/
DMethodCall.java54 MethodCall inst = new MethodCall(); in run() local
56 MethodCallBase base = inst; in run()
58 inst.tryThing(); in run()
60 inst = null; in run()
62 inst.directly(); in run()
/art/test/043-privates/src/
DMain.java45 PrivatePackage inst = new PrivatePackageSub(); in stretchTest() local
46 System.out.println("PrivatePackage --> " + inst.getStr()); in stretchTest()
47 System.out.println("PrivatePackage --> " + inst.privGetStr()); in stretchTest()
/art/compiler/llvm/
Dir_builder.h80 ::llvm::LoadInst* inst = LLVMIRBuilder::CreateLoad(ptr); in CreateLoad()
81 inst->setMetadata(::llvm::LLVMContext::MD_tbaa, tbaa_info); in CreateLoad()
82 return inst; in CreateLoad()
86 ::llvm::StoreInst* inst = LLVMIRBuilder::CreateStore(val, ptr); in CreateStore()
87 inst->setMetadata(::llvm::LLVMContext::MD_tbaa, tbaa_info); in CreateStore()
88 return inst; in CreateStore()
94 ::llvm::AtomicCmpXchgInst* inst = in CreateAtomicCmpXchgInst()
96 inst->setMetadata(::llvm::LLVMContext::MD_tbaa, tbaa_info); in CreateAtomicCmpXchgInst()
97 return inst; in CreateAtomicCmpXchgInst()
175 void SetTBAA(::llvm::Instruction* inst, TBAASpecialType special_ty) { in SetTBAA() argument
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/art/compiler/sea_ir/types/
Dtype_inference.h63 FunctionTypeInfo(const SeaGraph* graph, InstructionNode* inst,
Dtype_inference.cc47 FunctionTypeInfo::FunctionTypeInfo(const SeaGraph* graph, InstructionNode* inst, in FunctionTypeInfo() argument
49 dex_method_idx_(inst->GetInstruction()->VRegB_35c()), type_cache_(types), in FunctionTypeInfo()
/art/compiler/utils/arm/
Dassembler_arm32.h357 static int32_t EncodeBranchOffset(int offset, int32_t inst);
358 static int DecodeBranchOffset(int32_t inst);
359 int32_t EncodeTstOffset(int offset, int32_t inst);
360 int DecodeTstOffset(int32_t inst);
Dassembler_thumb2.h415 static int32_t EncodeBranchOffset(int32_t offset, int32_t inst);
416 static int DecodeBranchOffset(int32_t inst);
417 int32_t EncodeTstOffset(int offset, int32_t inst);
418 int DecodeTstOffset(int32_t inst);
/art/compiler/utils/mips/
Dassembler_mips.cc124 int32_t MipsAssembler::EncodeBranchOffset(int offset, int32_t inst, bool is_jump) { in EncodeBranchOffset() argument
132 return (inst & ~kJumpOffsetMask) | offset; in EncodeBranchOffset()
135 return (inst & ~kBranchOffsetMask) | offset; in EncodeBranchOffset()
139 int MipsAssembler::DecodeBranchOffset(int32_t inst, bool is_jump) { in DecodeBranchOffset() argument
142 return (((inst & kJumpOffsetMask) << 6) >> 4); in DecodeBranchOffset()
144 return (((inst & kBranchOffsetMask) << 16) >> 14); in DecodeBranchOffset()
Dassembler_mips.h277 int32_t EncodeBranchOffset(int offset, int32_t inst, bool is_jump);
278 int DecodeBranchOffset(int32_t inst, bool is_jump);
/art/compiler/dex/portable/
Dmir_to_gbc.cc91 ::llvm::Instruction* inst = ::llvm::dyn_cast< ::llvm::Instruction>(placeholder); in DefineValueOnly()
92 DCHECK(inst != NULL); in DefineValueOnly()
93 inst->eraseFromParent(); in DefineValueOnly()
1537 ::llvm::Instruction* inst = irb_->CreateCall(intr); in SetMethodInfo()
1545 inst->setMetadata("RegInfo", reg_info_node); in SetMethodInfo()
1946 ::llvm::Instruction* inst = ::llvm::dyn_cast< ::llvm::Instruction>(it++); in MethodMIR2Bitcode()
1947 DCHECK(inst != NULL); in MethodMIR2Bitcode()
1948 ::llvm::Value* val = ::llvm::dyn_cast< ::llvm::Value>(inst); in MethodMIR2Bitcode()
1951 inst->eraseFromParent(); in MethodMIR2Bitcode()
/art/compiler/dex/quick/
Dcodegen_util.cc82 void Mir2Lir::MarkSafepointPC(LIR* inst) { in MarkSafepointPC() argument
83 DCHECK(!inst->flags.use_def_invalid); in MarkSafepointPC()
84 inst->u.m.def_mask = &kEncodeAll; in MarkSafepointPC()
1213 LIR* inst = Load32Disp(base_reg, offset, temp_reg); in OpCmpMemImmBranch() local
1215 *compare = inst; in OpCmpMemImmBranch()

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